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/freebsd/sys/contrib/device-tree/src/arm64/cix/
H A Dsky1.dtsi24 capacity-dmips-mhz = <403>;
32 capacity-dmips-mhz = <403>;
40 capacity-dmips-mhz = <403>;
48 capacity-dmips-mhz = <403>;
56 capacity-dmips-mhz = <1024>;
64 capacity-dmips-mhz = <1024>;
72 capacity-dmips-mhz = <1024>;
80 capacity-dmips-mhz = <1024>;
88 capacity-dmips-mhz = <1024>;
96 capacity-dmips-mhz = <1024>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dti,dp83822.yaml87 - RMII master, where the PHY outputs a 50MHz reference clock which can
89 - RMII slave, where the PHY expects a 50MHz reference clock input
105 - 'mac-if': In MII mode the clock frequency is 25-MHz, in RMII Mode the
106 clock frequency is 50-MHz and in RGMII Mode the clock frequency is
107 25-MHz.
109 - 'int-ref': Internal reference clock 25-MHz.
110 - 'rmii-master-mode-ref': RMII master mode reference clock 50-MHz. RMII
113 - 'free-running': Free running clock 125-MHz.
114 - 'recovered': Recovered clock is a 125-MHz recovered clock from a
126 enum: [43, 44, 46, 48, 50, 53, 55, 58, 61, 65, 69, 73, 78, 84, 91, 99]
/freebsd/sys/contrib/device-tree/Bindings/usb/
H A Ddwc3-xilinx.txt8 "bus_clk" Master/Core clock, have to be >= 125 MHz for SS
9 operation and >= 60MHz for HS operation
50 interrupts = <0 65 4>, <0 69 4>, <0 75 4>;
H A Ddwc3-xilinx.yaml40 - description: Master/Core clock, has to be >= 125 MHz
41 for SS operation and >= 60MHz for HS operation.
131 interrupts = <0 65 4>, <0 69 4>;
/freebsd/contrib/wpa/wpa_supplicant/
H A Dop_classes.c59 * In 80 MHz, the bandwidth "spans" 12 channels (e.g., 36-48), in get_center_80mhz()
129 * In 160 MHz, the bandwidth "spans" 28 channels (e.g., 36-64), in get_center_160mhz()
199 * In 320 MHz, the bandwidth "spans" 60 channels (e.g., 65-125), in get_center_320mhz()
275 * valid 20 MHz channels. Override earlier allow_channel() in verify_channel()
276 * result and use only the 80 MHz specific version. in verify_channel()
282 * valid 20 MHz channels. Override earlier allow_channel() in verify_channel()
283 * result and use only the 160 MHz specific version. in verify_channel()
289 * valid 20 MHz channels. Override earlier allow_channel() in verify_channel()
290 * result and use only the 80 MHz specific version. in verify_channel()
296 * valid 20 MHz channels. Override earlier allow_channel() in verify_channel()
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dmpc5125twr.dts39 timebase-frequency = <49500000>;// 49.5 MHz (csb/4)
40 bus-frequency = <198000000>; // 198 MHz csb bus
41 clock-frequency = <396000000>; // 396 MHz ppc core
72 bus-frequency = <66000000>; // 66 MHz ips bus
289 interrupts = <65 0x8>;
H A Dmpc5121.dtsi35 timebase-frequency = <49500000>;/* 49.5 MHz (csb/4) */
36 bus-frequency = <198000000>; /* 198 MHz csb bus */
37 clock-frequency = <396000000>; /* 396 MHz ppc core */
96 bus-frequency = <66000000>; /* 66 MHz ips bus */
503 interrupts = <65 0x8>;
/freebsd/contrib/tcpdump/
H A Dprint-802_11.c430 * 0 for 20 MHz, 1 for 40 MHz;
436 { /* 20 Mhz */ { 6.5f, /* SGI */ 7.2f, },
437 /* 40 Mhz */ { 13.5f, /* SGI */ 15.0f, },
441 { /* 20 Mhz */ { 13.0f, /* SGI */ 14.4f, },
442 /* 40 Mhz */ { 27.0f, /* SGI */ 30.0f, },
446 { /* 20 Mhz */ { 19.5f, /* SGI */ 21.7f, },
447 /* 40 Mhz */ { 40.5f, /* SGI */ 45.0f, },
451 { /* 20 Mhz */ { 26.0f, /* SGI */ 28.9f, },
452 /* 40 Mhz */ { 54.0f, /* SGI */ 60.0f, },
456 { /* 20 Mhz */ { 39.0f, /* SGI */ 43.3f, },
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6ul-isiot.dtsi30 60 61 62 63 64 65 66 67 68 69
349 pinctrl_usdhc1_100mhz: usdhc1-100mhz-grp {
360 pinctrl_usdhc1_200mhz: usdhc1-200mhz-grp {
H A Dimx6ul-geam.dts31 60 61 62 63 64 65 66 67 68 69
413 pinctrl_usdhc1_100mhz: usdhc1-100mhz-grp {
424 pinctrl_usdhc1_200mhz: usdhc1-200mhz-grp {
H A Dimx6qdl-gw5903.dtsi25 60 61 62 63 64 65 66 67 68 69
641 pinctrl_usdhc1_200mhz: usdhc1-200mhz-grp {
671 pinctrl_usdhc2_100mhz: usdhc2-100mhz-grp {
684 pinctrl_usdhc2_200mhz: usdhc2-200mhz-grp {
713 pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp {
729 pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp {
/freebsd/sys/contrib/dev/iwlwifi/mld/
H A Dlink.c174 /* Protect when channel wider than 20MHz */ in iwl_mld_fill_protection_flags()
656 RSSI_TO_GRADE_LINE(-65, -68, 2064),
679 int mhz = nl80211_chan_width_to_mhz(chan_width); in iwl_mld_get_n_subchannels() local
682 if (WARN_ONCE(mhz < 20 || mhz > 320, in iwl_mld_get_n_subchannels()
683 "Invalid channel width : (%d)\n", mhz)) in iwl_mld_get_n_subchannels()
687 n_subchannels = mhz / 20; in iwl_mld_get_n_subchannels()
689 /* No puncturing if less than 80 MHz */ in iwl_mld_get_n_subchannels()
690 if (mhz >= 80) in iwl_mld_get_n_subchannels()
H A Drx.c258 case 65 ... 66: in iwl_mld_decode_he_phy_ru_alloc()
260 offs = ru - 65; in iwl_mld_decode_he_phy_ru_alloc()
278 BUILD_BUG_ON(IEEE80211_RADIOTAP_HE_MU_FLAGS2_BW_FROM_SIG_A_BW_ ## bw ## MHZ != \ in iwl_mld_decode_he_phy_ru_alloc()
280 BUILD_BUG_ON(IEEE80211_RADIOTAP_HE_DATA6_TB_PPDU_BW_ ## bw ## MHZ != \ in iwl_mld_decode_he_phy_ru_alloc()
746 * 20 MHz: A1 in iwl_mld_decode_eht_ext_mu()
747 * 40 MHz: A1 B1 in iwl_mld_decode_eht_ext_mu()
748 * 80 MHz: A1 C1 B1 D1 in iwl_mld_decode_eht_ext_mu()
749 * 160 MHz: A1 C1 A2 C2 B1 D1 B2 D2 in iwl_mld_decode_eht_ext_mu()
750 * 320 MHz: A1 C1 A2 C2 A3 C3 A4 C4 B1 D1 B2 D2 B3 D3 B4 D4 in iwl_mld_decode_eht_ext_mu()
888 case 65 ... 66: in iwl_mld_decode_eht_ru()
[all …]
/freebsd/sys/contrib/dev/iwlwifi/mvm/
H A Dlink.c416 RSSI_TO_GRADE_LINE(-65, -68, 2064),
441 int mhz = nl80211_chan_width_to_mhz(chan_width); in iwl_mvm_get_puncturing_factor() local
444 if (WARN_ONCE(mhz < 20 || mhz > 320, in iwl_mvm_get_puncturing_factor()
445 "Invalid channel width : (%d)\n", mhz)) in iwl_mvm_get_puncturing_factor()
449 if (mhz < 80) in iwl_mvm_get_puncturing_factor()
453 n_subchannels = mhz / 20; in iwl_mvm_get_puncturing_factor()
629 .low = IWL_MVM_LOW_RSSI_THRESH_##_bw##MHZ, \
630 .high = IWL_MVM_HIGH_RSSI_THRESH_##_bw##MHZ \
642 /* 320 MHz has the same thresholds as 20 MHz */ in iwl_mvm_get_esr_rssi_thresh()
652 /* 6 GHz will always use 20 MHz thresholds, regardless of the BW */ in iwl_mvm_get_esr_rssi_thresh()
H A Drxmq.c1098 case 65 ... 66: in iwl_mvm_decode_he_phy_ru_alloc()
1100 offs = ru - 65; in iwl_mvm_decode_he_phy_ru_alloc()
1118 BUILD_BUG_ON(IEEE80211_RADIOTAP_HE_MU_FLAGS2_BW_FROM_SIG_A_BW_ ## bw ## MHZ != \ in iwl_mvm_decode_he_phy_ru_alloc()
1120 BUILD_BUG_ON(IEEE80211_RADIOTAP_HE_DATA6_TB_PPDU_BW_ ## bw ## MHZ != \ in iwl_mvm_decode_he_phy_ru_alloc()
1362 * 20 MHz: A1 in iwl_mvm_decode_eht_ext_mu()
1363 * 40 MHz: A1 B1 in iwl_mvm_decode_eht_ext_mu()
1364 * 80 MHz: A1 C1 B1 D1 in iwl_mvm_decode_eht_ext_mu()
1365 * 160 MHz: A1 C1 A2 C2 B1 D1 B2 D2 in iwl_mvm_decode_eht_ext_mu()
1366 * 320 MHz: A1 C1 A2 C2 A3 C3 A4 C4 B1 D1 B2 D2 B3 D3 B4 D4 in iwl_mvm_decode_eht_ext_mu()
1503 case 65 ... 66: in iwl_mvm_decode_eht_ru()
[all …]
/freebsd/sys/dev/bwn/
H A Dif_bwnreg.h290 #define BWN_HF_N40W 0x000008000000ULL /* N PHY 40 MHz workaround (rev >= 13 only) */
834 71, 70, 70, 69, 68, 68, 67, 67, 66, 65, 65, 64, 63, 63, 62, 61, \
1059 #define BWN_TXH_PHY1_BW_10 0x0000 /* 10 MHz */
1060 #define BWN_TXH_PHY1_BW_10U 0x0001 /* 10 MHz upper */
1061 #define BWN_TXH_PHY1_BW_20 0x0002 /* 20 MHz */
1062 #define BWN_TXH_PHY1_BW_20U 0x0003 /* 20 MHz upper */
1063 #define BWN_TXH_PHY1_BW_40 0x0004 /* 40 MHz */
1064 #define BWN_TXH_PHY1_BW_40DUP 0x0005 /* 40 MHz duplicate */
/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dste-nomadik-nhk15.dts229 /* 320 ns min period ~= 3 MHz */
256 60 61 62 63 64 65 66 67 68 69
/freebsd/sys/contrib/dev/athk/ath11k/
H A Ddebugfs_htt_stats.h80 HTT_STATS_TX_DE_COMPL_STATS_TAG = 65,
467 /* element 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160 and 80+80 MHz */
505 /* element 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160 and 80+80 MHz */
1263 /* element 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160 and 80+80 MHz */
1353 /* element 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160 and 80+80 MHz */
1769 * ... where max_bw == 4 for 160mhz
/freebsd/sys/net80211/
H A Dieee80211.h798 #define IEEE80211_HTCAP_SHORTGI20 0x0020 /* Short GI in 20MHz */
799 #define IEEE80211_HTCAP_SHORTGI40 0x0040 /* Short GI in 40MHz */
810 #define IEEE80211_HTCAP_DSSSCCK40 0x1000 /* DSSS/CCK in 40MHz */
812 #define IEEE80211_HTCAP_40INTOLERANT 0x4000 /* 40MHz intolerant */
877 #define IEEE80211_HTINFO_TXWIDTH_20 0x00 /* 20MHz width */
963 IEEE80211_VHT_CHANWIDTH_USE_HT = 0, /* 20 MHz or 40 MHz */
964 IEEE80211_VHT_CHANWIDTH_80MHZ = 1, /* 80MHz */
965 IEEE80211_VHT_CHANWIDTH_160MHZ = 2, /* 160MHz (deprecated) */
966 IEEE80211_VHT_CHANWIDTH_80P80MHZ = 3, /* 80+80MHz (deprecated) */
1081 * 0 - 20 MHz
[all …]
/freebsd/sys/dev/videomode/
H A Dmodelines105 # 1600x1200 @ 65Hz (VESA) hsync: 81.3kHz
117 # 1680x1050 @ 60.00Hz (GTF) hsync: 65.22 kHz; pclk: 147.14 MHz
/freebsd/sys/dev/mvs/
H A Dmvs.h328 #define SATA_SATAICFG_REFCLKDIV_2 (1 << 2) /* Used 20 or 25MHz */
329 #define SATA_SATAICFG_REFCLKDIV_4 (2 << 2) /* Used 40MHz */
330 #define SATA_SATAICFG_REFCLKDIV_3 (3 << 2) /* Used 30MHz */
333 #define SATA_SATAICFG_REFCLKFEEDDIV_60 (1 << 4) /* or 120. Used 25MHz */
334 #define SATA_SATAICFG_REFCLKFEEDDIV_75 (2 << 4) /* or 150. Used 20MHz */
387 #define SATA_PHYCFG_OFS 0x3a0 /* 65nm SoCs only */
/freebsd/sys/contrib/dev/iwlwifi/
H A Diwl-nvm-parse.c104 1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45, 49, 53, 57, 61, 65, 69,
148 * AP allowed only in 20 MHz. Valid only
157 * @NVM_CHANNEL_20MHZ: 20 MHz channel okay
158 * @NVM_CHANNEL_40MHZ: 40 MHz channel okay
159 * @NVM_CHANNEL_80MHZ: 80 MHz channel okay
160 * @NVM_CHANNEL_160MHZ: 160 MHz channel okay
193 * @REG_CAPA_V1_160MHZ_ALLOWED: 11ac channel with a width of 160Mhz is allowed
195 * @REG_CAPA_V1_80MHZ_ALLOWED: 11ac channel with a width of 80Mhz is allowed
199 * @REG_CAPA_V1_40MHZ_FORBIDDEN: 11n channel with a width of 40Mhz is forbidden
225 * @REG_CAPA_V2_160MHZ_ALLOWED: 11ac channel with a width of 160Mhz is allowed
[all …]
/freebsd/sys/contrib/device-tree/src/arm/arm/
H A Dvexpress-v2p-ca9.dts95 /* 1024x768 16bpp @65MHz */
/freebsd/contrib/wpa/src/common/
H A Dqca-vendor.h448 * QCA_WLAN_VENDOR_ATTR_MAC_ADDR and optionally frequency (MHz) in
1091 * (CU) of each 20 MHz sub-channel of the entire connected channel using
1285 QCA_NL80211_VENDOR_SUBCMD_GSCAN_SET_SSID_HOTLIST = 65,
1584 /* Frequency in MHz, various uses. Unsigned 32 bit value */
1851 /* A 32-bit unsigned value; the P2P listen frequency (MHz); must be one
1934 * channel width (in MHz).
1947 * 20 MHz, 40 MHz, and 80 MHz channels. The value is the center frequency index
1948 * of the primary 80 MHz segment for 160 MHz and 80+80 MHz channels.
1958 * ACS operation. The value is zero for 20 MHz, 40 MHz, and 80 MHz channels.
1959 * The value is the index of the channel center frequency for 160 MHz channels
[all …]
/freebsd/sys/contrib/device-tree/src/arm/ti/davinci/
H A Dda850-evm.dts196 * The standard da850-evm kits and SOM's are 375MHz so enable this operating
274 wp-gpios = <&gpio 65 GPIO_ACTIVE_HIGH>;

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