/linux/Documentation/admin-guide/media/ |
H A D | dvb_intro.rst | 107 Seven 177.500 Mhz 108 SBS 184.500 Mhz 109 Nine 191.625 Mhz 110 Ten 219.500 Mhz 111 ABC 226.500 Mhz 112 Channel 31 557.625 Mhz 133 T 177500000 7MHz AUTO AUTO QAM64 8k 1/16 NONE 134 T 184500000 7MHz AUTO AUTO QAM64 8k 1/8 NONE 135 T 191625000 7MHz AUTO AUTO QAM64 8k 1/16 NONE 136 T 219500000 7MHz AUTO AUTO QAM64 8k 1/16 NONE [all …]
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/linux/arch/arm64/boot/dts/qcom/ |
H A D | sdm660.dtsi | 20 * 775MHz is only available on the highest speed bin 26 opp-hz = /bits/ 64 <750000000>; 37 opp-hz = /bits/ 64 <700000000>; 44 opp-hz = /bits/ 64 <647000000>; 51 opp-hz = /bits/ 64 <588000000>; 58 opp-hz = /bits/ 64 <465000000>; 65 opp-hz = /bits/ 64 <370000000>; 73 opp-hz = /bits/ 64 <266000000>; 80 opp-hz = /bits/ 64 <160000000>; 90 capacity-dmips-mhz = <1024>; [all …]
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H A D | msm8996pro.dtsi | 24 opp-hz = /bits/ 64 <307200000>; 30 opp-hz = /bits/ 64 <384000000>; 36 opp-hz = /bits/ 64 <460800000>; 42 opp-hz = /bits/ 64 <537600000>; 48 opp-hz = /bits/ 64 <614400000>; 54 opp-hz = /bits/ 64 <691200000>; 60 opp-hz = /bits/ 64 <768000000>; 66 opp-hz = /bits/ 64 <844800000>; 72 opp-hz = /bits/ 64 <902400000>; 78 opp-hz = /bits/ 64 <979200000>; [all …]
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/linux/Documentation/scsi/ |
H A D | aic7xxx.rst | 26 aic7770 10 EISA/VL 10MHz 16Bit 4 1 27 aic7850 10 PCI/32 10MHz 8Bit 3 28 aic7855 10 PCI/32 10MHz 8Bit 3 29 aic7856 10 PCI/32 10MHz 8Bit 3 30 aic7859 10 PCI/32 20MHz 8Bit 3 31 aic7860 10 PCI/32 20MHz 8Bit 3 32 aic7870 10 PCI/32 10MHz 16Bit 16 33 aic7880 10 PCI/32 20MHz 16Bit 16 34 aic7890 20 PCI/32 40MHz 16Bit 16 3 4 5 6 7 8 35 aic7891 20 PCI/64 40MHz 16Bit 16 3 4 5 6 7 8 [all …]
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H A D | aic79xx.rst | 28 AIC-7901A Single Channel 64-bit PCI-X 133MHz to 30 AIC-7901B Single Channel 64-bit PCI-X 133MHz to 32 AIC-7902A4 Dual Channel 64-bit PCI-X 133MHz to 34 AIC-7902B Dual Channel 64-bit PCI-X 133MHz to 41 Adaptec SCSI Card 39320 Dual Channel 64-bit PCI-X 133MHz to 7902A4/7902B 44 Adaptec SCSI Card 39320A Dual Channel 64-bit PCI-X 133MHz to 7902B 47 Adaptec SCSI Card 39320D Dual Channel 64-bit PCI-X 133MHz to 7902A4 50 Adaptec SCSI Card 39320D Dual Channel 64-bit PCI-X 133MHz to 7902A4 54 Adaptec SCSI Card 29320 Single Channel 64-bit PCI-X 133MHz to 7901A 58 Adaptec SCSI Card 29320A Single Channel 64-bit PCI-X 133MHz to 7901B [all …]
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/linux/arch/arm/boot/dts/samsung/ |
H A D | exynos5422-odroid-core.dtsi | 45 /* derived from 532MHz MPLL */ 47 opp-hz = /bits/ 64 <88700000>; 51 opp-hz = /bits/ 64 <133000000>; 55 opp-hz = /bits/ 64 <177400000>; 59 opp-hz = /bits/ 64 <266000000>; 63 opp-hz = /bits/ 64 <532000000>; 71 /* derived from 666MHz CPLL */ 73 opp-hz = /bits/ 64 <66600000>; 76 opp-hz = /bits/ 64 <74000000>; 79 opp-hz = /bits/ 64 <83250000>; [all …]
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/linux/arch/arm64/boot/dts/apple/ |
H A D | t600x-common.dtsi | 73 capacity-dmips-mhz = <714>; 87 capacity-dmips-mhz = <714>; 101 capacity-dmips-mhz = <1024>; 115 capacity-dmips-mhz = <1024>; 129 capacity-dmips-mhz = <1024>; 143 capacity-dmips-mhz = <1024>; 157 capacity-dmips-mhz = <1024>; 171 capacity-dmips-mhz = <1024>; 185 capacity-dmips-mhz = <1024>; 199 capacity-dmips-mhz = <1024>; [all …]
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/linux/Documentation/fb/ |
H A D | viafb.modes | 10 # 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock) 29 # D: 25.175 MHz, H: 31.469 kHz, V: 59.94 Hz 32 # D: 24.823 MHz, H: 39.780 kHz, V: 60.00 Hz 35 # 640x480, 75 Hz, Non-Interlaced (31.50 MHz dotclock) 53 # D: 31.50 MHz, H: 37.500 kHz, V: 75.00 Hz 54 geometry 640 480 640 480 32 timings 31747 120 16 16 1 64 3 endmode 56 # 640x480, 85 Hz, Non-Interlaced (36.000 MHz dotclock) 74 # D: 36.000 MHz, H: 43.269 kHz, V: 85.00 Hz 77 # 640x480, 100 Hz, Non-Interlaced (43.163 MHz dotclock) 95 # D: 43.163 MHz, H: 50.900 kHz, V: 100.00 Hz [all …]
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/linux/arch/arm64/boot/dts/arm/ |
H A D | juno-r1.dts | 94 i-cache-line-size = <64>; 97 d-cache-line-size = <64>; 102 capacity-dmips-mhz = <1024>; 111 i-cache-line-size = <64>; 114 d-cache-line-size = <64>; 119 capacity-dmips-mhz = <1024>; 128 i-cache-line-size = <64>; 131 d-cache-line-size = <64>; 136 capacity-dmips-mhz = <578>; 145 i-cache-line-size = <64>; [all …]
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H A D | juno.dts | 93 i-cache-line-size = <64>; 96 d-cache-line-size = <64>; 101 capacity-dmips-mhz = <1024>; 111 i-cache-line-size = <64>; 114 d-cache-line-size = <64>; 119 capacity-dmips-mhz = <1024>; 129 i-cache-line-size = <64>; 132 d-cache-line-size = <64>; 137 capacity-dmips-mhz = <578>; 147 i-cache-line-size = <64>; [all …]
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H A D | juno-r2.dts | 94 i-cache-line-size = <64>; 97 d-cache-line-size = <64>; 102 capacity-dmips-mhz = <1024>; 112 i-cache-line-size = <64>; 115 d-cache-line-size = <64>; 120 capacity-dmips-mhz = <1024>; 130 i-cache-line-size = <64>; 133 d-cache-line-size = <64>; 138 capacity-dmips-mhz = <485>; 148 i-cache-line-size = <64>; [all …]
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/linux/drivers/net/can/softing/ |
H A D | softing_cs.c | 26 #define MHZ (1000*1000) macro 33 .freq = 16 * MHZ, .max_brp = 32, .max_sjw = 4, 45 .freq = 16 * MHZ, .max_brp = 32, .max_sjw = 4, 57 .freq = 20 * MHZ, .max_brp = 32, .max_sjw = 4, 69 .freq = 24 * MHZ, .max_brp = 64, .max_sjw = 4, 81 .freq = 16 * MHZ, .max_brp = 64, .max_sjw = 4, 93 .freq = 20 * MHZ, .max_brp = 32, .max_sjw = 4, 105 .freq = 24 * MHZ, .max_brp = 64, .max_sjw = 4, 117 .freq = 16 * MHZ, .max_brp = 64, .max_sjw = 4, 129 .freq = 24 * MHZ, .max_brp = 64, .max_sjw = 4,
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/linux/drivers/clk/uniphier/ |
H A D | clk-uniphier-sys.c | 87 UNIPHIER_CLK_FACTOR("spll", -1, "ref", 65, 1), /* 1597.44 MHz */ 88 UNIPHIER_CLK_FACTOR("upll", -1, "ref", 6000, 512), /* 288 MHz */ 89 UNIPHIER_CLK_FACTOR("a2pll", -1, "ref", 24, 1), /* 589.824 MHz */ 90 UNIPHIER_CLK_FACTOR("vpll27a", -1, "ref", 5625, 512), /* 270 MHz */ 103 UNIPHIER_CLK_FACTOR("spll", -1, "ref", 64, 1), /* 1600 MHz */ 104 UNIPHIER_CLK_FACTOR("upll", -1, "ref", 288, 25), /* 288 MHz */ 105 UNIPHIER_CLK_FACTOR("a2pll", -1, "upll", 256, 125), /* 589.824 MHz */ 106 UNIPHIER_CLK_FACTOR("vpll27a", -1, "ref", 270, 25), /* 270 MHz */ 107 UNIPHIER_CLK_FACTOR("gpll", -1, "ref", 10, 1), /* 250 MHz */ 132 UNIPHIER_CLK_FACTOR("spll", -1, "ref", 64, 1), /* 1600 MHz */ [all …]
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/linux/arch/m68k/include/uapi/asm/ |
H A D | bootinfo-hp300.h | 25 #define HP_320 0 /* 16MHz 68020+HP MMU+16K external cache */ 26 #define HP_330 1 /* 16MHz 68020+68851 MMU */ 27 #define HP_340 2 /* 16MHz 68030 */ 28 #define HP_345 3 /* 50MHz 68030+32K external cache */ 29 #define HP_350 4 /* 25MHz 68020+HP MMU+32K external cache */ 30 #define HP_360 5 /* 25MHz 68030 */ 31 #define HP_370 6 /* 33MHz 68030+64K external cache */ 32 #define HP_375 7 /* 50MHz 68030+32K external cache */ 33 #define HP_380 8 /* 25MHz 68040 */ 34 #define HP_385 9 /* 33MHz 68040 */ [all …]
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/linux/drivers/media/usb/dvb-usb-v2/ |
H A D | af9035.h | 46 #define BUF_LEN 64 81 16384000, /* 16.38 MHz */ 82 20480000, /* 20.48 MHz */ 83 36000000, /* 36.00 MHz */ 84 30000000, /* 30.00 MHz */ 85 26000000, /* 26.00 MHz */ 86 28000000, /* 28.00 MHz */ 87 32000000, /* 32.00 MHz */ 88 34000000, /* 34.00 MHz */ 89 24000000, /* 24.00 MHz */ [all …]
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/linux/drivers/clk/ |
H A D | clk-vt8500.c | 122 div = 64 * (div & 0x1f); in vt8500_dclk_recalc_rate() 151 divisor = 64 * ((divisor / 64) + 1); in vt8500_dclk_determine_rate() 176 * Bit 5 is a fixed /64 predivisor. If the requested divisor in vt8500_dclk_set_rate() 179 divisor = 0x20 + (divisor / 64); in vt8500_dclk_set_rate() 381 * Where O1 is 900MHz...3GHz; 382 * O2 is 600MHz >= (M * parent) / P >= 300MHz; 383 * M is 36...120 [25MHz parent]; D is 1 or 2 or 4 or 8. 385 * D = 8: 37,5MHz...75MHz 386 * D = 4: 75MHz...150MHz 387 * D = 2: 150MHz...300MHz [all …]
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/linux/drivers/media/pci/cx18/ |
H A D | cx18-dvb.c | 101 .if2 = 45600, /* 4.560 MHz IF from the XC3028 */ 134 if (sz < 2 || sz > 64 || (sz % 2) != 0) { in yuan_mpc718_mt352_reqfw() 173 /* 6 MHz: 64/7 * 6/8 / 20.48 * 2^16 = 0x55b6.db6 */ in yuan_mpc718_mt352_init() 174 /* 7 MHz: 64/7 * 7/8 / 20.48 * 2^16 = 0x6400 */ in yuan_mpc718_mt352_init() 175 /* 8 MHz: 64/7 * 8/8 / 20.48 * 2^16 = 0x7249.249 */ in yuan_mpc718_mt352_init() 184 /* 4.56 MHz IF: (20.48 - 4.56)/20.48 * 2^14 = 0x31c0 */ in yuan_mpc718_mt352_init() 206 .adc_clock = 20480, /* 20.480 MHz */ 207 .if2 = 4560, /* 4.560 MHz */ 214 .if2 = 45600, /* 4.560 MHz IF from the XC3028 */ 222 .if2 = 45600, /* 4.560 MHz IF from the XC3028 */ [all …]
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/linux/Documentation/devicetree/bindings/opp/ |
H A D | opp-v2-kryo-cpu.yaml | 121 capacity-dmips-mhz = <1024>; 141 capacity-dmips-mhz = <1024>; 156 capacity-dmips-mhz = <1024>; 176 capacity-dmips-mhz = <1024>; 214 opp-hz = /bits/ 64 <307200000>; 221 opp-hz = /bits/ 64 <1401600000>; 228 opp-hz = /bits/ 64 <1593600000>; 242 opp-hz = /bits/ 64 <307200000>; 249 opp-hz = /bits/ 64 <1804800000>; 256 opp-hz = /bits/ 64 <1900800000>; [all …]
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/linux/drivers/media/dvb-frontends/ |
H A D | dvb_dummy_fe.c | 216 .frequency_min_hz = 51 * MHz, 217 .frequency_max_hz = 858 * MHz, 219 /* symbol_rate_min: SACLK/64 == (XIN/2)/64 */ 220 .symbol_rate_min = (57840000 / 2) / 64, 250 .frequency_min_hz = 950 * MHz, 251 .frequency_max_hz = 2150 * MHz,
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H A D | cxd2841er.h | 24 #define CXD2841ER_NO_AGCNEG 64 /* bit 6 */ 28 SONY_XTAL_20500, /* 20.5 MHz */ 29 SONY_XTAL_24000, /* 24 MHz */ 30 SONY_XTAL_41000 /* 41 MHz */
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/linux/drivers/net/wireless/intel/iwlwifi/mvm/ |
H A D | rfi.c | 11 * DDR needs frequency in units of 16.666MHz, so provide FW with the 15 /* frequency 2667MHz */ 16 {cpu_to_le16(160), {50, 58, 60, 62, 64, 52, 54, 56}, 20 /* frequency 2933MHz */ 27 /* frequency 3200MHz */ 32 /* frequency 3733MHz */ 37 /* frequency 4000MHz */ 42 /* frequency 4267MHz */ 47 /* frequency 4400MHz */ 52 /* frequency 5200MHz */ [all …]
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/linux/tools/power/x86/turbostat/ |
H A D | turbostat.8 | 47 MSRs are read as 64-bits, u32 truncates the displayed value to 32-bits. 86 …'%u' least significant bit within the 64 bit value read from 'offset'. Together with 'msb', used t… 89 …'%u' most significant bit within the 64 bit value read from 'offset'. Together with 'lsb', used to… 156 \fBTSC_MHz\fP average MHz that the TSC ran during the entire interval. 214 \fBUncMHz\fP per-package uncore MHz, instantaneous sample. 216 \fBUMHz1.0\fP per-package uncore MHz for pm_domain=1 and fabric_cluster=0, instantaneous sample. S… 300 TSC: 3096 MHz (24000000 Hz * 258 / 2 / 1000000) 305 8 * 100.0 = 800.0 MHz max efficiency frequency 306 31 * 100.0 = 3100.0 MHz base frequency 309 39 * 100.0 = 3900.0 MHz max turbo 4 active cores [all …]
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/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtso | 13 brightness-levels = <0 8 16 32 64 128 255>; 29 * The LVDS panel uses 72.4 MHz pixel clock, set IMX8MP_VIDEO_PLL1 to 30 * 72.4 * 7 = 506.8 MHz so the LDB serializer and LCDIFv3 scanout 31 * engine can reach accurate pixel clock of exactly 72.4 MHz.
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/linux/arch/arm/mach-sa1100/include/mach/ |
H A D | SA-1100.h | 262 * fxtl, Txtl Frequency, period of the system crystal (3.6864 MHz 263 * or 3.5795 MHz). 424 * fxtl, Txtl Frequency, period of the system crystal (3.6864 MHz 425 * or 3.5795 MHz). 624 * fmc, Tmc Frequency, period of the MCP communication (10 MHz, 625 * 12 MHz, or GPIO [21]). 665 #define MCCR0_IntClk (MCCR0_ECS*0) /* Internal Clock (10 or 12 MHz) */ 726 #define MCCR1_F12MHz (MCCR1_CFS*0) /* Freq. (fmc) = ~ 12 MHz */ 727 /* (11.981 MHz) */ 728 #define MCCR1_F10MHz (MCCR1_CFS*1) /* Freq. (fmc) = ~ 10 MHz */ [all …]
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/linux/arch/mips/bcm63xx/ |
H A D | cpu.c | 155 /* BCM6338 has a fixed 240 Mhz frequency */ in detect_cpu_clock() 159 /* BCM6345 has a fixed 140Mhz frequency */ in detect_cpu_clock() 166 /* 16MHz * (N1 + 1) * (N2 + 2) / (M1_CPU + 1) */ in detect_cpu_clock() 181 /* 16MHz * N1 * N2 / M1_CPU */ in detect_cpu_clock() 229 /* (64MHz / P1) * P2 * NDIV / M1_CPU */ in detect_cpu_clock() 245 return (((64 * 1000000) / p1) * p2 * ndiv) / m1; in detect_cpu_clock() 381 pr_info("CPU frequency is %u MHz\n", in bcm63xx_cpu_init()
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