| /linux/Documentation/userspace-api/media/v4l/ |
| H A D | pixfmt-srggb14p.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-SRGGB14P:
4 .. _v4l2-pix-fmt-sbggr14p:
5 .. _v4l2-pix-fmt-sgbrg14p:
6 .. _v4l2-pix-fmt-sgrbg14p:
17 14-bit packed Bayer formats
24 bits per colour. Every four consecutive samples are packed into seven
25 bytes. Each of the first four bytes contain the eight high order bits
27 significants bits of each pixel, in the same order.
29 Each n-pixel row contains n/2 green samples and n/2 blue or red samples,
[all …]
|
| H A D | pixfmt-srggb10-ipu3.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _v4l2-pix-fmt-ipu3-sbggr10:
4 .. _v4l2-pix-fmt-ipu3-sgbrg10:
5 .. _v4l2-pix-fmt-ipu3-sgrbg10:
6 .. _v4l2-pix-fmt-ipu3-srggb10:
13 10-bit Bayer formats
20 sRGB / Bayer formats with 10 bits per sample with every 25 pixels packed
21 to 32 bytes leaving 6 most significant bits padding in the last byte.
24 In other respects this format is similar to :ref:`V4L2-PIX-FMT-SRGGB10`.
36 .. flat-table::
[all …]
|
| H A D | pixfmt-srggb10p.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-SRGGB10P:
4 .. _v4l2-pix-fmt-sbggr10p:
5 .. _v4l2-pix-fmt-sgbrg10p:
6 .. _v4l2-pix-fmt-sgrbg10p:
16 10-bit packed Bayer formats
23 bits per sample. Every four consecutive samples are packed into 5
24 bytes. Each of the first 4 bytes contain the 8 high order bits
25 of the pixels, and the 5th byte contains the 2 least significants
26 bits of each pixel, in the same order.
[all …]
|
| /linux/Documentation/userspace-api/media/rc/ |
| H A D | rc-protos.rst | 1 .. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later
22 Some remotes have a pointer-type device which can used to control the
29 rc-5 (RC_PROTO_RC5)
30 -------------------
32 This IR protocol uses manchester encoding to encode 14 bits. There is a
38 .. flat-table:: rc5 bits scancode mapping
41 * - rc-5 bit
43 - scancode bit
45 - description
47 * - 1
[all …]
|
| /linux/drivers/crypto/hisilicon/sec2/ |
| H A D | sec_crypto.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
97 * mac_len: 0~4 bits
98 * a_key_len: 5~10 bits
99 * a_alg: 11~16 bits
104 * c_icv_len: 0~5 bits
105 * c_width: 6~8 bits
106 * c_key_len: 9~11 bits
107 * c_mode: 12~15 bits
111 /* c_alg: 0~3 bits */
116 * a_len: 0~23 bits
[all …]
|
| /linux/include/rdma/ |
| H A D | opa_port_info.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
3 * Copyright (c) 2014-2020 Intel Corporation. All rights reserved.
21 #define OPA_PORT_LTP_CRC_MODE_14 1 /* 14-bit LTP CRC mode (optional) */
22 #define OPA_PORT_LTP_CRC_MODE_16 2 /* 16-bit LTP CRC mode */
23 #define OPA_PORT_LTP_CRC_MODE_48 4 /* 48-bit LTP CRC mode (optional) */
24 #define OPA_PORT_LTP_CRC_MODE_PER_LANE 8 /* 12/16-bit per lane LTP CRC mode */
32 #define OPA_LINKDOWN_REASON_BAD_SLID 5
61 /* 34 -reserved */
64 /* 37-38 reserved */
68 /* 42-48 reserved */
[all …]
|
| /linux/drivers/net/ipa/reg/ |
| H A D | ipa_reg-v4.5.c | 1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (C) 2022-2024 Linaro Ltd. */
6 #include <linux/bits.h>
18 [IPA_QMB_SELECT_CONS_EN] = BIT(5),
32 /* Bits 22-31 reserved */
43 [FTCH_HPS] = BIT(5),
76 [ROUTE_DEF_PIPE] = GENMASK(5, 1),
80 /* Bits 22-23 reserved */
82 /* Bits 25-31 reserved */
97 /* Bits 8-31 reserved */
[all …]
|
| H A D | ipa_reg-v5.0.c | 1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (C) 2023-2024 Linaro Ltd. */
6 #include <linux/bits.h>
27 [IPA_QMB_SELECT_CONS_EN] = BIT(5),
45 /* Bits 28-29 reserved */
58 [FTCH_HPS] = BIT(5),
96 /* Bits 29-31 reserved */
111 /* Bits 8-31 reserved */
119 /* Bits 8-15 reserved */
126 /* Valid bits defined by ipa->available */
[all …]
|
| H A D | ipa_reg-v5.5.c | 1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (C) 2023-2024 Linaro Ltd. */
6 #include <linux/bits.h>
27 [IPA_QMB_SELECT_CONS_EN] = BIT(5),
39 /* Bits 17-18 reserved */
44 /* Bits 28-29 reserved */
57 [FTCH_HPS] = BIT(5),
95 /* Bits 29-31 reserved */
110 /* Bits 8-31 reserved */
118 /* Bits 8-15 reserved */
[all …]
|
| H A D | ipa_reg-v4.11.c | 1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (C) 2022-2024 Linaro Ltd. */
6 #include <linux/bits.h>
18 [IPA_QMB_SELECT_CONS_EN] = BIT(5),
36 /* Bits 24-29 reserved */
49 [FTCH_HPS] = BIT(5),
82 [ROUTE_DEF_PIPE] = GENMASK(5, 1),
86 /* Bits 22-23 reserved */
88 /* Bits 25-31 reserved */
103 /* Bits 8-31 reserved */
[all …]
|
| H A D | ipa_reg-v4.2.c | 1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (C) 2022-2024 Linaro Ltd. */
6 #include <linux/bits.h>
18 [IPA_QMB_SELECT_CONS_EN] = BIT(5),
31 /* Bits 21-31 reserved */
42 [FTCH_HPS] = BIT(5),
67 /* Bits 30-31 reserved */
74 [ROUTE_DEF_PIPE] = GENMASK(5, 1),
78 /* Bits 22-23 reserved */
80 /* Bits 25-31 reserved */
[all …]
|
| H A D | ipa_reg-v3.5.1.c | 1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (C) 2022-2024 Linaro Ltd. */
6 #include <linux/bits.h>
18 /* Bits 5-31 reserved */
29 [FTCH_HPS] = BIT(5),
46 /* Bits 22-31 reserved */
53 [ROUTE_DEF_PIPE] = GENMASK(5, 1),
57 /* Bits 22-23 reserved */
59 /* Bits 25-31 reserved */
74 /* Bits 8-31 reserved */
[all …]
|
| H A D | ipa_reg-v4.7.c | 1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (C) 2022-2024 Linaro Ltd. */
6 #include <linux/bits.h>
18 [IPA_QMB_SELECT_CONS_EN] = BIT(5),
32 /* Bits 22-31 reserved */
43 [FTCH_HPS] = BIT(5),
76 [ROUTE_DEF_PIPE] = GENMASK(5, 1),
80 /* Bits 22-23 reserved */
82 /* Bits 25-31 reserved */
97 /* Bits 8-31 reserved */
[all …]
|
| H A D | ipa_reg-v4.9.c | 1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (C) 2022-2024 Linaro Ltd. */
6 #include <linux/bits.h>
18 [IPA_QMB_SELECT_CONS_EN] = BIT(5),
35 /* Bits 25-29 reserved */
48 [FTCH_HPS] = BIT(5),
81 [ROUTE_DEF_PIPE] = GENMASK(5, 1),
85 /* Bits 22-23 reserved */
87 /* Bits 25-31 reserved */
102 /* Bits 8-31 reserved */
[all …]
|
| H A D | ipa_reg-v3.1.c | 1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (C) 2022-2024 Linaro Ltd. */
6 #include <linux/bits.h>
18 /* Bits 5-31 reserved */
29 [FTCH_HPS] = BIT(5),
41 /* Bits 17-31 reserved */
48 [ROUTE_DEF_PIPE] = GENMASK(5, 1),
52 /* Bits 22-23 reserved */
54 /* Bits 25-31 reserved */
69 /* Bits 8-31 reserved */
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/ |
| H A D | dc_dp_types.h | 50 LINK_RATE_LOW = 0x06, // Rate_1 (RBR) - 1.62 Gbps/Lane
51 LINK_RATE_RATE_2 = 0x08, // Rate_2 - 2.16 Gbps/Lane
52 LINK_RATE_RATE_3 = 0x09, // Rate_3 - 2.43 Gbps/Lane
53 LINK_RATE_HIGH = 0x0A, // Rate_4 (HBR) - 2.70 Gbps/Lane
54 LINK_RATE_RBR2 = 0x0C, // Rate_5 (RBR2) - 3.24 Gbps/Lane
55 LINK_RATE_RATE_6 = 0x10, // Rate_6 - 4.32 Gbps/Lane
56 LINK_RATE_HIGH2 = 0x14, // Rate_7 (HBR2) - 5.40 Gbps/Lane
57 LINK_RATE_RATE_8 = 0x19, // Rate_8 - 6.75 Gbps/Lane
58 LINK_RATE_HIGH3 = 0x1E, // Rate_9 (HBR3) - 8.10 Gbps/Lane
62 LINK_RATE_UHBR10 = 1000, // UHBR10 - 10.0 Gbps/Lane
[all …]
|
| /linux/drivers/net/ieee802154/ |
| H A D | mcr20a.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Driver for NXP MCR20A 802.15.4 Wireless-PAN Networking controller
50 /*------------------ 0x27 */
69 /*----------------------- 0x3A */
118 /*-------------------- 0x29 */
124 /*------------------ 0x2F */
128 /*------------------- 0x33 */
147 /*-------------------- 0x46 */
163 /*------------------- 0x56 */
164 /*------------------- 0x57 */
[all …]
|
| /linux/sound/soc/ti/ |
| H A D | omap-mcbsp-priv.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * OMAP Multi-Channel Buffered Serial Port
12 #include <linux/platform_data/asoc-ti-mcbsp.h>
51 /* OMAP1-OMAP2420 registers */
78 #define RINTM(value) (((value) & 0x3) << 4) /* bits 4:5 */
81 #define CLKSTP(value) (((value) & 0x3) << 11) /* bits 11:12 */
82 #define RJUST(value) (((value) & 0x3) << 13) /* bits 13:14 */
91 #define XINTM(value) (((value) & 0x3) << 4) /* bits 4:5 */
103 #define DX_STAT BIT(5)
115 #define RWDLEN1(value) (((value) & 0x7) << 5) /* Bits 5:7 */
[all …]
|
| /linux/arch/arc/include/asm/ |
| H A D | disasm.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
6 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
14 op_MAJOR_5 = 5, op_LD_ADD = 12, op_ADD_SUB_SHIFT = 13,
32 #define BITS(word, s, e) (((word) >> (s)) & (~((-2) << ((e) - (s))))) macro
34 #define MAJOR_OPCODE(word) (BITS((word), 27, 31))
35 #define MINOR_OPCODE(word) (BITS((word), 16, 21))
36 #define FIELD_A(word) (BITS((word), 0, 5))
37 #define FIELD_B(word) ((BITS((word), 12, 14)<<3) | \
38 (BITS((word), 24, 26)))
39 #define FIELD_C(word) (BITS((word), 6, 11))
[all …]
|
| /linux/include/linux/mfd/ |
| H A D | rohm-bd71815.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
9 * Author: yanglsh@embest-tech.com
32 /* LDO for Low-Power State Retention */
229 /* BD71815_REG_BUCK1_MODE bits */
242 /* BD71815_REG_BUCK1_VOLT_H bits */
249 /* BD71815_REG_BUCK2_VOLT_H bits */
256 /* LED enable bits at LED_CTRL reg */
262 /* BD71815_REG_LDO1_CTRL bits */
272 #define LDO1_LPSR_ON BIT(5)
286 #define LDO3_LPSR_ON BIT(5)
[all …]
|
| /linux/Documentation/devicetree/bindings/nvmem/ |
| H A D | mediatek,efuse.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Andrew-CT Chen <andrew-ct.chen@mediatek.com>
15 - Lala Lin <lala.lin@mediatek.com>
18 - $ref: nvmem.yaml#
19 - $ref: nvmem-deprecated-cells.yaml#
23 pattern: "^efuse@[0-9a-f]+$"
27 - items:
28 - enum:
[all …]
|
| /linux/drivers/scsi/ |
| H A D | BusLogic.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
6 Copyright 1995-1998 by Leonard N. Zubkoff <lnz@dandelion.com>
12 Special thanks to Wayne Yen, Jin-Lon Hon, and Alex Win of BusLogic, whose
160 (adapter->adapter_type == BLOGIC_MULTIMASTER)
163 (adapter->adapter_type == BLOGIC_FLASHPOINT)
183 BLOGIC_MCA_BUS = 5
189 BLOGIC_VESA_BUS, /* BT-4xx */
190 BLOGIC_ISA_BUS, /* BT-5xx */
191 BLOGIC_MCA_BUS, /* BT-6xx */
192 BLOGIC_EISA_BUS, /* BT-7xx */
[all …]
|
| H A D | myrb.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
8 * Copyright 1998-2001 by Leonard N. Zubkoff <lnz@dandelion.com>
164 unsigned int rsvd1:24; /* Bytes 1-3 */
165 unsigned int ldev_sizes[32]; /* Bytes 4-131 */
166 unsigned short flash_age; /* Bytes 132-133 */
170 unsigned char rsvd2:6; /* Byte 134 Bits 2-7 */
189 unsigned short ev_seq; /* Bytes 142-143 */
191 unsigned int rsvd5:24; /* Bytes 145-147 */
196 unsigned char rsvd7:3; /* Byte 151 Bits 0-2 */
198 unsigned char rsvd8:4; /* Byte 151 Bits 4-7 */
[all …]
|
| /linux/sound/aoa/codecs/ |
| H A D | onyx.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
15 * -1 (0dB) to -127 (-63.0 dB) or others (muted) */
23 # define ONYX_ADPSV (1<<5)
34 # define ONYX_DIGDEEMPH_SHIFT 5
39 # define ONYX_ROLLOFF_FAST (1<<5)
46 # define ONYX_ADC_INPUT_MIC (1<<5)
47 /* 8 + input gain in dB, valid range for input gain is -4 .. 20 dB */
56 /* bits 1-5 control channel bits 1-5 */
60 /* controls channel bits 8-15 */
63 /* control channel bits 24-29, high 2 bits reserved */
[all …]
|
| /linux/arch/arm/mach-omap2/ |
| H A D | prcm-common.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
8 * Copyright (C) 2007-2009, 2011 Texas Instruments, Inc.
9 * Copyright (C) 2007-2009 Nokia Corporation
30 /* Chip-specific module offsets */
37 #define OMAP3430_IVA2_MOD -0x800
66 /* 24XX register bits shared between CM & PRM registers */
68 /* CM_FCLKEN1_CORE, CM_ICLKEN1_CORE, PM_WKEN1_CORE shared bits */
101 #define OMAP24XX_EN_GPT3_SHIFT 5
102 #define OMAP24XX_EN_GPT3_MASK (1 << 5)
108 /* CM_FCLKEN2_CORE, CM_ICLKEN2_CORE, PM_WKEN2_CORE shared bits */
[all …]
|