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/linux/sound/soc/codecs/
H A Dlm49453.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * lm49453.c - LM49453 ALSA Soc Audio driver
23 #include <sound/soc-dapm.h>
35 { 4, 0x00 },
227 SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACHPL1_REG, 0, 1, 0),
228 SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACHPL1_REG, 1, 1, 0),
229 SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACHPL1_RE
[all...]
H A Disabelle.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * isabelle.c - Low power high fidelity audio codec driver
22 #include <sound/soc-dapm.h>
36 { 4, 0x00 },
147 SOC_ENUM_SINGLE(ISABELLE_AUDIO_HPF_CFG_REG, 4,
194 ISABELLE_AMIC_CFG_REG, 4,
233 SOC_DAPM_SINGLE("DAC1L Playback Switch", ISABELLE_HSDRV_CFG1_RE
[all...]
H A Dwm8974.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm8974.c -- WM8974 ALSA Soc Audio driver
5 * Copyright 2006-2009 Wolfson Microelectronics PLC.
34 { 4, 0x0050 }, { 5, 0x0000 }, { 6, 0x0140 }, { 7, 0x0000 },
55 static const char *wm8974_companding[] = {"Off", "NC", "u-law", "A-la
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H A Dwm8510.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm8510.c -- WM8510 ALSA Soc Audio driver
37 { 4, 0x0050 },
94 switch (reg) { in wm8510_volatile()
112 static const char *wm8510_companding[] = { "Off", "NC", "u-law", "A-law" };
117 SOC_ENUM_SINGLE(WM8510_COMP, 1, 4, wm8510_companding), /* adc */
118 SOC_ENUM_SINGLE(WM8510_COMP, 3, 4, wm8510_companding), /* dac */
119 SOC_ENUM_SINGLE(WM8510_DAC, 4, 4, wm8510_deemp),
125 SOC_SINGLE("Digital Loopback Switch", WM8510_COMP, 0, 1, 0),
130 SOC_ENUM("Playback De-emphasis", wm8510_enum[2]),
[all …]
H A Dak4535.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * ak4535.c -- AK4535 ALSA Soc Audio driver
42 { 4, 0x02 },
57 switch (reg) { in ak4535_volatile()
65 static const char *ak4535_mono_gain[] = {"+6dB", "-17dB"};
66 static const char *ak4535_mono_out[] = {"(L + R)/2", "Hi-
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H A Dwm8940.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm8940.c -- WM8940 ALSA Soc Audio driver
48 switch (reg) { in wm8940_volatile_register()
58 switch (reg) { in wm8940_readable_register()
126 { 0x16, 0x0000 }, /* Notch Filter 4 Control 1 */
127 { 0x17, 0x0000 }, /* Notch Filter 4 Contro
[all...]
H A Dtlv320aic3x.c1 // SPDX-License-Identifier: GPL-2.0-only
16 * ---------------------------------------
17 * MONO_LOUT -> N/A | MONO_LOUT -> N/A
18 * | IN1L -> LINE1L
19 * | IN1R -> LINE1R
20 * | IN2L -> LINE2L
21 * | IN2R -> LINE2R
22 * | MIC3L/R -> N/A
25 * ---------------------------------------
51 #define AIC3X_NUM_SUPPLIES 4
[all …]
H A Dwm8753.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * wm8753.c -- WM8753 ALSA Soc Audio driver
5 * Copyright 2003-11 Wolfson Microelectronics PLC.
12 * Dual DAI:-
23 * Fast DAI switching:-
25 * The driver can now fast switch between the DAI configurations via a
156 static const char *wm8753_treble[] = {"8kHz", "4kHz"};
165 static const char *wm8753_line_mix[] = {"Line 1 + 2", "Line 1 - 2",
170 static const char *wm8753_rxmsel[] = {"RXP - RXN", "RXP + RXN", "RXP", "RXN"};
177 static const char *wm8753_radcsel[] = {"PGA", "Line or RXP-RXN", "Sidetone"};
[all …]
H A Dwm9090.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2009-12 Wolfson Microelectronics
25 { 1, 0x0006 }, /* R1 - Power Management (1) */
26 { 2, 0x6000 }, /* R2 - Power Management (2) */
27 { 3, 0x0000 }, /* R3 - Power Management (3) */
28 { 6, 0x01C0 }, /* R6 - Clocking 1 */
29 { 22, 0x0003 }, /* R22 - IN
[all...]
H A Dwm8770.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm8770.c -- WM8770 ALSA SoC Audio driver
40 { 4, 0x7f },
71 switch (reg) { in wm8770_volatile_reg()
104 regcache_mark_dirty(wm8770->regmap); \
113 static const DECLARE_TLV_DB_SCALE(adc_tlv, -1200, 100, 0);
114 static const DECLARE_TLV_DB_SCALE(dac_dig_tlv, -12750, 50, 1);
115 static const DECLARE_TLV_DB_SCALE(dac_alg_tlv, -12700, 100, 1);
127 SOC_ENUM_DOUBLE(WM8770_DACPHASE, 4, 5, 2, dac_phase_text[2]),
135 SOC_SINGLE("DAC Playback Switch", WM8770_DACMUTE, 4, 1, 1),
[all …]
H A Dcs4234.c1 // SPDX-License-Identifier: GPL-2.0-only
2 // cs4234.c -- ALSA SoC CS4234 driver
43 /* -89.92dB to +6.02dB with step of 0.38dB */
44 static const DECLARE_TLV_DB_SCALE(dac_tlv, -8992, 38, 0);
71 "1x", "4x", "16x", "64x",
77 "1x", "2x", "4x", "8x", "16x", "32x", "64x", "128x",
95 regmap_read(cs4234->regmap, CS4234_ADC_CTRL2, &val); in cs4234_dac14_grp_delay_put()
97 ret = -EBUSY; in cs4234_dac14_grp_delay_put()
98 dev_err(component->dev, "Can't change group delay while ADC are ON\n"); in cs4234_dac14_grp_delay_put()
102 regmap_read(cs4234->regmap, CS4234_DAC_CTRL4, &val); in cs4234_dac14_grp_delay_put()
[all …]
H A Dcs4265.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * cs4265.c -- CS4265 ALSA SoC audio driver
25 #include <sound/soc-dapm.h>
58 switch (reg) { in cs4265_readable_register()
68 switch (reg) { in cs4265_volatile_register()
76 static DECLARE_TLV_DB_SCALE(pga_tlv, -1200, 50, 0);
78 static DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 0);
122 SOC_DAPM_SINGLE("Switch", CS4265_SIG_SEL, 1, 1, 0);
125 SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 0, 0);
128 SOC_DAPM_SINGLE("Switch", CS4265_PWRCTL, 1, 1, 0);
[all …]
H A Dmax98520.c1 // SPDX-License-Identifier: GPL-2.0
72 struct snd_soc_component *component = codec_dai->component; in max98520_dai_set_fmt()
78 dev_dbg(component->dev, "%s: fmt 0x%08X\n", __func__, fmt); in max98520_dai_set_fmt()
80 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { in max98520_dai_set_fmt()
87 dev_err(component->dev, "DAI invert mode unsupported\n"); in max98520_dai_set_fmt()
88 return -EINVAL; in max98520_dai_set_fmt()
91 regmap_update_bits(max98520->regmap, in max98520_dai_set_fmt()
97 switch (fm in max98520_dai_set_fmt()
[all...]
H A Dmax98090.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * max98090.c -- MAX98090 ALSA SoC Audio driver
5 * Copyright 2011-2012 Maxim Integrated Products
59 { 0x20, 0x00 }, /* 20 Any Clock 4 */
103 { 0x4A, 0x00 }, /* 4A Equalizer Band 1 Coefficient B1 */
104 { 0x4B, 0x00 }, /* 4B Equalizer Band 1 Coefficient B1 */
105 { 0x4C, 0x00 }, /* 4C Equalizer Band 1 Coefficient B2 */
106 { 0x4D, 0x00 }, /* 4D Equalizer Band 1 Coefficient B2 */
107 { 0x4E, 0x00 }, /* 4E Equalizer Band 1 Coefficient B2 */
108 { 0x4F, 0x00 }, /* 4F Equalizer Band 1 Coefficient A1 */
[all …]
/linux/drivers/soc/fsl/qe/
H A Ducc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * QE UCC API Set - UCC specific routines implementations.
33 if (ucc_num > UCC_MAX_NUM - 1) in ucc_set_qe_mux_mii_mng()
34 return -EINVAL; in ucc_set_qe_mux_mii_mng()
37 qe_clrsetbits_be32(&qe_immr->qmx.cmxgcr, QE_CMXGCR_MII_ENET_MNG, in ucc_set_qe_mux_mii_mng()
50 * 'ucc_num' is the UCC number, from 0 - 7.
61 switch (ucc_num) { in ucc_set_type()
62 case 0: guemr = &qe_immr->ucc1.slow.guemr; in ucc_set_type()
64 case 1: guemr = &qe_immr->ucc2.slow.guemr; in ucc_set_type()
66 case 2: guemr = &qe_immr->ucc3.slow.guemr; in ucc_set_type()
[all …]
/linux/sound/soc/sunxi/
H A Dsun50i-codec-analog.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org>
10 * Based on sun8i-codec-analog.c
21 #include <sound/soc-dapm.h>
24 #include "sun8i-adda-pr-regmap.h"
35 #define SUN50I_ADDA_OL_MIX_CTRL_PHONE 4
44 #define SUN50I_ADDA_OR_MIX_CTRL_PHONE 4
51 #define SUN50I_ADDA_EARPIECE_CTRL0_EAR_RAMP_TIME 4
63 #define SUN50I_ADDA_LINEOUT_CTRL0_RSRC_SEL 4
69 #define SUN50I_ADDA_MIC1_CTRL_MIC1G 4
[all …]
H A Dsun8i-codec-analog.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright 2016 Chen-Yu Tsai <wens@csie.org>
17 #include <sound/soc-dapm.h>
20 #include "sun8i-adda-pr-regma
[all...]
/linux/Documentation/sound/cards/
H A Dcmipci.rst2 Brief Notes on C-Media 8338/8738/8768/8770 Driver
8 Front/Rear Multi-channel Playback
9 ---------------------------------
13 DACs, both streams are handled independently unlike the 4/6ch multi-
17 card#0) for front and 4/6ch playbacks, while the second PCM device
22 - The first DAC supports U8 and S16LE formats, while the second DAC
24 - The second DAC supports only two channel stereo.
30 The rear output can be heard only when "Four Channel Mode" switch is
35 When "Four Channel Mode" switch is off, the output from rear speakers
38 before your turn off this switch.
[all …]
/linux/Documentation/devicetree/bindings/net/dsa/
H A Dmediatek,mt7530.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Arınç ÜNAL <arinc.unal@arinc9.com>
11 - Landen Chao <Landen.Chao@mediatek.com>
12 - DENG Qingfang <dqfext@gmail.com>
13 - Sean Wang <sean.wang@mediatek.com>
14 - Daniel Golle <daniel@makrotopia.org>
17 There are three versions of MT7530, standalone, in a multi-chip module and
18 built-into a SoC.
[all …]
/linux/Documentation/trace/
H A Deprobetrace.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Eprobe - Event-based Probe Tracing
9 - Written for v6.17
24 -------------------------
28 -:[EGRP/][EEVENT] : Clear a probe
39 @SYM[+|-offs] : Fetch memory at SYM +|- offs (SYM should be a data symbol)
41 +|-[u]OFFS(FETCHARG) : Fetch memory at FETCHARG +|- OFFS address.(\*3)(\*4)
49 (STRUCT)FIELD->MEMBER[->MEMBER] : If BTF is supported, typecast FIELD to
51 ->MEMBER. Note that when this is used, the FIELD name does not
56 (STRUCT)(FETCHARG)->MEMBER[->MEMBER] : typecast can nest, so the above can
[all …]
/linux/Documentation/sound/codecs/
H A Dtas675x.rst1 .. SPDX-License-Identifier: GPL-2.0
8 4-channel amplifier driver.
17 --------------------
30 PVDD Foldback, Clip Detect) and Real-Time Load Diagnostics unavailable.
33 Reduced latency. Real-Time Load Diagnostics unavailable.
36 ``Thermal Foldback Switch``, ``PVDD Foldback Switch``,
37 ``DC Blocker Bypass Switch``, ``Clip Detect Switch``, ``Audio SDOUT Switch``.
40 ``CHx RTLDG Switch``, ``RTLDG Clip Mask Switch``, ``ISENSE Calibration Switch``,
48 ----------------------
53 :Range: -15.5 dB to 0 dB (0.5 dB steps)
[all …]
/linux/arch/parisc/math-emu/
H A Dfpudispatch.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Linux/PA-RISC Project (http://www.parisc-linux.org/)
5 * Floating-point emulation code
6 * Copyright (C) 2001 Hewlett-Packard (Paul Bame) <bame@debian.org>
52 #define extru(r,pos,len) (((r) >> (31-(pos))) & (( 1 << (len)) - 1))
73 * the following are for the multi-ops
106 * positions 21-22
111 * located at bit positions 16-18
116 * at bit positions 15-16 (PA1.1) or 14-16 (PA2.0)
160 /* on pa-linux the fpu type is not filled in by the in parisc_linux_get_fpu_type()
[all …]
/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-facebook-minipack.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "ast2500-facebook-netbmc-common.dtsi"
9 compatible = "facebook,minipack-bmc", "aspeed,ast2500";
23 * i2c switch 2-0070, pca9548, 8 child channels assigned
24 * with bus number 16-23.
36 * i2c switch 8-0070, pca9548, 8 child channels assigned
37 * with bus number 24-31.
49 * i2c switch 9-0070, pca9548, 8 child channels assigned
50 * with bus number 32-39.
[all …]
/linux/sound/soc/mediatek/mt8186/
H A Dmt8186-dai-hostless.c1 // SPDX-License-Identifier: GPL-2.0
8 #include "mt8186-afe-common.h"
14 .period_bytes_max = 4 * 48 * 1024,
17 .buffer_bytes_max = 4 * 48 * 1024,
24 {"ADDA_DL_CH1", "ADDA_UL_CH1 Switch", "Hostless LPBK DL"},
25 {"ADDA_DL_CH1", "ADDA_UL_CH2 Switch", "Hostless LPBK DL"},
26 {"ADDA_DL_CH2", "ADDA_UL_CH1 Switch", "Hostless LPBK DL"},
27 {"ADDA_DL_CH2", "ADDA_UL_CH2 Switch", "Hostless LPBK DL"},
28 {"I2S1_CH1", "ADDA_UL_CH1 Switch", "Hostless LPBK DL"},
29 {"I2S1_CH2", "ADDA_UL_CH2 Switch", "Hostless LPBK DL"},
[all …]
/linux/drivers/phy/freescale/
H A Dphy-fsl-lynx-10g.c1 // SPDX-License-Identifier: GPL-2.0+
2 /* Copyright 2021-2026 NXP */
13 #include "phy-fsl-lynx-core.h"
28 #define SGMII_CFG(id) (28 - (id) * 4)
29 #define QSGMII_CFG(id) (28 - (id) * 4)
30 #define SXGMII_CFG(id) (28 - (id) * 4)
31 #define QXGMII_CFG(id) (12 - (id) * 4)
32 #define XFI_CFG(id) (28 - (id) * 4)
34 #define CR(x) ((x) * 4)
40 #define E 4
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