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/linux/arch/riscv/net/
H A Dbpf_jit.h28 RV_REG_GP = 3, /* Global pointer */
232 static inline u32 rv_r_insn(u8 funct7, u8 rs2, u8 rs1, u8 funct3, u8 rd, in rv_r_insn() argument
236 (rd << 7) | opcode; in rv_r_insn()
239 static inline u32 rv_i_insn(u16 imm11_0, u8 rs1, u8 funct3, u8 rd, u8 opcode) in rv_i_insn() argument
241 return (imm11_0 << 20) | (rs1 << 15) | (funct3 << 12) | (rd << 7) | in rv_i_insn()
262 static inline u32 rv_u_insn(u32 imm31_12, u8 rd, u8 opcode) in rv_u_insn() argument
264 return (imm31_12 << 12) | (rd << 7) | opcode; in rv_u_insn()
267 static inline u32 rv_j_insn(u32 imm20_1, u8 rd, u8 opcode) in rv_j_insn() argument
274 return (imm << 12) | (rd << 7) | opcode; in rv_j_insn()
278 u8 funct3, u8 rd, u8 opcode) in rv_amo_insn() argument
[all …]
/linux/arch/x86/crypto/
H A Dserpent-sse2-i586-asm_32.S30 #define RD %xmm3 macro
49 get_key(i, 3, x4); \
59 pslld $3, x2; \
60 psrld $(32 - 3), x4; \
68 pslld $3, x4; \
84 get_key(i, 3, RT0); \
124 pslld $3, x4; \
133 psrld $3, x2; \
134 pslld $(32 - 3), x4; \
472 movdqu (3*4*4)(in), x3; \
[all …]
H A Dserpent-sse2-x86_64-asm_64.S381 get_key(i, 3, RK3); \
398 pslld $3, x2 ## 1; \
399 psrld $(32 - 3), x4 ## 1; \
408 pslld $3, x2 ## 2; \
409 psrld $(32 - 3), x4 ## 2; \
417 pslld $3, x4 ## 1; \
427 pslld $3, x4 ## 2; \
431 get_key(i, 3, RK3); \
528 pslld $3, x4 ## 1; \
537 pslld $3, x4 ## 2; \
[all …]
H A Dserpent-avx2-asm_64.S21 .byte 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0
374 get_key(i, 3, RK3); \
389 vpslld $3, x2 ## 1, x4 ## 1; \
390 vpsrld $(32 - 3), x2 ## 1, x2 ## 1; \
397 vpslld $3, x2 ## 2, x4 ## 2; \
398 vpsrld $(32 - 3), x2 ## 2, x2 ## 2; \
404 vpslld $3, x0 ## 1, x4 ## 1; \
411 vpslld $3, x0 ## 2, x4 ## 2; \
414 get_key(i, 3, RK3); \
495 vpslld $3, x0 ## 1, x4 ## 1; \
[all …]
/linux/arch/loongarch/kernel/
H A Dinst.c18 unsigned int rd = insn.reg1i20_format.rd; in simu_pc() local
21 if (pc & 3) { in simu_pc()
28 regs->regs[rd] = pc + sign_extend64(imm << 2, 21); in simu_pc()
31 regs->regs[rd] = pc + sign_extend64(imm << 12, 31); in simu_pc()
34 regs->regs[rd] = pc + sign_extend64(imm << 18, 37); in simu_pc()
37 regs->regs[rd] = pc + sign_extend64(imm << 12, 31); in simu_pc()
38 regs->regs[rd] &= ~((1 << 12) - 1); in simu_pc()
50 unsigned int imm, imm_l, imm_h, rd, rj; in simu_branch() local
53 if (pc & 3) { in simu_branch()
90 rd = insn.reg2i16_format.rd; in simu_branch()
[all …]
/linux/arch/riscv/include/asm/
H A Dinsn-def.h32 .macro insn_r, opcode, func3, func7, rd, rs1, rs2
33 .insn r \opcode, \func3, \func7, \rd, \rs1, \rs2
36 .macro insn_i, opcode, func3, rd, rs1, simm12
37 .insn i \opcode, \func3, \rd, \rs1, \simm12
48 .macro insn_r, opcode, func3, func7, rd, rs1, rs2
52 (.L__gpr_num_\rd << INSN_R_RD_SHIFT) | \
57 .macro insn_i, opcode, func3, rd, rs1, simm12
60 (.L__gpr_num_\rd << INSN_I_RD_SHIFT) | \
84 #define __INSN_R(opcode, func3, func7, rd, rs1, rs2) \ argument
85 ".insn r " opcode ", " func3 ", " func7 ", " rd ", " rs
87 __INSN_I(opcode,func3,rd,rs1,simm12) global() argument
139 __INSN_R(opcode,func3,func7,rd,rs1,rs2) global() argument
144 __INSN_I(opcode,func3,rd,rs1,simm12) global() argument
158 INSN_R(opcode,func3,func7,rd,rs1,rs2) global() argument
162 INSN_I(opcode,func3,rd,rs1,simm12) global() argument
[all...]
/linux/include/linux/ceph/
H A Drados.h31 #define CEPH_MAXSNAP ((__u64)(-3)) /* largest valid snapid */
44 #define CEPH_OBJECT_LAYOUT_HASHINO 3
52 #define CEPH_PG_LAYOUT_HYBRID 3
87 #define CEPH_POOL_TYPE_EC 3
130 #define CEPH_OSD_NEW (1<<3) /* osd is new, never marked in */
151 #define CEPH_OSDMAP_PAUSEWR (1<<3) /* pause all writes */
206 f(READ, __CEPH_OSD_OP(RD, DATA, 1), "read") \
207 f(STAT, __CEPH_OSD_OP(RD, DATA, 2), "stat") \
208 f(MAPEXT, __CEPH_OSD_OP(RD, DATA, 3), "mapext") \
211 f(MASKTRUNC, __CEPH_OSD_OP(RD, DATA, 4), "masktrunc") \
[all …]
/linux/arch/arm/lib/
H A Dio-writesb.S10 .macro outword, rd argument
12 strb \rd, [r0]
13 mov \rd, \rd, lsr #8
14 strb \rd, [r0]
15 mov \rd, \rd, lsr #8
16 strb \rd, [r0]
17 mov \rd, \rd, lsr #8
18 strb \rd, [r0]
20 mov lr, \rd, lsr #24
22 mov lr, \rd, lsr #16
[all …]
H A Dio-writesw-armv4.S10 .macro outword, rd argument
12 strh \rd, [r0]
13 mov \rd, \rd, lsr #16
14 strh \rd, [r0]
16 mov lr, \rd, lsr #16
18 strh \rd, [r0]
32 ands r3, r1, #3
82 bmi 3f
94 3: movne ip, r3, lsr #8
/linux/arch/arm/mm/
H A Dalignment.c57 #define RD_BITS(i) ((i >> 12) & 15) /* Rd */
73 /* Thumb-2 32 bit format per ARMv7 DDI0406A A6.3, either f800h,e800h,f800h */
183 #define TYPE_DONE 3
205 "3: mov %0, #1\n" \
209 " .align 3\n" \
210 " .long 1b, 3b\n" \
262 "3:\n" \
266 " b 3b\n" \
269 " .align 3\n" \
297 ARM( "3: "ins" %1, [%2], #1\n" ) \
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/linux/arch/microblaze/kernel/
H A Dhw_exception_handler.S142 #define BSRLI2(rD, rA) \ argument
143 srl rD, rA; /* << 1 */ \
144 srl rD, rD; /* << 2 */
145 #define BSRLI4(rD, rA) \ argument
146 BSRLI2(rD, rA); \
147 BSRLI2(rD, rD)
148 #define BSRLI10(rD, rA) \ argument
149 srl rD, rA; /* << 1 */ \
150 srl rD, rD; /* << 2 */ \
151 srl rD, rD; /* << 3 */ \
[all …]
/linux/arch/arm/include/asm/
H A Dassembler.h203 * Assembly version of "adr rd, BSYM(sym)". This should only be used to
208 .macro badr\c, rd, sym
210 adr\c \rd, \sym + 1
212 adr\c \rd, \sym
220 .macro get_thread_info, rd
222 get_current \rd
251 .align 3; \
291 * register 'rd'
293 .macro this_cpu_offset, rd:req
295 ALT_SMP(mrc p15, 0, \rd, c13, c0, 4)
[all …]
/linux/arch/arm/net/
H A Dbpf_jit_32.h15 #define ARM_R3 3
51 #define SRTYPE_ROR 3
165 #define _AL3_R(op, rd, rn, rm) ((op ## _R) | (rd) << 12 | (rn) << 16 | (rm)) argument
167 #define _AL3_I(op, rd, rn, imm) ((op ## _I) | (rd) << 12 | (rn) << 16 | (imm)) argument
171 #define ARM_ADD_R(rd, rn, rm) _AL3_R(ARM_INST_ADD, rd, rn, rm) argument
172 #define ARM_ADDS_R(rd, rn, rm) _AL3_R(ARM_INST_ADDS, rd, rn, rm) argument
173 #define ARM_ADD_I(rd, rn, imm) _AL3_I(ARM_INST_ADD, rd, rn, imm) argument
174 #define ARM_ADDS_I(rd, rn, imm) _AL3_I(ARM_INST_ADDS, rd, rn, imm) argument
175 #define ARM_ADC_R(rd, rn, rm) _AL3_R(ARM_INST_ADC, rd, rn, rm) argument
176 #define ARM_ADC_I(rd, rn, imm) _AL3_I(ARM_INST_ADC, rd, rn, imm) argument
[all …]
/linux/arch/arm/mach-tegra/
H A Dsleep-tegra30.S59 #define CLK_RESET_PLLX_MISC3_IDDQ 3
77 #define PLLP_STORE_MASK (1 << 3)
83 .macro emc_device_mask, rd, base
84 ldr \rd, [\base, #EMC_ADR_CFG]
85 tst \rd, #0x1
86 moveq \rd, #(0x1 << 8) @ just 1 device
87 movne \rd, #(0x3 << 8) @ 2 devices
90 .macro emc_timing_update, rd, base
91 mov \rd, #1
92 str \rd, [\base, #EMC_TIMING_CONTROL]
[all …]
/linux/drivers/gpu/drm/msm/
H A Dmsm_rd.c9 * tail -f /sys/kernel/debug/dri/<minor>/rd > logfile.rd
18 * tail -f /sys/kernel/debug/dri/<minor>/hangrd > logfile.rd
45 MODULE_PARM_DESC(rd_full, "If true, $debugfs/.../rd will snapshot all buffer contents");
97 static void rd_write(struct msm_rd_state *rd, const void *buf, int sz) in rd_write() argument
99 struct circ_buf *fifo = &rd->fifo; in rd_write()
106 wait_event(rd->fifo_event, circ_space(&rd->fifo) > 0 || !rd->open); in rd_write()
107 if (!rd->open) in rd_write()
114 n = min(sz, circ_space_to_end(&rd->fifo)); in rd_write()
121 wake_up_all(&rd->fifo_event); in rd_write()
125 static void rd_write_section(struct msm_rd_state *rd, in rd_write_section() argument
[all …]
/linux/arch/arm/include/debug/
H A Dtegra.S84 and \rv, \rv, #3
85 cmp \rv, #2 @ 2 and 3 mean DCC, UART
87 cmp \rv, #3 @ so accept either
97 cmp \rv, #3 @ UART 3?
192 .macro senduart, rd, rx
194 strbne \rd, [\rx, #UART_TX << UART_SHIFT]
198 .macro busyuart, rd, rx
201 1001: ldrb \rd, [\rx, #UART_LSR << UART_SHIFT]
202 and \rd, \rd, #UART_LSR_THRE
203 teq \rd, #UART_LSR_THRE
[all …]
H A Domap2plus.S11 /* External port on Zoom2/3 */
63 .macro senduart,rd,rx
64 orr \rd, \rd, \rx, lsl #24 @ preserve LSR reg offset
66 strb \rd, [\rx] @ send lower byte of rd
67 orr \rx, \rx, \rd, lsr #24 @ restore original rx (LSR)
68 bic \rd, \rd, #(0xff << 24) @ restore original rd
71 .macro busyuart,rd,rx
72 1001: ldrb \rd, [\rx] @ rx contains UART_LSR address
73 and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
74 teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
[all …]
H A Dimx.S33 .macro senduart,rd,rx
34 ARM_BE8(rev \rd, \rd)
35 str \rd, [\rx, #0x40] @ TXDATA
38 .macro waituartcts,rd,rx
41 .macro waituarttxrdy,rd,rx
44 .macro busyuart,rd,rx
45 1002: ldr \rd, [\rx, #0x98] @ SR2
46 ARM_BE8(rev \rd, \rd)
47 tst \rd, #1 << 3 @ TXDC
H A Ddc21285.S27 .macro senduart,rd,rx
28 str \rd, [\rx, #0x160] @ UARTDR
31 .macro busyuart,rd,rx
32 1001: ldr \rd, [\rx, #0x178] @ UARTFLG
33 tst \rd, #1 << 3
37 .macro waituartcts,rd,rx
40 .macro waituarttxrdy,rd,rx
/linux/lib/crypto/powerpc/
H A Dsha1-powerpc-asm.S28 #define RB(t) ((((t)+3)%6)+7)
30 #define RD(t) ((((t)+1)%6)+7) macro
40 andc r0,RD(t),RB(t); \
53 andc r0,RD(t),RB(t); \
58 xor r5,W((t)+4-3),W((t)+4-8); \
70 xor r6,r6,RD(t); \
80 xor r6,r6,RD(t); \
82 xor r5,W((t)+4-3),W((t)+4-8); \
92 and r0,RB(t),RD(t); \
96 and r0,RC(t),RD(t); \
[all …]
/linux/kernel/sched/
H A Dtopology.c231 pr_info("rd %*pbl: Checking EAS, CPUs do not have asymmetric capacities\n", in sched_is_eas_possible()
240 pr_info("rd %*pbl: Checking EAS, SMT is not supported\n", in sched_is_eas_possible()
248 pr_info("rd %*pbl: Checking EAS: frequency-invariant load tracking not yet supported", in sched_is_eas_possible()
256 pr_info("rd %*pbl: Checking EAS: cpufreq is not ready\n", in sched_is_eas_possible()
407 * 3. no SMT is detected.
408 * 4. schedutil is driving the frequency of all CPUs of the rd;
416 struct root_domain *rd = cpu_rq(cpu)->rd; in build_perf_domains() local
440 tmp = rd->pd; in build_perf_domains()
441 rcu_assign_pointer(rd in build_perf_domains()
462 struct root_domain *rd = container_of(rcu, struct root_domain, rcu); free_rootdomain() local
474 rq_attach_root(struct rq * rq,struct root_domain * rd) rq_attach_root() argument
524 sched_get_rd(struct root_domain * rd) sched_get_rd() argument
529 sched_put_rd(struct root_domain * rd) sched_put_rd() argument
537 init_rootdomain(struct root_domain * rd) init_rootdomain() argument
592 struct root_domain *rd; alloc_rootdomain() local
746 cpu_attach_domain(struct sched_domain * sd,struct root_domain * rd,int cpu) cpu_attach_domain() argument
837 struct root_domain *rd; global() member
[all...]
/linux/arch/parisc/net/
H A Dbpf_jit_comp32.c59 #define NR_SAVED_REGISTERS (18 - 3 + 1 + 8)
78 [BPF_REG_1] = {HPPA_R(3), HPPA_R(4)},
120 static void emit_hppa_copy(const s8 rs, const s8 rd, struct hppa_jit_context *ctx) in emit_hppa_copy() argument
122 REG_SET_SEEN(ctx, rd); in emit_hppa_copy()
123 if (OPTIMIZE_HPPA && (rs == rd)) in emit_hppa_copy()
126 emit(hppa_copy(rs, rd), ctx); in emit_hppa_copy()
141 static void emit_imm(const s8 rd, s32 imm, struct hppa_jit_context *ctx) in emit_imm() argument
145 REG_SET_SEEN(ctx, rd); in emit_imm()
147 emit(hppa_ldi(imm, rd), ctx); in emit_imm()
150 emit(hppa_ldil(imm, rd), ctx); in emit_imm()
[all …]
H A Dbpf_jit_comp64.c70 static void emit_hppa_copy(const s8 rs, const s8 rd, struct hppa_jit_context *ctx) in emit_hppa_copy() argument
72 REG_SET_SEEN(ctx, rd); in emit_hppa_copy()
73 if (OPTIMIZE_HPPA && (rs == rd)) in emit_hppa_copy()
76 emit(hppa_copy(rs, rd), ctx); in emit_hppa_copy()
135 static void emit_imm32(u8 rd, s32 imm, struct hppa_jit_context *ctx) in emit_imm32() argument
139 REG_SET_SEEN(ctx, rd); in emit_imm32()
141 emit(hppa_ldi(imm, rd), ctx); in emit_imm32()
145 emit(hppa_ldo(lower, HPPA_REG_ZERO, rd), ctx); in emit_imm32()
148 emit(hppa_ldil(imm, rd), ctx); in emit_imm32()
151 emit(hppa_ldo(lower, rd, rd), ctx); in emit_imm32()
[all …]
/linux/drivers/clk/versatile/
H A Dicst.c22 const unsigned char icst307_s2div[8] = { 10, 2, 8, 4, 5, 7, 3, 6 };
41 const unsigned char icst307_idx2s[8] = { 1, 6, 3, 4, 7, 5, 2, 0 };
42 const unsigned char icst525_idx2s[8] = { 1, 3, 4, 7, 5, 2, 6, 0 };
51 unsigned int i = 0, rd, best = (unsigned int)-1; in icst_hz_to_vco() local
74 for (rd = p->rd_min; rd <= p->rd_max; rd++) { in icst_hz_to_vco()
79 fref_div = (2 * p->ref) / rd; in icst_hz_to_vco()
92 vco.r = rd - 2; in icst_hz_to_vco()
/linux/net/sunrpc/xprtrdma/
H A Dib_client.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
64 struct rpcrdma_device *rd = rpcrdma_get_client_data(device); in rpcrdma_rn_register() local
66 if (!rd || test_bit(RPCRDMA_RD_F_REMOVING, &rd->rd_flags)) in rpcrdma_rn_register()
79 if (xa_alloc(&rd->rd_xa, &rn->rn_index, rn, xa_limit_32b, GFP_KERNEL) < 0) { in rpcrdma_rn_register()
83 kref_get(&rd->rd_kref); in rpcrdma_rn_register()
90 struct rpcrdma_device *rd = container_of(kref, struct rpcrdma_device, in rpcrdma_rn_release() local
93 trace_rpcrdma_client_completion(rd->rd_device); in rpcrdma_rn_release()
94 complete(&rd->rd_done); in rpcrdma_rn_release()
109 struct rpcrdma_device *rd = rpcrdma_get_client_data(device); in rpcrdma_rn_unregister() local
111 if (!rd) in rpcrdma_rn_unregister()
[all …]

12345678910>>...29