Lines Matching +full:3 +full:rd
32 .macro insn_r, opcode, func3, func7, rd, rs1, rs2
33 .insn r \opcode, \func3, \func7, \rd, \rs1, \rs2
36 .macro insn_i, opcode, func3, rd, rs1, simm12
37 .insn i \opcode, \func3, \rd, \rs1, \simm12
48 .macro insn_r, opcode, func3, func7, rd, rs1, rs2
52 (.L__gpr_num_\rd << INSN_R_RD_SHIFT) | \
57 .macro insn_i, opcode, func3, rd, rs1, simm12
60 (.L__gpr_num_\rd << INSN_I_RD_SHIFT) | \
84 #define __INSN_R(opcode, func3, func7, rd, rs1, rs2) \ argument
85 ".insn r " opcode ", " func3 ", " func7 ", " rd ", " rs1 ", " rs2 "\n"
87 #define __INSN_I(opcode, func3, rd, rs1, simm12) \ argument
88 ".insn i " opcode ", " func3 ", " rd ", " rs1 ", " simm12 "\n"
100 " .macro insn_r, opcode, func3, func7, rd, rs1, rs2\n" \
104 " (.L__gpr_num_\\rd << " __stringify(INSN_R_RD_SHIFT) ") |" \
111 " .macro insn_i, opcode, func3, rd, rs1, simm12\n" \
114 " (.L__gpr_num_\\rd << " __stringify(INSN_I_RD_SHIFT) ") |" \
139 #define __INSN_R(opcode, func3, func7, rd, rs1, rs2) \ argument
141 "insn_r " opcode ", " func3 ", " func7 ", " rd ", " rs1 ", " rs2 "\n" \
144 #define __INSN_I(opcode, func3, rd, rs1, simm12) \ argument
146 "insn_i " opcode ", " func3 ", " rd ", " rs1 ", " simm12 "\n" \
158 #define INSN_R(opcode, func3, func7, rd, rs1, rs2) \ argument
160 RV_##rd, RV_##rs1, RV_##rs2)
162 #define INSN_I(opcode, func3, rd, rs1, simm12) \ argument
163 __INSN_I(RV_##opcode, RV_##func3, RV_##rd, \
196 RD(dest), RS1(addr), __RS2(3))
200 RD(dest), RS1(addr), __RS2(0))
205 RD(dest), RS1(addr), __RS2(0))
256 INSN_S(OPCODE_OP_IMM, FUNC3(6), __RS2(3), \