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/freebsd/sys/dev/irdma/
H A Dirdma_defs.h1 /*-
2 * SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB
4 * Copyright (c) 2015 - 2023 Intel Corporation
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
94 #define IRDMA_BYTE_32 32
181 ((IRDMA_QP_SW_MAX_WQ_QUANTA - IRDMA_SQ_RSVD) / (max_quanta_per_wr))
199 #define IRDMA_QP_WQE_MIN_SIZE 32
258 IRDMA_OP_MC_DESTROY = 32,
333 #define GENMASK_ULL(high, low) ((0xFFFFFFFFFFFFFFFFULL >> (64ULL - ((high) - (low) + 1ULL))) << (lo…
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H A Dirdma_uda_d.h1 /*-
2 * SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB
4 * Copyright (c) 2016 - 2021 Intel Corporation
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
67 #define IRDMA_UDA_QPSQ_EXTHDRLEN_S 32
68 #define IRDMA_UDA_QPSQ_EXTHDRLEN GENMASK_ULL(40, 32)
69 #define IRDMA_UDA_QPSQ_MULTICAST_S 63
70 #define IRDMA_UDA_QPSQ_MULTICAST BIT_ULL(63)
88 #define IRDMA_UDA_QPSQ_IMMDATA GENMASK_ULL(63, 0)
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/freebsd/contrib/netbsd-tests/include/
H A Dd_bitstring_64.out10 5 0 32 1
18 13 1 32 2
26 21 2 32 3
34 29 3 32 4
37 32 4 1 4
42 37 4 32 5
50 45 5 32 6
58 53 6 32 7
66 61 7 32 8
68 63 7 128 8
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H A Dd_bitstring_67.out10 5 0 32 1
18 13 1 32 2
26 21 2 32 3
34 29 3 32 4
37 32 4 1 4
42 37 4 32 5
50 45 5 32 6
58 53 6 32 7
66 61 7 32 8
68 63 7 128 8
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/freebsd/contrib/llvm-project/clang/lib/Headers/
H A Dfmaintrin.h1 /*===---- fmaintrin.h - FMA intrinsics -------------------------------------===
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
21 /// Computes a multiply-add of 128-bit vectors of [4 x float].
29 /// A 128-bit vector of [4 x float] containing the multiplicand.
31 /// A 128-bit vector of [4 x float] containing the multiplier.
33 /// A 128-bit vector of [4 x float] containing the addend.
34 /// \returns A 128-bit vector of [4 x float] containing the result.
41 /// Computes a multiply-add of 128-bit vectors of [2 x double].
49 /// A 128-bit vector of [2 x double] containing the multiplicand.
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H A Draointintrin.h1 /*===----------------------- raointintrin.h - RAOINT ------------------------===
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
20 /// Atomically add a 32-bit value at memory operand \a __A and a 32-bit \a __B,
31 /// A pointer to a 32-bit memory location.
33 /// A 32-bit integer value.
42 /// Atomically and a 32-bit value at memory operand \a __A and a 32-bit \a __B,
53 /// A pointer to a 32-bit memory location.
55 /// A 32-bit integer value.
64 /// Atomically or a 32-bit value at memory operand \a __A and a 32-bit \a __B,
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H A Dbmi2intrin.h1 /*===---- bmi2intrin.h - BMI2 intrinsics -----------------------------------===
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
20 /// Copies the unsigned 32-bit integer \a __X and zeroes the upper bits
26 /// IF i < 32
36 /// The 32-bit source value to copy.
39 /// \returns The partially zeroed 32-bit value.
46 /// Deposit (scatter) low-order bits from the unsigned 32-bit integer \a __X
47 /// into the 32-bit result, according to the mask in the unsigned 32-bit
66 /// The 32-bit source value to copy.
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/freebsd/sys/contrib/openzfs/module/icp/asm-ppc64/blake3/
H A Db3_ppc64le_sse2.S1 // SPDX-License-Identifier: CDDL-1.0
10 * or https://opensource.org/licenses/CDDL-1.0.
24 * Based on BLAKE3 v1.3.1, https://github.com/BLAKE3-team/BLAKE3
25 * Copyright (c) 2019-2022 Samuel Neves and Matthew Krupcale
26 * Copyright (c) 2022 Tino Reichardt <milky-zfs@mcmilk.de>
28 * This is converted assembly: SSE2 -> POWER8 PPC64 Little Endian
29 * Used tools: SIMDe https://github.com/simd-everywhere/simde
133 .short 32
264 addis 2, 12, .TOC.-.Lfunc_gep0@ha
265 addi 2, 2, .TOC.-.Lfunc_gep0@l
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H A Db3_ppc64le_sse41.S1 // SPDX-License-Identifier: CDDL-1.0
10 * or https://opensource.org/licenses/CDDL-1.0.
24 * Based on BLAKE3 v1.3.1, https://github.com/BLAKE3-team/BLAKE3
25 * Copyright (c) 2019-2022 Samuel Neves
26 * Copyright (c) 2022 Tino Reichardt <milky-zfs@mcmilk.de>
28 * This is converted assembly: SSE4.1 -> POWER8 PPC64 Little Endian
29 * Used tools: SIMDe https://github.com/simd-everywhere/simde
288 addis 2, 12, .TOC.-.Lfunc_gep0@ha
289 addi 2, 2, .TOC.-.Lfunc_gep0@l
291 .localentry zfs_blake3_compress_in_place_sse41, .Lfunc_lep0-.Lfunc_gep0
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/freebsd/tools/tools/nanobsd/
H A DFlashDevice.sub3 # Copyright (c) 2005 Poul-Henning Kamp.
62 NANO_SECTS=63
65 echo "Unknown Integral i-Pro Flash capacity"
76 NANO_SECTS=32
91 NANO_SECTS=63
104 # Document No. 20-10-00038
106 # Table 2-7
107 # NB: notice math error in SDCFJ-4096-388 line.
110 32|32mb)
113 NANO_SECTS=32
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/freebsd/contrib/ofed/libirdma/
H A Dirdma_defs.h1 /*-
2 * SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB
4 * Copyright (c) 2015 - 2023 Intel Corporation
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
42 #define IRDMA_BYTE_32 32
78 #define IRDMA_QP_WQE_MIN_SIZE 32
111 #define GENMASK_ULL(high, low) ((0xFFFFFFFFFFFFFFFFULL >> (64ULL - ((high) - (low) + 1ULL))) << (lo…
114 #define GENMASK(high, low) ((0xFFFFFFFFUL >> (32UL - ((high) - (low) + 1UL))) << (low))
122 #define IRDMA_CQPHC_QPCTX GENMASK_ULL(63, 0)
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/freebsd/contrib/netbsd-tests/ipf/regress/
H A Dp6.whois6 MICROSOFT CORPORATION (MICRO-101)
7 MICROSOFT CORPORATION (MICRO-97)
8 MICROSOFT CORPORATION (MICRO-100)
9 Microsoft Corporation (MICRO-111)
10 MICROSOFT CORPORATION (MICRO-117)
11 Microsoft Corporation (ZM23-ARIN) noc@microsoft.com +1-425-882-8080
12 Microsoft (ZM39-ARIN) noc@microsoft.com +1-425-882-8080
13 Microsoft Corp (AS8068) MICROSOFT-CORP---MSN-AS-BLOCK 8068 - 8075
15 Microsoft Corp (AS14719) MICROSOFT-CORP-BCENTRAL 14719
16 Microsoft Corp (AS3598) MICROSOFT-CORP-AS 3598
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/freebsd/sys/contrib/dev/rtw88/
H A Drtw8814a_table.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
14587 { 2, 0, 0, 0, 1, 32, },
14588 { 1, 0, 0, 0, 1, 32, },
14590 { 2, 0, 0, 0, 2, 32, },
14591 { 1, 0, 0, 0, 2, 32, },
14593 { 2, 0, 0, 0, 3, 32, },
14594 { 1, 0, 0, 0, 3, 32, },
14596 { 2, 0, 0, 0, 4, 32, },
14597 { 1, 0, 0, 0, 4, 32, },
14599 { 2, 0, 0, 0, 5, 32, },
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H A Drtw8821c_table.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2018-2019 Realtek Corporation
6026 { 0, 0, 0, 0, 2, 32, },
6029 { 3, 0, 0, 0, 2, 32, },
6032 { 6, 0, 0, 0, 2, 32, },
6034 { 8, 0, 0, 0, 2, 32, },
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/freebsd/tests/sys/sys/
H A Dtime_test.c1 /*-
36 #include <atf-c.h>
43 ATF_CHECK_MSG((expected) - 1 <= (actual) && actual <= (expected) + 1, in atf_check_nstosbt()
54 atf_check_nstosbt((1ll << 32) - 4, 999999999); in ATF_TC_BODY()
55 atf_check_nstosbt(1ll << 32, 1000000000); in ATF_TC_BODY()
57 atf_check_nstosbt((1ll << 33) - 4, 1999999999); in ATF_TC_BODY()
60 atf_check_nstosbt((1ll << 34) - 4, 3999999999); in ATF_TC_BODY()
63 atf_check_nstosbt(((1ll << 31) - 1) << 32, in ATF_TC_BODY()
64 ((1ll << 31) - 1) * 1000000000); in ATF_TC_BODY()
71 ATF_CHECK_MSG((expected) - 1 <= (actual) && actual <= (expected) + 1, in atf_check_ustosbt()
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/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVERegisterInfo.td1 //===-- VERegisterInfo.td - VE Register defs ---------------*- tablegen -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
16 let HWEncoding{15-7} = 0;
17 let HWEncoding{6-0} = enc;
24 let HWEncoding{15-6} = 0;
25 let HWEncoding{5-0} = enc;
32 let HWEncoding{15-8} = 0;
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/freebsd/crypto/openssl/test/recipes/15-test_ml_dsa_codecs_data/
H A Dprv-65-priv.txt1 ML-DSA-65 Private-Key:
7 1e:70:d2:37:1b:05:63:e3:cd:33:46:14:9c:8c:9e:
9 63:e3:86:63:da:a2:dd:db:6e:48:0d:c4:05:a1:e7:
15 66:86:43:32:44:41:22:04:36:38:66:75:02:82:36:
21 54:60:16:57:15:50:84:71:88:66:07:27:32:88:06:
24 11:66:06:55:86:47:18:36:88:63:50:38:47:86:11:
25 01:20:23:56:11:61:37:86:07:85:32:12:40:07:54:
27 67:78:56:38:43:44:30:63:26:10:77:07:31:78:42:
29 35:32:07:66:10:75:04:68:12:48:06:66:03:03:26:
34 70:57:72:58:83:34:60:38:42:32:85:68:10:06:04:
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H A Dprv-65-seed.txt1 ML-DSA-65 Private-Key:
11 1e:70:d2:37:1b:05:63:e3:cd:33:46:14:9c:8c:9e:
13 63:e3:86:63:da:a2:dd:db:6e:48:0d:c4:05:a1:e7:
19 66:86:43:32:44:41:22:04:36:38:66:75:02:82:36:
25 54:60:16:57:15:50:84:71:88:66:07:27:32:88:06:
28 11:66:06:55:86:47:18:36:88:63:50:38:47:86:11:
29 01:20:23:56:11:61:37:86:07:85:32:12:40:07:54:
31 67:78:56:38:43:44:30:63:26:10:77:07:31:78:42:
33 35:32:07:66:10:75:04:68:12:48:06:66:03:03:26:
38 70:57:72:58:83:34:60:38:42:32:85:68:10:06:04:
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/freebsd/contrib/bc/tests/bc/scripts/
H A Darray.txt33 32
64 63
139 32
170 63
214 -1
215 -2
216 -3
217 -4
218 -5
219 -6
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/freebsd/sys/dev/sfxge/common/
H A Defx_regs_ef10.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2007-2016 Solarflare Communications Inc.
48 * BIU_HW_REV_ID_REG(32bit):
57 #define ERF_DZ_HW_REV_ID_WIDTH 32
60 * BIU_MC_SFT_STATUS_REG(32bit):
71 #define ERF_DZ_MC_SFT_STATUS_WIDTH 32
74 * BIU_INT_ISR_REG(32bit):
83 #define ERF_DZ_ISR_REG_WIDTH 32
86 * MC_DB_LWRD_REG(32bit):
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/freebsd/sys/dts/arm/
H A Dimx53x.dtsi34 #address-cells = <1>;
35 #size-cells = <1>;
43 #address-cells = <1>;
44 #size-cells = <0>;
50 d-cache-line-size = <32>;
51 i-cache-line-size = <32>;
52 d-cache-size = <0x8000>;
53 i-cache-size = <0x8000>;
54 l2-cache-line-size = <32>;
55 l2-cache-line = <0x40000>;
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/freebsd/crypto/openssl/crypto/perlasm/
H A Dsparcv9_modes.pl2 # Copyright 2012-2025 The OpenSSL Project Authors. All Rights Reserved.
18 # store" which cancels "read" in "read-update-write" on cache lines.
21 # usual benchmarks, on the contrary you can notice that single-thread
31 for (@_) { $::abibits=64 if (/\-m64/ || /\-xarch\=v9/); }
46 .align 32
48 save %sp, -$::frame, %sp
74 prefetch [$inp + 63], 20
113 prefetch [$out + 63], 22
114 prefetch [$inp + 16+63], 20
145 2: ldxa [$inp]0x82, %o0 ! avoid read-after-write hazard
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/freebsd/tests/sys/cddl/zfs/tests/txg_integrity/
H A Dtxg_integrity.c23 * Copyright 2011-2012 Spectra Logic. All rights reserved.
28 * Verify the integrity of non-aligned writes to the same blocks that cross
31 * This test verifies that non-aligned writes are correctly committed to the
37 * Create a 32MB file.
39 * * A partition of the 32MB range into 64 different non-overlapping chunks.
41 * * A selection of 32 chunks that will be written by the follower.
89 //between chunk n and chunk n-1 is (FSIZE * partitions[n-1] / (1<<31) .
90 //partitions[-1] is understood to be 0 and partitions[NUM_CHUNKS] must be 1.0
110 *begin = (uint32_t)((uint64_t)FSIZE * (uint64_t)pat->partitions[chunk - 1] >> 31); in get_chunk_range()
112 *end = (uint32_t)((uint64_t)FSIZE * (uint64_t)pat->partitions[chunk] >> 31); in get_chunk_range()
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H A Dfsync_integrity.c28 * Verify the integrity of non-aligned writes to the same blocks within the same
29 * transaction group, where an fsync is issued by a non-final writer.
45 * Create a big zero-filled file.
47 * * A partition of the file range into 64 different non-overlapping chunks.
51 * Create one binary semaphore per chunk, per (n-1) threads
61 * Every even-numbered thread, starting with the first (0th), will fsync()
62 * the file after its write. The final thread, being odd-numbered,
97 //between chunk n and chunk n-1 is (FSIZE * partitions[n-1] / (1<<31) .
98 //partitions[-1] is understood to be 0 and partitions[NUM_CHUNKS] must be 1.0
120 *begin = (uint32_t)((uint64_t)FSIZE * (uint64_t)pat->partitions[chunk - 1] >> 31); in get_chunk_range()
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/freebsd/contrib/llvm-project/compiler-rt/lib/fuzzer/
H A DFuzzerBuiltinsMsvc.h1 //===- FuzzerBuiltinsMSVC.h - Internal header for builtins ------*- C++ -* ===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 //===----------------------------------------------------------------------===//
36 // compiler-rt/lib/builtins/int_lib.h which defines the __builtin functions used
42 // Scan the high 32 bits. in Clzll()
43 if (_BitScanReverse(&LeadZeroIdx, static_cast<unsigned long>(X >> 32))) in Clzll()
45 63 - (LeadZeroIdx + 32)); // Create a bit offset from the MSB. in Clzll()
46 // Scan the low 32 bits. in Clzll()
48 return static_cast<int>(63 - LeadZeroIdx); in Clzll()
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