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/linux/scripts/gdb/linux/
H A Dpgtable.py1 # SPDX-License-Identifier: GPL-2.0-only
44 return (bit_start, bit_end), data >> bit_start & ((1 << (1 + bit_end - bit_start)) - 1)
53 return 30
80 {'cr3 binary data': <30} {hex(self.cr3)}
81 {'next entry physical address': <30} {hex(self.next_entry_physical_address)}
82 ---
83 …{'bit' : <4} {self.page_level_write_through[0]: <10} {'page level write through': <30} {self.page_…
84 …{'bit' : <4} {self.page_level_cache_disabled[0]: <10} {'page level cache disabled': <30} {self.pag…
140 next_level = self.page_hierarchy_level - 1
148 {'entry address': <30} {hex(self.address)}
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/linux/arch/alpha/lib/
H A Ddivide.S1 /* SPDX-License-Identifier: GPL-2.0 */
14 * __divqu: 64-bit unsigned long divide
15 * __remqu: 64-bit unsigned long remainder
16 * __divqs/__remqs: signed 64-bit
17 * __divlu/__remlu: unsigned 32-bit
18 * __divls/__remls: signed 32-bit
27 * This is a rather simple bit-at-a-time algorithm: it's very good
28 * at dividing random 64-bit numbers, but the more usual case where
37 * $0 - current bit
38 * $1 - shifted divisor
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H A Dev6-divide.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * arch/alpha/lib/ev6-divide.S
5 * 21264 version contributed by Rick Gorton <rick.gorton@alpha-processor.com>
14 * __divqu: 64-bit unsigned long divide
15 * __remqu: 64-bit unsigned long remainder
16 * __divqs/__remqs: signed 64-bit
17 * __divlu/__remlu: unsigned 32-bit
18 * __divls/__remls: signed 32-bit
27 * This is a rather simple bit-at-a-time algorithm: it's very good
28 * at dividing random 64-bit numbers, but the more usual case where
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/linux/drivers/net/wireless/mediatek/mt76/
H A Dmt76_connac2_mac.h1 /* SPDX-License-Identifier: ISC */
45 #define MT_TX_FREE_MSDU_ID GENMASK(30, 16)
46 #define MT_TX_FREE_PAIR BIT(31)
55 #define MT_TXD1_LONG_FORMAT BIT(31)
56 #define MT_TXD1_TGID BIT(30)
58 #define MT_TXD1_AMSDU BIT(23)
63 #define MT_TXD1_ETH_802_3 BIT(15)
64 #define MT_TXD1_VTA BIT(10)
67 #define MT_TXD2_FIX_RATE BIT(31)
68 #define MT_TXD2_FIXED_RATE BIT(30)
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H A Dmt76_connac3_mac.h1 /* SPDX-License-Identifier: ISC */
28 #define MT_RXD0_MESH BIT(18)
29 #define MT_RXD0_MHCP BIT(19)
38 #define MT_RXD1_NORMAL_GROUP_1 BIT(16)
39 #define MT_RXD1_NORMAL_GROUP_2 BIT(17)
40 #define MT_RXD1_NORMAL_GROUP_3 BIT(18)
41 #define MT_RXD1_NORMAL_GROUP_4 BIT(19)
42 #define MT_RXD1_NORMAL_GROUP_5 BIT(20)
44 #define MT_RXD1_NORMAL_CM BIT(23)
45 #define MT_RXD1_NORMAL_CLM BIT(24)
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H A Dmt76x02_dma.h1 /* SPDX-License-Identifier: ISC */
13 #define MT_TXD_INFO_NEXT_VLD BIT(16)
14 #define MT_TXD_INFO_TX_BURST BIT(17)
15 #define MT_TXD_INFO_80211 BIT(19)
16 #define MT_TXD_INFO_TSO BIT(20)
17 #define MT_TXD_INFO_CSO BIT(21)
18 #define MT_TXD_INFO_WIV BIT(24)
21 #define MT_TXD_INFO_TYPE GENMASK(31, 30)
24 #define MT_RX_FCE_INFO_SELF_GEN BIT(15)
27 #define MT_RX_FCE_INFO_PCIE_INTR BIT(24)
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/linux/drivers/net/wireless/realtek/rtw89/
H A Dtxrx.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
28 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) in rtw89_get_data_rate_mode()
41 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) in rtw89_get_data_ht_mcs()
49 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) in rtw89_get_data_mcs()
62 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) in rtw89_get_data_nss()
71 #define RTW89_TXWD_BODY0_MORE_DATA BIT(23)
72 #define RTW89_TXWD_BODY0_WD_INFO_EN BIT(22)
73 #define RTW89_TXWD_BODY0_FW_DL BIT(20)
76 #define RTW89_TXWD_BODY0_WD_PAGE BIT(7)
77 #define RTW89_TXWD_BODY0_HW_AMSDU BIT(5)
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/linux/drivers/net/wireless/mediatek/mt76/mt7615/
H A Dmac.h1 /* SPDX-License-Identifier: ISC */
15 #define MT_RXD0_NORMAL_IP_SUM BIT(23)
16 #define MT_RXD0_NORMAL_UDP_TCP_SUM BIT(24)
17 #define MT_RXD0_NORMAL_GROUP_1 BIT(25)
18 #define MT_RXD0_NORMAL_GROUP_2 BIT(26)
19 #define MT_RXD0_NORMAL_GROUP_3 BIT(27)
20 #define MT_RXD0_NORMAL_GROUP_4 BIT(28)
25 #define MT_RXD1_MID_AMSDU_FRAME BIT(1)
26 #define MT_RXD1_LAST_AMSDU_FRAME BIT(0)
27 #define MT_RXD1_NORMAL_HDR_TRANS BIT(23)
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/linux/drivers/net/wireless/mediatek/mt76/mt7603/
H A Dmac.h1 /* SPDX-License-Identifier: ISC */
10 #define MT_RXD0_NORMAL_IP_SUM BIT(23)
11 #define MT_RXD0_NORMAL_UDP_TCP_SUM BIT(24)
12 #define MT_RXD0_NORMAL_GROUP_1 BIT(25)
13 #define MT_RXD0_NORMAL_GROUP_2 BIT(26)
14 #define MT_RXD0_NORMAL_GROUP_3 BIT(27)
15 #define MT_RXD0_NORMAL_GROUP_4 BIT(28)
29 #define MT_RXD1_NORMAL_HDR_TRANS BIT(23)
30 #define MT_RXD1_NORMAL_HDR_OFFSET BIT(22)
34 #define MT_RXD1_NORMAL_BEACON_UC BIT(5)
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H A Dregs.h1 /* SPDX-License-Identifier: ISC */
28 #define MT_INT_RX_DONE(_n) BIT(_n)
31 #define MT_INT_TX_DONE(_n) BIT((_n) + 4)
33 #define MT_INT_RX_COHERENT BIT(20)
34 #define MT_INT_TX_COHERENT BIT(21)
35 #define MT_INT_MAC_IRQ3 BIT(27)
37 #define MT_INT_MCU_CMD BIT(30)
40 #define MT_WPDMA_GLO_CFG_TX_DMA_EN BIT(0)
41 #define MT_WPDMA_GLO_CFG_TX_DMA_BUSY BIT(1)
42 #define MT_WPDMA_GLO_CFG_RX_DMA_EN BIT(2)
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/linux/drivers/media/platform/samsung/s3c-camif/
H A Dcamif-regs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
14 #include "camif-core.h"
15 #include <media/drv-intf/s3c_camif.h>
19 * id = 0 - codec (FIMC C), 1 - preview (FIMC P).
24 #define CISRCFMT_ITU601_8BIT BIT(31)
35 #define CIWDOFST_WINOFSEN BIT(31)
36 #define CIWDOFST_CLROVCOFIY BIT(30)
37 #define CIWDOFST_CLROVRLB_PR BIT(28)
38 /* #define CIWDOFST_CLROVPRFIY BIT(27) */
39 #define CIWDOFST_CLROVCOFICB BIT(15)
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/linux/arch/parisc/math-emu/
H A Dfcnvxf.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Linux/PA-RISC Project (http://www.parisc-linux.org/)
5 * Floating-point emulation code
6 * Copyright (C) 2001 Hewlett-Packard (Paul Bame) <bame@debian.org>
15 * Single Fixed-point to Single Floating-point
16 * Single Fixed-point to Double Floating-point
17 * Double Fixed-point to Single Floating-point
18 * Double Fixed-point to Double Floating-point
41 * Convert single fixed-point to single floating-point format
56 * set sign bit of result and get magnitude of source in sgl_to_sgl_fcnvxf()
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H A Dfcnvuf.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Linux/PA-RISC Project (http://www.parisc-linux.org/)
5 * Floating-point emulation code
6 * Copyright (C) 2001 Hewlett-Packard (Paul Bame) <bame@debian.org>
15 * Fixed point to Floating-point Converts
38 * Fixed point to Floating-point Converts *
42 * Convert Single Unsigned Fixed to Single Floating-point format
68 * Check word for most significant bit set. Returns in sgl_to_sgl_fcnvuf()
69 * a value in dst_exponent indicating the bit position, in sgl_to_sgl_fcnvuf()
70 * between -1 and 30. in sgl_to_sgl_fcnvuf()
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/linux/drivers/net/ethernet/amazon/ena/
H A Dena_eth_io_defs.h1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
3 * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved.
24 /* 15:0 : length - Buffer length in bytes, must
26 * to update like End-to-End CRC, Authentication GMAC
29 * the 4-byte added in the end for 802.3 Ethernet FCS
30 * 21:16 : req_id_hi - Request ID[15:10]
31 * 22 : reserved22 - MBZ
32 * 23 : meta_desc - MBZ
34 * 25 : reserved1 - MBZ
35 * 26 : first - Indicates first descriptor in
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/linux/arch/parisc/kernel/
H A Dsyscall.S2 * Linux/PA-RISC Project (http://www.parisc-linux.org/)
12 How does the Linux gateway page on PA-RISC work?
13 ------------------------------------------------
14 The Linux gateway page on PA-RISC is "special".
27 executed atomically (because the kernel can't be pre-empted) and they may
33 #include <asm/asm-offsets.h>
66 ldo -1(\reg1), \reg1
102 /* Light-weight-syscall entry must always be located at 0xb0 */
138 /* Store W bit on entry to the syscall in case it's a wide userland
142 /* sp must be aligned on 4, so deposit the W bit setting into
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/linux/drivers/net/ipa/reg/
H A Dipa_reg-v5.0.c1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (C) 2023-2024 Linaro Ltd. */
22 [RAM_ARB_PRI_CLIENT_SAMP_FIX_DIS] = BIT(0),
23 [GSI_SNOC_BYPASS_DIS] = BIT(1),
24 [GEN_QMB_0_SNOC_BYPASS_DIS] = BIT(2),
25 [GEN_QMB_1_SNOC_BYPASS_DIS] = BIT(3),
26 /* Bit 4 reserved */
27 [IPA_QMB_SELECT_CONS_EN] = BIT(5),
28 [IPA_QMB_SELECT_PROD_EN] = BIT(6),
29 [GSI_MULTI_INORDER_RD_DIS] = BIT(7),
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H A Dipa_reg-v5.5.c1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (C) 2023-2024 Linaro Ltd. */
22 [RAM_ARB_PRI_CLIENT_SAMP_FIX_DIS] = BIT(0),
23 [GSI_SNOC_BYPASS_DIS] = BIT(1),
24 [GEN_QMB_0_SNOC_BYPASS_DIS] = BIT(2),
25 [GEN_QMB_1_SNOC_BYPASS_DIS] = BIT(3),
26 /* Bit 4 reserved */
27 [IPA_QMB_SELECT_CONS_EN] = BIT(5),
28 [IPA_QMB_SELECT_PROD_EN] = BIT(6),
29 [GSI_MULTI_INORDER_RD_DIS] = BIT(7),
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H A Dipa_reg-v4.5.c1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (C) 2022-2024 Linaro Ltd. */
13 /* Bit 0 reserved */
14 [GSI_SNOC_BYPASS_DIS] = BIT(1),
15 [GEN_QMB_0_SNOC_BYPASS_DIS] = BIT(2),
16 [GEN_QMB_1_SNOC_BYPASS_DIS] = BIT(3),
17 /* Bit 4 reserved */
18 [IPA_QMB_SELECT_CONS_EN] = BIT(5),
19 [IPA_QMB_SELECT_PROD_EN] = BIT(6),
20 [GSI_MULTI_INORDER_RD_DIS] = BIT(7),
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/linux/Documentation/ABI/stable/
H A Dsysfs-hypervisor-xen3 KernelVersion: 2.6.30
4 Contact: xen-devel@lists.xenproject.org
12 KernelVersion: 2.6.30
13 Contact: xen-devel@lists.xenproject.org
21 KernelVersion: 2.6.30
22 Contact: xen-devel@lists.xenproject.org
30 KernelVersion: 2.6.30
31 Contact: xen-devel@lists.xenproject.org
34 is in the format: <class>-<major>.<minor>-<arch>
38 <class>: "xen" -- x86: paravirtualized, arm: standard
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/linux/sound/soc/mediatek/mt8186/
H A Dmt8186-reg.h1 /* SPDX-License-Identifier: GPL-2.0
3 * mt8186-reg.h -- Mediatek 8186 audio driver reg definition
12 /* reg bit enum */
26 #define RESERVED_MASK_SFT BIT(31)
27 #define AHB_IDLE_EN_INT_SFT 30
28 #define AHB_IDLE_EN_INT_MASK_SFT BIT(30)
30 #define AHB_IDLE_EN_EXT_MASK_SFT BIT(29)
32 #define PDN_NLE_MASK_SFT BIT(28)
34 #define PDN_TML_MASK_SFT BIT(27)
36 #define PDN_DAC_PREDIS_MASK_SFT BIT(26)
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/linux/drivers/media/pci/zoran/
H A Dzr36057.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * zr36057.h - zr36057 register offsets
14 #define ZR36057_VFEHCR_HS_POL BIT(30)
20 #define ZR36057_VFEVCR_VS_POL BIT(30)
26 #define ZR36057_VFESPFR_EXT_FL BIT(26)
27 #define ZR36057_VFESPFR_TOP_FIELD BIT(25)
28 #define ZR36057_VFESPFR_VCLK_POL BIT(24)
37 #define ZR36057_VFESPFR_ERR_DIF BIT(2)
38 #define ZR36057_VFESPFR_PACK24 BIT(1)
39 #define ZR36057_VFESPFR_LITTLE_ENDIAN BIT(0)
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/linux/sound/soc/fsl/
H A Dfsl_micfil.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
38 /* MICFIL Control Register 1 -- REG_MICFILL_CTRL1 0x00 */
39 #define MICFIL_CTRL1_MDIS BIT(31)
40 #define MICFIL_CTRL1_DOZEN BIT(30)
41 #define MICFIL_CTRL1_PDMIEN BIT(29)
42 #define MICFIL_CTRL1_DBG BIT(28)
43 #define MICFIL_CTRL1_SRES BIT(27)
44 #define MICFIL_CTRL1_DBGE BIT(26)
45 #define MICFIL_CTRL1_DECFILS BIT(20)
46 #define MICFIL_CTRL1_FSYNCEN BIT(16)
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/linux/drivers/hid/
H A Dhid-elecom.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * - BM084 Bluetooth Mouse
5 * - EX-G Trackballs (M-XT3DRBK, M-XT3URBK, M-XT4DRBK)
6 * - DEFT Trackballs (M-DT1DRBK, M-DT1URBK, M-DT2DRBK, M-DT2URBK)
7 * - HUGE Trackballs (M-HT1DRBK, M-HT1URBK)
13 * Copyright (c) 2017 Tomasz Kramkowski <tk@the-tk.com>
14 * Copyright (c) 2020 YOSHIOKA Takuma <lo48576@hard-wi.red>
25 #include "hid-ids.h"
53 rdesc[padding_bit + 1] = MOUSE_BUTTONS_MAX - nbuttons; in mouse_button_fixup()
59 switch (hdev->product) { in elecom_report_fixup()
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/linux/drivers/staging/media/sunxi/cedrus/
H A Dcedrus_regs.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (c) 2013-2016 Jens Kuske <jenskuske@gmail.com>
6 * Copyright (C) 2016 Florent Revest <florent.revest@free-electrons.com>
18 * * VLD : Variable-Length Decoder
38 #define VE_MODE_PIC_WIDTH_IS_4096 BIT(22)
39 #define VE_MODE_PIC_WIDTH_MORE_2048 BIT(21)
68 #define VE_SECONDARY_OUT_FMT_TILED_32_NV12 (0x00 << 30)
69 #define VE_SECONDARY_OUT_FMT_EXT (0x01 << 30)
70 #define VE_SECONDARY_OUT_FMT_YU12 (0x02 << 30)
71 #define VE_SECONDARY_OUT_FMT_YV12 (0x03 << 30)
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/linux/arch/arm/mach-rockchip/
H A Dpm.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Tony Xie <tony.xie@rock-chips.com>
55 rkpm_bootdata_cpusp = rk3288_bootram_phy + (SZ_4K - 8); in rk3288_config_bootdata()
65 #define GRF_SIDDQ BIT(13)
99 * SGRF_FAST_BOOT_EN - system to boot from FAST_BOOT_ADDR in rk3288_slp_mode_set()
100 * PCLK_WDT_GATE - disable WDT during suspend. in rk3288_slp_mode_set()
117 mode_set = BIT(PMU_GLOBAL_INT_DISABLE) | BIT(PMU_L2FLUSH_EN) | in rk3288_slp_mode_set()
118 BIT(PMU_SREF0_ENTER_EN) | BIT(PMU_SREF1_ENTER_EN) | in rk3288_slp_mode_set()
119 BIT(PMU_DDR0_GATING_EN) | BIT(PMU_DDR1_GATING_EN) | in rk3288_slp_mode_set()
120 BIT(PMU_PWR_MODE_EN) | BIT(PMU_CHIP_PD_EN) | in rk3288_slp_mode_set()
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