Lines Matching +full:30 +full:- +full:bit
1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
38 /* MICFIL Control Register 1 -- REG_MICFILL_CTRL1 0x00 */
39 #define MICFIL_CTRL1_MDIS BIT(31)
40 #define MICFIL_CTRL1_DOZEN BIT(30)
41 #define MICFIL_CTRL1_PDMIEN BIT(29)
42 #define MICFIL_CTRL1_DBG BIT(28)
43 #define MICFIL_CTRL1_SRES BIT(27)
44 #define MICFIL_CTRL1_DBGE BIT(26)
45 #define MICFIL_CTRL1_DECFILS BIT(20)
46 #define MICFIL_CTRL1_FSYNCEN BIT(16)
52 #define MICFIL_CTRL1_ERREN BIT(23)
53 #define MICFIL_CTRL1_CHEN(ch) BIT(ch)
55 /* MICFIL Control Register 2 -- REG_MICFILL_CTRL2 0x04 */
68 /* MICFIL Status Register -- REG_MICFIL_STAT 0x08 */
69 #define MICFIL_STAT_BSY_FIL BIT(31)
70 #define MICFIL_STAT_FIR_RDY BIT(30)
71 #define MICFIL_STAT_LOWFREQF BIT(29)
72 #define MICFIL_STAT_CHXF(ch) BIT(ch)
74 /* MICFIL FIFO Control Register -- REG_MICFIL_FIFO_CTRL 0x10 */
77 /* MICFIL FIFO Status Register -- REG_MICFIL_FIFO_STAT 0x14 */
78 #define MICFIL_FIFO_STAT_FIFOX_OVER(ch) BIT(ch)
79 #define MICFIL_FIFO_STAT_FIFOX_UNDER(ch) BIT((ch) + 8)
81 /* MICFIL DC Remover Control Register -- REG_MICFIL_DC_CTRL */
90 /* MICFIL VERID Register -- REG_MICFIL_VERID */
98 /* MICFIL PARAM Register -- REG_MICFIL_PARAM */
101 #define MICFIL_PARAM_HWVAD_ZCD BIT(19)
102 #define MICFIL_PARAM_HWVAD_ENERGY_MODE BIT(17)
103 #define MICFIL_PARAM_HWVAD BIT(16)
104 #define MICFIL_PARAM_DC_OUT_BYPASS BIT(11)
105 #define MICFIL_PARAM_DC_IN_BYPASS BIT(10)
106 #define MICFIL_PARAM_LOW_POWER BIT(9)
107 #define MICFIL_PARAM_FIL_OUT_WIDTH BIT(8)
113 /* MICFIL HWVAD0 Control 1 Register -- REG_MICFIL_VAD0_CTRL1*/
117 #define MICFIL_VAD0_CTRL1_ST10 BIT(4)
118 #define MICFIL_VAD0_CTRL1_ERIE BIT(3)
119 #define MICFIL_VAD0_CTRL1_IE BIT(2)
120 #define MICFIL_VAD0_CTRL1_RST BIT(1)
121 #define MICFIL_VAD0_CTRL1_EN BIT(0)
123 /* MICFIL HWVAD0 Control 2 Register -- REG_MICFIL_VAD0_CTRL2*/
124 #define MICFIL_VAD0_CTRL2_FRENDIS BIT(31)
125 #define MICFIL_VAD0_CTRL2_PREFEN BIT(30)
126 #define MICFIL_VAD0_CTRL2_FOUTDIS BIT(28)
131 /* MICFIL HWVAD0 Signal CONFIG Register -- REG_MICFIL_VAD0_SCONFIG */
132 #define MICFIL_VAD0_SCONFIG_SFILEN BIT(31)
133 #define MICFIL_VAD0_SCONFIG_SMAXEN BIT(30)
136 /* MICFIL HWVAD0 Noise CONFIG Register -- REG_MICFIL_VAD0_NCONFIG */
137 #define MICFIL_VAD0_NCONFIG_NFILAUT BIT(31)
138 #define MICFIL_VAD0_NCONFIG_NMINEN BIT(30)
139 #define MICFIL_VAD0_NCONFIG_NDECEN BIT(29)
140 #define MICFIL_VAD0_NCONFIG_NOREN BIT(28)
144 /* MICFIL HWVAD0 Zero-Crossing Detector - REG_MICFIL_VAD0_ZCD */
147 #define MICFIL_VAD0_ZCD_ZCDAND BIT(4)
148 #define MICFIL_VAD0_ZCD_ZCDAUT BIT(2)
149 #define MICFIL_VAD0_ZCD_ZCDEN BIT(0)
151 /* MICFIL HWVAD0 Status Register - REG_MICFIL_VAD0_STAT */
152 #define MICFIL_VAD0_STAT_INITF BIT(31)
153 #define MICFIL_VAD0_STAT_INSATF BIT(16)
154 #define MICFIL_VAD0_STAT_EF BIT(15)
155 #define MICFIL_VAD0_STAT_IF BIT(0)
165 #define FIFO_LEN BIT(FIFO_PTRWID)
178 * struct fsl_micfil_verid - version id data
188 * struct fsl_micfil_param - parameter data
190 * @hwvad_zcd: HWVAD zero-cross detector is active