Home
last modified time | relevance | path

Searched +full:3 +full:- +full:port (Results 1 – 25 of 1084) sorted by relevance

12345678910>>...44

/linux/drivers/gpu/drm/i915/display/
H A Dvlv_dsi_pll_regs.h1 /* SPDX-License-Identifier: MIT */
21 #define BXT_MIPI_DIV_SHIFT(port) \ argument
22 _MIPI_PORT(port, BXT_MIPI1_DIV_SHIFT, \
28 #define BXT_MIPI_TX_ESCLK_SHIFT(port) \ argument
29 _MIPI_PORT(port, BXT_MIPI1_TX_ESCLK_SHIFT, \
33 #define BXT_MIPI_TX_ESCLK_FIXDIV_MASK(port) \ argument
34 _MIPI_PORT(port, BXT_MIPI1_TX_ESCLK_FIXDIV_MASK, \
36 #define BXT_MIPI_TX_ESCLK_DIVIDER(port, val) \ argument
37 (((val) & 0x3F) << BXT_MIPI_TX_ESCLK_SHIFT(port))
41 #define BXT_MIPI_RX_ESCLK_UPPER_SHIFT(port) \ argument
[all …]
H A Dvlv_dsi_regs.h1 /* SPDX-License-Identifier: MIT */
14 #define _MIPI_MMIO_BASE(display) ((display)->dsi.mmio_base)
16 #define _MIPI_PORT(port, a, c) (((port) == PORT_A) ? a : c) /* ports A and C only */ argument
17 #define _MMIO_MIPI(base, port, a, c) _MMIO((base) + _MIPI_PORT(port, a, c)) argument
40 #define VLV_MIPI_PORT_CTRL(port) _MMIO_MIPI(VLV_MIPI_BASE, port, _MIPIA_PORT_CTRL, _MIPIC_PORT_CTR… argument
42 /* BXT port control */
66 #define CSB_MASK (3 << 9)
77 #define TEARING_EFFECT_MASK (3 << 2)
82 #define LANE_CONFIGURATION_MASK (3 << 0)
89 #define VLV_MIPI_TEARING_CTRL(port) _MMIO_MIPI(VLV_MIPI_BASE, port, _MIPIA_TEARING_CTRL, _MIPIC_T… argument
[all …]
/linux/drivers/gpio/
H A Dgpio-ws16c48.c1 // SPDX-License-Identifier: GPL-2.0-only
43 #define INT_ID_PAGE u8_encode_bits(3, PAGE_LOCK_PAGE_FIELD)
89 /* Only the first 24 lines (Port 0-2) support interrupts */
92 WS16C48_REGMAP_IRQ(0), WS16C48_REGMAP_IRQ(1), WS16C48_REGMAP_IRQ(2), /* 0-2 */
93 WS16C48_REGMAP_IRQ(3), WS16C48_REGMAP_IRQ(4), WS16C48_REGMAP_IRQ(5), /* 3-5 */
94 WS16C48_REGMAP_IRQ(6), WS16C48_REGMAP_IRQ(7), WS16C48_REGMAP_IRQ(8), /* 6-8 */
95 WS16C48_REGMAP_IRQ(9), WS16C48_REGMAP_IRQ(10), WS16C48_REGMAP_IRQ(11), /* 9-11 */
96 WS16C48_REGMAP_IRQ(12), WS16C48_REGMAP_IRQ(13), WS16C48_REGMAP_IRQ(14), /* 12-14 */
97 WS16C48_REGMAP_IRQ(15), WS16C48_REGMAP_IRQ(16), WS16C48_REGMAP_IRQ(17), /* 15-17 */
98 WS16C48_REGMAP_IRQ(18), WS16C48_REGMAP_IRQ(19), WS16C48_REGMAP_IRQ(20), /* 18-20 */
[all …]
/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra194-p2972-0000.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
7 #include "tegra194-p2888.dtsi"
11 compatible = "nvidia,p2972-0000", "nvidia,tegra194";
24 #address-cells = <1>;
25 #size-cells = <0>;
27 port@0 {
31 remote-endpoint = <&xbar_i2s1_ep>;
[all …]
H A Dtegra194-p3509-0000.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
19 #address-cells = <1>;
20 #size-cells = <0>;
22 port@0 {
26 remote-endpoint = <&xbar_i2s3_ep>;
30 i2s3_port: port@1 {
34 dai-format = "i2s";
[all …]
H A Dtegra210-p2371-2180.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra210-p2180.dtsi"
5 #include "tegra210-p2597.dtsi"
9 compatible = "nvidia,p2371-2180", "nvidia,tegra210";
14 hvddio-pex-supply = <&vdd_1v8>;
15 dvddio-pex-supply = <&vdd_pex_1v05>;
16 vddio-pex-ctl-supply = <&vdd_1v8>;
19 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>,
20 <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>,
[all …]
H A Dtegra210-p3450-0000.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/gpio-keys.h>
5 #include <dt-bindings/input/linux-event-codes.h>
6 #include <dt-bindings/mfd/max77620.h>
12 compatible = "nvidia,p3450-0000", "nvidia,tegra210";
16 rtc0 = "/i2c@7000d000/pmic@3c";
22 stdout-path = "serial0:115200n8";
33 hvddio-pex-supply = <&vdd_1v8>;
34 dvddio-pex-supply = <&vdd_pex_1v05>;
[all …]
H A Dtegra186-p2771-0000.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
7 #include "tegra186-p3310.dtsi"
11 compatible = "nvidia,p2771-0000", "nvidia,tegra186";
23 #address-cells = <1>;
24 #size-cells = <0>;
26 port@0 {
30 remote-endpoint = <&xbar_i2s1_ep>;
[all …]
/linux/arch/mips/boot/dts/cavium-octeon/
H A Docteon_3xxx.dts1 // SPDX-License-Identifier: GPL-2.0
3 * OCTEON 3XXX, 5XXX, 63XX device tree skeleton.
6 * use. Because of this, it contains a super-set of the available
15 phy0: ethernet-phy@0 {
17 marvell,reg-init =
21 <3 0x11 0 0x442a>, /* Reg 3,17 <- 0442a */
22 /* irq, blink-activity, blink-link */
23 <3 0x10 0 0x0242>; /* Reg 3,16 <- 0x0242 */
27 phy1: ethernet-phy@1 {
29 marvell,reg-init =
[all …]
H A Docteon_68xx.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
7 * use. Because of this, it contains a super-set of the available
11 compatible = "cavium,octeon-6880";
12 #address-cells = <2>;
13 #size-cells = <2>;
14 interrupt-parent = <&ciu2>;
17 compatible = "simple-bus";
18 #address-cells = <2>;
19 #size-cells = <2>;
[all …]
/linux/drivers/input/joystick/
H A Danalog.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 1996-2001 Vojtech Pavlik
69 #define ANALOG_MAX_TIME 3 /* 3 ms */
121 struct input_dev *dev = analog->dev; in analog_decode()
124 if (analog->mask & ANALOG_HAT_FCS) in analog_decode()
126 if (axes[3] < ((initial[3] * ((i << 1) + 1)) >> 3)) { in analog_decode()
132 if (analog->mask & (0x10 << i)) in analog_decode()
133 input_report_key(dev, analog->buttons[j++], (buttons >> i) & 1); in analog_decode()
135 if (analog->mask & ANALOG_HBTN_CHF) in analog_decode()
137 input_report_key(dev, analog->buttons[j++], (buttons >> (i + 10)) & 1); in analog_decode()
[all …]
H A Ddb9.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 1999-2001 Vojtech Pavlik
31 #define DB9_MAX_PORTS 3
95 static struct db9 *db9_base[3];
112 { "Multisystem (0.8.0.2-dual) joystick", db9_multi_btn, 1, 2, 2, 1, 1 },
113 { "Amiga CD-32 pad", db9_cd32_btn, 7, 1, 2, 1, 1 },
128 static void db9_saturn_write_sub(struct parport *port, int type, unsigned char data, int powered, i… in db9_saturn_write_sub() argument
135 parport_write_data(port, c); in db9_saturn_write_sub()
139 parport_write_data(port, c); in db9_saturn_write_sub()
143 parport_write_control(port, c); in db9_saturn_write_sub()
[all …]
/linux/arch/arm/boot/dts/marvell/
H A Darmada-xp-mv78460.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
27 #address-cells = <1>;
28 #size-cells = <0>;
29 enable-method = "marvell,armada-xp-smp";
33 compatible = "marvell,sheeva-v7";
36 clock-latency = <1000000>;
41 compatible = "marvell,sheeva-v7";
[all …]
H A Darmada-xp-mv78260.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
26 #address-cells = <1>;
27 #size-cells = <0>;
28 enable-method = "marvell,armada-xp-smp";
32 compatible = "marvell,sheeva-v7";
35 clock-latency = <1000000>;
40 compatible = "marvell,sheeva-v7";
[all …]
/linux/Documentation/devicetree/bindings/net/dsa/
H A Dmediatek,mt7530.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Arınç ÜNAL <arinc.unal@arinc9.com>
11 - Landen Chao <Landen.Chao@mediatek.com>
12 - DENG Qingfang <dqfext@gmail.com>
13 - Sean Wang <sean.wang@mediatek.com>
14 - Daniel Golle <daniel@makrotopia.org>
17 There are three versions of MT7530, standalone, in a multi-chip module and
18 built-into a SoC.
[all …]
H A Dmscc,ocelot.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vladimir Oltean <vladimir.oltean@nxp.com>
11 - Claudiu Manoil <claudiu.manoil@nxp.com>
12 - Alexandre Belloni <alexandre.belloni@bootlin.com>
13 - UNGLinuxDriver@microchip.com
16 There are multiple switches which are either part of the Ocelot-1 family, or
20 them performs packet I/O primarily through an Ethernet port of the switch
21 (which is attached to an Ethernet port of the host), rather than through
[all …]
/linux/sound/isa/
H A Dcmi8328.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for C-Media CMI8328-based soundcards, such as AudioExcel AV500
7 * - CMI8328 - main chip (SB Pro emulation, gameport, OPL3, MPU401, CD-ROM)
8 * - CS4231A - WSS codec
9 * - Dream SAM9233+GMS950400+RAM+ROM: Wavetable MIDI, connected to MPU401
26 MODULE_AUTHOR("Ondrej Zary <linux@rainbow-software.org>");
27 MODULE_DESCRIPTION("C-Media CMI8328");
34 /* I/O port is configured by jumpers on the card to one of these */
38 static int index[CMI8328_MAX] = {[0 ... (CMI8328_MAX-1)] = -1};
39 static char *id[CMI8328_MAX] = {[0 ... (CMI8328_MAX-1)] = NULL};
[all …]
/linux/drivers/net/dsa/microchip/
H A Dlan937x_main.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2019-2024 Microchip Technology Inc.
21 /* marker for ports without built-in PHY */
25 * lan9370_phy_addr - Mapping of LAN9370 switch ports to PHY addresses.
27 * Each entry corresponds to a specific port on the LAN9370 switch,
28 * where ports 1-4 are connected to integrated 100BASE-T1 PHYs, and
29 * Port 5 is connected to an RGMII interface without a PHY. The values
33 [0] = 2, /* Port 1, T1 AFE0 */
34 [1] = 3, /* Port 2, T1 AFE1 */
35 [2] = 5, /* Port 3, T1 AFE3 */
[all …]
/linux/drivers/media/pci/ddbridge/
H A Dddbridge-max.c1 // SPDX-License-Identifier: GPL-2.0
3 * ddbridge-max.c: Digital Devices bridge MAX card support
5 * Copyright (C) 2010-2017 Digital Devices GmbH
25 #include "ddbridge-regs.h"
26 #include "ddbridge-io.h"
27 #include "ddbridge-mci.h"
29 #include "ddbridge-max.h"
39 static int fmode_sat = -1;
53 v = LNB_TONE & (dev->link[link].lnb.tone << (15 - lnb)); in lnb_command()
62 dev_info(dev->dev, "%s lnb = %08x cmd = %08x\n", in lnb_command()
[all …]
/linux/drivers/net/ethernet/chelsio/cxgb/
H A Dvsc7326.c1 // SPDX-License-Identifier: GPL-2.0
16 * interface is down (MAC port disabled). This is a workaround
17 * for disabling the T2/MAC flow-control. When the interface is
40 spin_lock_bh(&adapter->mac_lock); in vsc_read()
60 spin_unlock_bh(&adapter->mac_lock); in vsc_read()
65 spin_lock_bh(&adapter->mac_lock); in vsc_write()
71 spin_unlock_bh(&adapter->mac_lock); in vsc_write()
114 { /* Port 0 */
130 /* Port config */
140 { /* Port 1 */
[all …]
/linux/arch/alpha/kernel/
H A Dcore_titan.c1 // SPDX-License-Identifier: GPL-2.0
44 * BIOS32-style PCI interface:
89 * Note also that type 1 is determined by non-zero bus number.
93 * 3 3|3 3 2 2|2 2 2 2|2 2 2 2|1 1 1 1|1 1 1 1|1 1
94 * 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
95 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
97 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
106 * The function number selects which function of a multi-function device
118 struct pci_controller *hose = pbus->sysdata; in mk_conf_addr()
120 u8 bus = pbus->number; in mk_conf_addr()
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Dvga.c27 nvkm_rdport(struct nvkm_device *device, int head, u16 port) in nvkm_rdport() argument
29 if (device->card_type >= NV_50) in nvkm_rdport()
30 return nvkm_rd08(device, 0x601000 + port); in nvkm_rdport()
32 if (port == 0x03c0 || port == 0x03c1 || /* AR */ in nvkm_rdport()
33 port == 0x03c2 || port == 0x03da || /* INP0 */ in nvkm_rdport()
34 port == 0x03d4 || port == 0x03d5) /* CR */ in nvkm_rdport()
35 return nvkm_rd08(device, 0x601000 + (head * 0x2000) + port); in nvkm_rdport()
37 if (port == 0x03c2 || port == 0x03cc || /* MISC */ in nvkm_rdport()
38 port == 0x03c4 || port == 0x03c5 || /* SR */ in nvkm_rdport()
39 port == 0x03ce || port == 0x03cf) { /* GR */ in nvkm_rdport()
[all …]
/linux/Documentation/admin-guide/
H A Ddevices.txt1 0 Unnamed devices (e.g. non-device mounts)
7 2 = /dev/kmem OBSOLETE - replaced by /proc/kcore
8 3 = /dev/null Null device
9 4 = /dev/port I/O port access
11 6 = /dev/core OBSOLETE - replaced by /proc/kcore
18 12 = /dev/oldmem OBSOLETE - replaced by /proc/vmcore
31 2 char Pseudo-TTY masters
37 Pseudo-tty's are named as follows:
40 the 1st through 16th series of 16 pseudo-ttys each, and
44 These are the old-style (BSD) PTY devices; Unix98
[all …]
/linux/drivers/pinctrl/
H A Dpinctrl-tb10x.c1 // SPDX-License-Identifier: GPL-2.0-only
22 #include "pinctrl-utils.h"
36 #define PCFG_PORT_MASK(PORT) \ argument
37 (((1 << PCFG_PORT_BITWIDTH) - 1) << (PCFG_PORT_BITWIDTH * (PORT)))
40 /* Port 1 */
44 PINCTRL_PIN(TB10X_PORT1 + 3, "MDI_S0"),
52 /* Port 2 */
56 PINCTRL_PIN(TB10X_PORT2 + 3, "MDI_S2"),
64 /* Port 3 */
68 PINCTRL_PIN(TB10X_PORT3 + 3, "MDI_S4"),
[all …]
/linux/Documentation/devicetree/bindings/display/
H A Dallwinner,sun8i-r40-tcon-top.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun8i-r40-tcon-top.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
22 / [0] TCON-LCD0
25 \ / [1] TCON-LCD1 - LCD1/LVDS1
26 TCON-TOP
27 / \ [2] TCON-TV0 [0] - TVE0/RGB
[all …]

12345678910>>...44