Home
last modified time | relevance | path

Searched +full:3 +full:- +full:2022 (Results 1 – 25 of 1023) sorted by relevance

12345678910>>...41

/linux/Documentation/ABI/testing/
H A Dsysfs-driver-chromeos-acpi3 Date: May 2022
13 What: /sys/bus/platform/devices/GGL0001:*/BINF.3
14 /sys/bus/platform/devices/GOOG0016:*/BINF.3
15 Date: May 2022
24 3 Netboot (factory installation only).
29 Date: May 2022
45 Date: May 2022
53 Date: May 2022
56 Returns firmware version for the read-only portion of the
61 Date: May 2022
[all …]
H A Dsysfs-timecard24 IRIG adjustments from external IRIG-B signal
40 TS3 signal is sent to timestamper 3
42 IRIG signal is sent to the IRIG-B module
46 FREQ3 signal is sent to frequency counter 3
62 IRIG output is from the PHC, in IRIG-B format
66 GEN3 output is from frequency generator 3
80 Date: March 2022
86 Date: March 2022
92 Date: March 2022
98 Date: March 2022
[all …]
H A Dsysfs-class-usb_power_delivery2 Date: May 2022
8 Date: May 2022
15 Date: May 2022
23 What: /sys/class/usb_power_delivery/.../source-capabilities
24 Date: May 2022
30 Power Delivery Specification. Each PDO - power supply - will
37 What: /sys/class/usb_power_delivery/.../sink-capabilities
38 Date: May 2022
52 Date: May 2022
66 Date: May 2022
[all …]
H A Dsysfs-bus-cxl2 Date: Januarry, 2022
4 Contact: linux-cxl@vger.kernel.org
14 Contact: linux-cxl@vger.kernel.org
17 Memory Device Output Payload in the CXL-2.0
24 Contact: linux-cxl@vger.kernel.org
28 Payload in the CXL-2.0 specification.
34 Contact: linux-cxl@vger.kernel.org
40 class-ids can be compared against a similar "qos_class"
42 that the endpoints map their local memory-class to a
45 side-effects that may result. First class-id is displayed.
[all …]
/linux/Documentation/translations/zh_CN/process/
H A Dmaintainer-pgp-guide.rst1 .. SPDX-License-Identifier: GPL-2.0
2 .. include:: ../disclaimer-zh_CN.rst
4 :Original: Documentation/process/maintainer-pgp-guide.rst
23 .. _`保护代码完整性`: https://github.com/lfit/itpol/blob/master/protecting-code-integrity.md
33 - 分布式源仓库 (git)
34 - 定期发布快照 (tarballs)
40 - git 仓库在所有标签上提供 PGP 签名
41 - tarball 为所有下载提供独立的 PGP 签名
44 --------------------------
58 -------------------------
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8956-sony-xperia-loire-suzu.dts1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2016-2022, AngeloGioacchino Del Regno
5 * Copyright (c) 2022, Konrad Dybcio <konrad.dybcio@somainline.org>
6 * Copyright (c) 2022, Marijn Suijten <marijn.suijten@somainline.org>
9 /dts-v1/;
11 #include "msm8956-sony-xperia-loire.dtsi"
15 compatible = "sony,suzu-row", "qcom,msm8956";
16 chassis-type = "handset";
H A Dmsm8956.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2016-2022, AngeloGioacchino Del Regno
5 * Copyright (c) 2022, Konrad Dybcio <konrad.dybcio@somainline.org>
6 * Copyright (c) 2022, Marijn Suijten <marijn.suijten@somainline.org>
16 compatible = "qcom,msm8956-tsens", "qcom,tsens-v1";
H A Dmsm8956-sony-xperia-loire-kugo.dts1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2016-2022, AngeloGioacchino Del Regno
5 * Copyright (c) 2022, Konrad Dybcio <konrad.dybcio@somainline.org>
6 * Copyright (c) 2022, Marijn Suijten <marijn.suijten@somainline.org>
9 /dts-v1/;
11 #include "msm8956-sony-xperia-loire.dtsi"
15 compatible = "sony,kugo-row", "qcom,msm8956";
16 chassis-type = "handset";
22 /* FUSB301 USB-C Controller */
33 regulator-min-microvolt = <1100000>;
[all …]
/linux/include/linux/pse-pd/
H A Dpse.h1 // SPDX-License-Identifier: GPL-2.0-only
3 // Copyright (c) 2022 Pengutronix, Oleksij Rempel <kernel@pengutronix.de>
12 /* Maximum current in uA according to IEEE 802.3-2022 Table 145-1 */
19 * struct pse_control_config - PSE control/channel configuration.
22 * IEEE 802.3-2018 30.15.1.2.1 acPoDLPSEAdminControl
24 * IEEE 802.3-2022 30.9.1.2.1 acPSEAdminControl
32 * struct pse_control_status - PSE control/channel status.
35 * functions. IEEE 802.3-2018 30.15.1.1.2 aPoDLPSEAdminState
37 * IEEE 802.3-2018 30.15.1.1.3 aPoDLPSEPowerDetectionStatus:
39 * functions. IEEE 802.3-2022 30.9.1.1.2 aPSEAdminState
[all …]
/linux/Documentation/devicetree/bindings/net/pse-pd/
H A Dpse-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/pse-pd/pse-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 power over twisted pair/ethernet cable. The ethernet-pse nodes should be
12 used to describe PSE controller and referenced by the ethernet-phy node.
15 - Oleksij Rempel <o.rempel@pengutronix.de>
16 - Kory Maincent <kory.maincent@bootlin.com>
20 pattern: "^ethernet-pse(@.*|-([0-9]|[1-9][0-9]+))?$"
22 "#pse-cells":
[all …]
/linux/include/net/
H A Dieee8021q.h1 /* SPDX-License-Identifier: GPL-2.0 */
10 * enum ieee8021q_traffic_type - 802.1Q traffic type priority values (802.1Q-2022)
13 * @IEEE8021Q_TT_BE: Best Effort (default). According to 802.1Q-2022, BE is 0
26 IEEE8021Q_TT_CA = 3,
36 #define SIMPLE_IETF_DSCP_TO_IEEE8021Q_TT(dscp) ((dscp >> 3) & 0x7)
47 return -EOPNOTSUPP; in ietf_dscp_to_ieee8021q_tt()
53 return -EOPNOTSUPP; in ieee8021q_tt_to_tc()
/linux/include/dt-bindings/clock/
H A Dfsd-clk.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2017 - 2022: Samsung Electronics Co., Ltd.
5 * Copyright (c) 2017-2022 Tesla, Inc.
18 #define DOUT_CMU_PERIC_SHARED0DIV3_TBUCLK 3
35 #define PERIC_SCLK_UART1 3
82 #define UFS1_MPHY_REFCLK_IXTAL24 3
106 #define PCIE_LINK0_IPCLKPORT_MSTR_ACLK 3
116 #define IMEM_WDT0_IPCLKPORT_PCLK 3
132 #define CAM_CSI0_2_IPCLKPORT_I_ACLK 3
H A Dqcom,sm8550-tcsr.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
3 * Copyright (c) 2022, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2022, Linaro Limited
14 #define TCSR_UFS_PAD_CLKREF_EN 3
H A Dqcom,sm6350-camcc.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
3 * Copyright (c) 2022, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2022, Linaro Limited
14 #define CAMCC_PLL1 3
105 #define IFE_1_GDSC 3
/linux/Documentation/translations/it_IT/process/
H A Dmaintainer-pgp-guide.rst1 .. include:: ../disclaimer-ita.rst
3 :Original: :ref:`Documentation/process/maintainer-pgp-guide.rst <pgpguide>`
21 .. _`Protecting Code Integrity`: https://github.com/lfit/itpol/blob/master/protecting-code-integrit…
33 - repositori distribuiti di sorgenti (git)
34 - rilasci periodici di istantanee (archivi tar)
42 - i repositori git forniscono firme PGP per ogni tag
43 - gli archivi tar hanno firme separate per ogni archivio
48 -----------------------------------------------------
72 ----------------------------
78 $ gpg --version | head -n1
[all …]
/linux/Documentation/process/
H A Dmaintainer-pgp-guide.rst12 Linux Foundation. Please read that document for more in-depth discussion
15 .. _`Protecting Code Integrity`: https://github.com/lfit/itpol/blob/master/protecting-code-integrit…
22 communication channels between developers via PGP-signed email exchange.
26 - Distributed source repositories (git)
27 - Periodic release snapshots (tarballs)
35 - git repositories provide PGP signatures on all tags
36 - tarballs provide detached PGP signatures with all downloads
41 -------------------------------------------
64 ----------------------
70 $ gpg --version | head -n1
[all …]
/linux/arch/riscv/boot/dts/starfive/
H A Djh7110-starfive-visionfive-2-v1.3b.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright (C) 2022 StarFive Technology Co., Ltd.
4 * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
7 /dts-v1/;
8 #include "jh7110-starfive-visionfive-2.dtsi"
11 model = "StarFive VisionFive 2 v1.3B";
12 compatible = "starfive,visionfive-2-v1.3b", "starfive,jh7110";
16 starfive,tx-use-rgmii-clk;
17 assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
18 assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
[all …]
/linux/arch/riscv/boot/dts/allwinner/
H A Dsun20i-d1-lichee-rv.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 // Copyright (C) 2022 Jisheng Zhang <jszhang@kernel.org>
3 // Copyright (C) 2022 Samuel Holland <samuel@sholland.org>
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/leds/common.h>
8 /dts-v1/;
10 #include "sun20i-d1.dtsi"
11 #include "sun20i-common-regulators.dtsi"
15 compatible = "sipeed,lichee-rv", "allwinner,sun20i-d1";
22 stdout-path = "serial0:115200n8";
[all …]
/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-axg-jethome-jethub-j110-rev-3.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2022 Vyacheslav Bocharov <adeep@lexina.in>
4 * Copyright (c) 2022 JetHome
8 /dts-v1/;
10 #include "meson-axg-jethome-jethub-j1xx.dtsi"
13 compatible = "jethome,jethub-j110", "amlogic,a113d", "amlogic,meson-axg";
14 model = "JetHome JetHub D1p (J110) Hw rev.3";
26 broken-cd;/* cd-gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_LOW>;*/
36 address-width = <0x10>;
37 vcc-supply = <&vddao_3v3>;
/linux/arch/arm64/boot/dts/apple/
H A Dt6002-j375d.dts1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * Mac Studio (M1 Ultra, 2022)
5 * target-type: J375d
10 /dts-v1/;
13 #include "t600x-j375.dtsi"
16 compatible = "apple,j375d", "apple,t6002", "apple,arm-platform";
17 model = "Apple Mac Studio (M1 Ultra, 2022)";
22 /* front-right */
23 hpm4: usb-pd@39 {
26 interrupt-parent = <&pinctrl_ap>;
[all …]
/linux/include/dt-bindings/reset/
H A Dstarfive,jh7110-crg.h1 /* SPDX-License-Identifier: GPL-2.0 OR MIT */
3 * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
4 * Copyright (C) 2022 StarFive Technology Co., Ltd.
14 #define JH7110_SYSRST_BUS 3
147 #define JH7110_AONRST_PMU_APB 3
159 #define JH7110_STGRST_SEC_AHB 3
186 #define JH7110_ISPRST_M31DPHY_B09_AON 3
202 #define JH7110_VOUTRST_DSITX_DPI 3
/linux/include/dt-bindings/pinctrl/
H A Dstarfive,jh7110-pinctrl.h1 /* SPDX-License-Identifier: GPL-2.0 OR MIT */
3 * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
4 * Copyright (C) 2022 StarFive Technology Co., Ltd.
14 #define PAD_GPIO3 3
111 #define PAD_RGPIO2 3
/linux/arch/arm/boot/dts/allwinner/
H A Dsuniv-f1c200s-lctech-pi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright 2022 Arm Ltd,
5 * Copyright 2022 Icenowy Zheng <uwu@icenowy.me>
8 /dts-v1/;
9 #include "suniv-f1c100s.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
15 compatible = "lctech,pi-f1c200s", "allwinner,suniv-f1c200s",
16 "allwinner,suniv-f1c100s";
23 stdout-path = "serial0:115200n8";
26 reg_vcc3v3: regulator-3v3 {
[all …]
/linux/drivers/phy/mediatek/
H A Dphy-mtk-dp.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2022, BayLibre Inc.
6 * Copyright (c) 2022, MediaTek Inc.
20 #define TPLL_SSC_EN BIT(3)
26 #define BIT_RATE_HBR3 3
44 #define XTP_LN_TX_LCTXC0_SW1_PRE0_DEFAULT GENMASK(4, 3)
53 #define XTP_LN_TX_LCTXC0_SW2_PRE1_DEFAULT (BIT(3) | BIT(5))
76 #define XTP_LN_TX_LCTXCP1_SW2_PRE1_DEFAULT GENMASK(3, 3)
97 regmap_bulk_write(dp_phy->regs, MTK_DP_LANE0_DRIVING_PARAM_3, in mtk_dp_phy_init()
99 regmap_bulk_write(dp_phy->regs, MTK_DP_LANE1_DRIVING_PARAM_3, in mtk_dp_phy_init()
[all …]
H A Dphy-mtk-hdmi-mt8195.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2022 MediaTek Inc.
4 * Copyright (c) 2022 BayLibre, SAS
11 #include <linux/clk-provider.h>
46 #define RG_HDMITX21_CKLDO_EN BIT(3)
77 #define RG_HDMITXPLL_RESERVE_BIT3_2 GENMASK(3, 2)

12345678910>>...41