xref: /linux/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts (revision a1c613ae4c322ddd58d5a8539dbfba2a0380a8c0)
154baba33SEmil Renner Berthing// SPDX-License-Identifier: GPL-2.0 OR MIT
254baba33SEmil Renner Berthing/*
354baba33SEmil Renner Berthing * Copyright (C) 2022 StarFive Technology Co., Ltd.
454baba33SEmil Renner Berthing * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
554baba33SEmil Renner Berthing */
654baba33SEmil Renner Berthing
754baba33SEmil Renner Berthing/dts-v1/;
854baba33SEmil Renner Berthing#include "jh7110-starfive-visionfive-2.dtsi"
954baba33SEmil Renner Berthing
1054baba33SEmil Renner Berthing/ {
1154baba33SEmil Renner Berthing	model = "StarFive VisionFive 2 v1.3B";
1254baba33SEmil Renner Berthing	compatible = "starfive,visionfive-2-v1.3b", "starfive,jh7110";
1354baba33SEmil Renner Berthing};
14*0104340aSSamin Guo
15*0104340aSSamin Guo&gmac0 {
16*0104340aSSamin Guo	starfive,tx-use-rgmii-clk;
17*0104340aSSamin Guo	assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
18*0104340aSSamin Guo	assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
19*0104340aSSamin Guo};
20*0104340aSSamin Guo
21*0104340aSSamin Guo&gmac1 {
22*0104340aSSamin Guo	starfive,tx-use-rgmii-clk;
23*0104340aSSamin Guo	assigned-clocks = <&syscrg JH7110_SYSCLK_GMAC1_TX>;
24*0104340aSSamin Guo	assigned-clock-parents = <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>;
25*0104340aSSamin Guo};
26*0104340aSSamin Guo
27*0104340aSSamin Guo&phy0 {
28*0104340aSSamin Guo	motorcomm,tx-clk-adj-enabled;
29*0104340aSSamin Guo	motorcomm,tx-clk-100-inverted;
30*0104340aSSamin Guo	motorcomm,tx-clk-1000-inverted;
31*0104340aSSamin Guo	motorcomm,rx-clk-drv-microamp = <3970>;
32*0104340aSSamin Guo	motorcomm,rx-data-drv-microamp = <2910>;
33*0104340aSSamin Guo	rx-internal-delay-ps = <1500>;
34*0104340aSSamin Guo	tx-internal-delay-ps = <1500>;
35*0104340aSSamin Guo};
36*0104340aSSamin Guo
37*0104340aSSamin Guo&phy1 {
38*0104340aSSamin Guo	motorcomm,tx-clk-adj-enabled;
39*0104340aSSamin Guo	motorcomm,tx-clk-100-inverted;
40*0104340aSSamin Guo	motorcomm,rx-clk-drv-microamp = <3970>;
41*0104340aSSamin Guo	motorcomm,rx-data-drv-microamp = <2910>;
42*0104340aSSamin Guo	rx-internal-delay-ps = <300>;
43*0104340aSSamin Guo	tx-internal-delay-ps = <0>;
44*0104340aSSamin Guo};
45