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/linux/Documentation/devicetree/bindings/clock/
H A Dmediatek,ethsys.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
50 clock-controller@1b000000 {
H A Dmediatek,mt8192-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
180 ipesys: clock-controller@1b000000 {
H A Dmediatek,mt8195-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
227 vencsys_core1: clock-controller@1b000000 {
/linux/Documentation/devicetree/bindings/display/
H A Darm,hdlcd.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
62 hdlcd@2b000000 {
/linux/Documentation/devicetree/bindings/mfd/
H A Drealtek,rtl9301-switch.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
52 ethernet-switch@1b000000 {
77 #gpio-cells = <2>;
82 i2c@2 {
83 reg = <2>;
89 #gpio-cells = <2>;
108 #gpio-cells = <2>;
/linux/arch/powerpc/kernel/
H A Ddawr.c27 dawrx |= ((brk->type & (HW_BRK_TYPE_TRANSLATE)) >> 2) << (63 - 59); in set_dawr()
31 * doublewords (64 bits) biased by -1 eg. 0b000000=1DW and in set_dawr()
/linux/arch/arm/boot/dts/arm/
H A Dvexpress-v2p-ca15-tc1.dts20 #address-cells = <2>;
21 #size-cells = <2>;
57 #address-cells = <2>;
58 #size-cells = <2>;
61 /* Chipselect 2 is physically at 0x18000000 */
70 hdlcd@2b000000 {
78 memory-controller@2b0a0000 {
85 wdt@2b060000 {
94 gic: interrupt-controller@2c001000 {
202 arm,vexpress-sysreg,func = <2 0>;
[all …]
H A Dvexpress-v2p-ca15_a7.dts20 #address-cells = <2>;
21 #size-cells = <2>;
58 cpu2: cpu@2 {
113 #address-cells = <2>;
114 #size-cells = <2>;
117 /* Chipselect 2 is physically at 0x18000000 */
126 wdt@2a490000 {
134 hdlcd@2b000000 {
142 memory-controller@2b0a0000 {
149 gic: interrupt-controller@2c001000 {
[all …]
H A Darm-realview-pb1176.dts132 usb@3b000000 {
209 led@8,2 {
214 label = "versatile:2";
316 cache-level = <2>;
368 #gpio-cells = <2>;
370 #interrupt-cells = <2>;
480 <0 2 IRQ_TYPE_LEVEL_HIGH>;
547 #gpio-cells = <2>;
549 #interrupt-cells = <2>;
560 #gpio-cells = <2>;
[all …]
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt6779.dtsi16 #address-cells = <2>;
17 #size-cells = <2>;
42 cpu2: cpu@2 {
115 #address-cells = <2>;
116 #size-cells = <2>;
179 #gpio-cells = <2>;
182 #interrupt-cells = <2>;
281 ipesys: clock-controller@1b000000 {
H A Dmt7622.dtsi20 #address-cells = <2>;
21 #size-cells = <2>;
68 #address-cells = <2>;
79 #cooling-cells = <2>;
94 #cooling-cells = <2>;
103 cache-level = <2>;
134 #address-cells = <2>;
135 #size-cells = <2>;
203 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
205 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
[all …]
/linux/Documentation/devicetree/bindings/remoteproc/
H A Dti,pru-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
163 icssg0: icssg@b000000 {
186 interrupts = <16 2 2>;
/linux/arch/arm/boot/dts/gemini/
H A Dgemini.dtsi24 bank-width = <2>;
174 reg-shift = <2>;
182 <15 IRQ_TYPE_EDGE_FALLING>, /* Timer 2 */
228 #interrupt-cells = <2>;
231 power-controller@4b000000 {
246 #gpio-cells = <2>;
248 #interrupt-cells = <2>;
258 #gpio-cells = <2>;
260 #interrupt-cells = <2>;
270 #gpio-cells = <2>;
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dipq5332.dtsi15 #address-cells = <2>;
16 #size-cells = <2>;
54 cpu2: cpu@2 {
76 cache-level = <2>;
123 #address-cells = <2>;
124 #size-cells = <2>;
178 bits = <7 2>;
194 #gpio-cells = <2>;
197 #interrupt-cells = <2>;
273 dmas = <&blsp_dma 2>, <&blsp_dma 3>;
[all …]
H A Dsdm670-google-sargo.dts38 #address-cells = <2>;
39 #size-cells = <2>;
81 #address-cells = <2>;
82 #size-cells = <2>;
84 mpss_region: mpss@8b000000 {
473 data-lanes = <0 1 2 3>;
529 drive-strength = <2>;
552 drive-strength = <2>;
560 drive-strength = <2>;
567 drive-strength = <2>;
H A Dipq9574.dtsi18 #address-cells = <2>;
19 #size-cells = <2>;
47 #cooling-cells = <2>;
60 #cooling-cells = <2>;
63 cpu2: cpu@2 {
73 #cooling-cells = <2>;
86 #cooling-cells = <2>;
91 cache-level = <2>;
191 #address-cells = <2>;
192 #size-cells = <2>;
[all …]
H A Dipq6018.dtsi15 #address-cells = <2>;
16 #size-cells = <2>;
47 #cooling-cells = <2>;
60 #cooling-cells = <2>;
63 cpu2: cpu@2 {
73 #cooling-cells = <2>;
86 #cooling-cells = <2>;
91 cache-level = <2>;
188 #address-cells = <2>;
189 #size-cells = <2>;
[all …]
H A Dsm6125.dtsi16 #address-cells = <2>;
17 #size-cells = <2>;
37 #address-cells = <2>;
49 cache-level = <2>;
63 cpu2: cpu@2 {
90 cache-level = <2>;
259 #address-cells = <2>;
260 #size-cells = <2>;
293 modem_mem: memory@4b000000 {
396 #gpio-cells = <2>;
[all …]
H A Dmsm8976.dtsi18 #address-cells = <2>;
19 #size-cells = <2>;
42 #cooling-cells = <2>;
53 #cooling-cells = <2>;
56 cpu2: cpu@2 {
64 #cooling-cells = <2>;
75 #cooling-cells = <2>;
86 #cooling-cells = <2>;
97 #cooling-cells = <2>;
108 #cooling-cells = <2>;
[all …]
/linux/arch/arm/boot/dts/mediatek/
H A Dmt7629.dtsi156 #gpio-cells = <2>;
157 #interrupt-cells = <2>;
246 #pwm-cells = <2>;
375 #size-cells = <2>;
403 <0 0 0 2 &pcie_intc1 1>,
404 <0 0 0 3 &pcie_intc1 2>,
430 ethsys: syscon@1b000000 {
H A Dmt2701.dtsi18 #address-cells = <2>;
19 #size-cells = <2>;
38 cpu@2 {
51 #address-cells = <2>;
52 #size-cells = <2>;
182 #gpio-cells = <2>;
184 #interrupt-cells = <2>;
523 #pwm-cells = <2>;
550 mediatek,larb-id = <2>;
624 #address-cells = <2>;
[all …]
H A Dmt7623.dtsi23 #address-cells = <2>;
24 #size-cells = <2>;
84 #cooling-cells = <2>;
96 #cooling-cells = <2>;
100 cpu2: cpu@2 {
108 #cooling-cells = <2>;
120 #cooling-cells = <2>;
257 #gpio-cells = <2>;
260 #interrupt-cells = <2>;
422 #pwm-cells = <2>;
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Dam33xx.dtsi100 /* OPP100-2 */
129 /* OPP120-2 */
143 /* OPP Turbo-2 */
157 target-module@4b000000 {
241 #dma-cells = <2>;
362 ti,sysc-delay-us = <2>;
393 &cppi41dma 2 0 &cppi41dma 3 0
400 &cppi41dma 1 1 &cppi41dma 2 1
471 #dma-cells = <2>;
554 gpmc,num-waitpins = <2>;
[all …]
/linux/arch/mips/boot/dts/img/
H A Dpistachio.dtsi47 interrupts = <GIC_SHARED 2 IRQ_TYPE_LEVEL_HIGH>;
232 dmas = <&mdc 1 0xffffffff 0>, <&mdc 2 0xffffffff 0>;
249 #pwm-cells = <2>;
261 reg-shift = <2>;
277 reg-shift = <2>;
306 #gpio-cells = <2>;
310 #interrupt-cells = <2>;
317 #gpio-cells = <2>;
321 #interrupt-cells = <2>;
328 #gpio-cells = <2>;
[all …]
/linux/arch/arm64/boot/dts/ti/
H A Dk3-am62-main.dtsi19 #address-cells = <2>;
20 #size-cells = <2>;
85 #address-cells = <2>;
86 #size-cells = <2>;
153 #dma-cells = <2>;
191 #power-domain-cells = <2>;
197 #clock-cells = <2>;
203 #reset-cells = <2>;
253 clocks = <&k3_clks 36 2>;
255 assigned-clocks = <&k3_clks 36 2>;
[all …]

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