Lines Matching +full:2 +full:b000000
20 #address-cells = <2>;
21 #size-cells = <2>;
68 #address-cells = <2>;
79 #cooling-cells = <2>;
94 #cooling-cells = <2>;
103 cache-level = <2>;
134 #address-cells = <2>;
135 #size-cells = <2>;
203 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
205 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
207 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) |
209 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) |
312 #gpio-cells = <2>;
317 #interrupt-cells = <2>;
437 #pwm-cells = <2>;
528 reg-shift = <2>;
765 #address-cells = <2>;
766 #size-cells = <2>;
811 #size-cells = <2>;
831 <0 0 0 2 &pcie_intc0 1>,
832 <0 0 0 3 &pcie_intc0 2>,
848 #size-cells = <2>;
869 <0 0 0 2 &pcie_intc1 1>,
870 <0 0 0 3 &pcie_intc1 2>,
906 #address-cells = <2>;
907 #size-cells = <2>;
925 ethsys: clock-controller@1b000000 {