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/linux/drivers/gpu/drm/panel/
H A Dpanel-sony-td4353-jdi.c190 .clock = (1080 + 4 + 8 + 8) * (2160 + 259 + 8 + 8) * 60 / 1000,
196 .vsync_start = 2160 + 259,
197 .vsync_end = 2160 + 259 + 8,
198 .vtotal = 2160 + 259 + 8 + 8,
/linux/Documentation/devicetree/bindings/bus/
H A Dxlnx,versal-net-cdx.yaml76 /* define map for RIDs 250-259 */
78 /* define msi map for RIDs 250-259 */
/linux/drivers/pinctrl/mediatek/
H A Dpinctrl-mt2701.c209 MTK_PIN_DRV_GRP(259, 0xc90, 0, 2),
268 MTK_PIN_PUPD_SPEC_SR(259, 0xc90, 8, 9, 10), /* ms0e clk */
334 MTK_PIN_IES_SMT_SPEC(259, 259, 0xc90, 4),
424 MTK_PIN_IES_SMT_SPEC(259, 259, 0xc90, 11),
450 MTK_PINMUX_SPEC(259, 0xef0, 0),
H A Dpinctrl-mt7623.c112 PIN_FIELD16(259, 259, 0xc90, 0x10, 4, 1),
200 PIN_FIELD16(259, 259, 0xc90, 0x10, 11, 1),
263 PIN_FIELD16(259, 259, 0xc90, 0x10, 0, 4),
312 PIN_FIELD16(259, 259, 0xc90, 0x10, 8, 1),
354 PIN_FIELD16(259, 259, 0xc90, 0x10, 9, 1),
396 PIN_FIELD16(259, 259, 0xc90, 0x10, 10, 1),
676 MT7623_PIN(259, "MSDC0E_CLK", 144, DRV_GRP4),
829 257, 258, 259, 260, };
/linux/include/dt-bindings/clock/
H A Dexynos5410.h38 #define CLK_UART2 259
H A Dexynos5250.h63 #define CLK_GSCL3 259
H A Drk3399-cru.h207 #define ACLK_ADB400M_PD_CORE_B 259
639 #define SRST_DPTX_SPDIF_REC 259
H A Dimx6qdl-clock.h269 #define IMX6QDL_CLK_MLB_SEL 259
/linux/Documentation/devicetree/bindings/reset/
H A Dzynq-reset.txt48 259: can1 ref reset
/linux/scripts/
H A Dsyscall.tbl291 # Architectures may provide up to 16 syscalls of their own between 244 and 259
306 259 riscv riscv_flush_icache sys_riscv_flush_icache
/linux/drivers/pinctrl/intel/
H A Dpinctrl-tigerlake.c319 PINCTRL_PIN(259, "DBG_PMODE"),
360 TGL_GPP(4, 251, 259, INTEL_GPIO_BASE_NOMAP), /* JTAG */
371 TGL_LP_COMMUNITY(2, 171, 259, tgllp_community4_gpps),
657 PINCTRL_PIN(259, "DDSP_HPD_B"),
/linux/arch/arm64/boot/dts/broadcom/stingray/
H A Dstingray-usb.dtsi37 interrupts = <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>;
/linux/include/dt-bindings/gce/
H A Dmediatek,mt6795-gce.h121 #define CMDQ_EVENT_JPGDEC_EOF 259
H A Dmt8183-gce.h122 #define CMDQ_EVENT_ISP_FRAME_DONE_P2_2 259
H A Dmt6779-gce.h136 #define CMDQ_EVENT_DIP_CQ_THREAD2_EOF 259
/linux/arch/arm64/boot/dts/ti/
H A Dk3-j722s-main.dtsi111 power-domains = <&k3_pds 259 TI_SCI_PD_EXCLUSIVE>;
112 clocks = <&k3_clks 259 0>, <&serdes1 CDNS_TORRENT_REFCLK_DRIVER>;
/linux/arch/mips/include/asm/sgi/
H A Dgio.h65 * 0x0c SMPTE 259M Video [*]
/linux/arch/x86/include/asm/xen/
H A Dinterface_32.h19 #define FLAT_RING1_CS 0xe019 /* GDT index 259 */
/linux/Documentation/devicetree/bindings/pci/
H A Drockchip-dw-pcie-ep.yaml79 <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH 0>,
/linux/include/dt-bindings/pinctrl/
H A Dmt6797-pinfunc.h1345 #define MT6797_GPIO259__FUNC_GPIO259 (MTK_PIN_NO(259) | 0)
1346 #define MT6797_GPIO259__FUNC_IO_JTAG_TDI (MTK_PIN_NO(259) | 1)
1347 #define MT6797_GPIO259__FUNC_LTE_JTAG_TDI (MTK_PIN_NO(259) | 2)
1348 #define MT6797_GPIO259__FUNC_DFD_TDI (MTK_PIN_NO(259) | 3)
1349 #define MT6797_GPIO259__FUNC_ANC_JTAG_TDI (MTK_PIN_NO(259) | 5)
1350 #define MT6797_GPIO259__FUNC_SCP_JTAG_TDI (MTK_PIN_NO(259) | 6)
1351 #define MT6797_GPIO259__FUNC_C2K_DM_OTDI (MTK_PIN_NO(259) | 7)
/linux/drivers/scsi/qla2xxx/
H A Dqla_tmpl.h39 #define ENTRY_TYPE_WR_IOB_T2 259
/linux/include/uapi/linux/
H A Dmajor.h175 #define BLOCK_EXT_MAJOR 259
/linux/drivers/crypto/intel/qat/qat_common/
H A Dicp_qat_hw_20_comp_defs.h104 #define ICP_QAT_HW_COMP_20_CONFIG_CSR_NICE_PARAM_DEFAULT_VAL 259
/linux/include/uapi/sound/sof/
H A Dtokens.h26 #define SOF_TPLG_KCTL_SWITCH_ID 259
/linux/include/uapi/sound/
H A Dsnd_ar_tokens.h231 #define AR_TKN_U32_MODULE_LOG_CODE 259

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