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/linux/lib/crypto/
H A Dsha3.c23 * On some 32-bit architectures, such as h8300, GCC ends up using over 1 KB of
52 static SHA3_INLINE void sha3_keccakf_one_round_generic(u64 st[25], int round) in sha3_keccakf_one_round_generic()
57 bc[0] = st[0] ^ st[5] ^ st[10] ^ st[15] ^ st[20]; in sha3_keccakf_one_round_generic()
58 bc[1] = st[1] in sha3_keccakf_one_round_generic()
[all...]
/linux/Documentation/devicetree/bindings/iio/accel/
H A Dlis302.txt8 - compatible: should be set to "st,lis3lv02d-spi"
15 - compatible: should be set to "st,lis3lv02d"
23 - st,click-single-{x,y,z}: if present, tells the device to issue an
26 - st,click-double-{x,y,z}: if present, tells the device to issue an
29 - st,click-thresh-{x,y,z}: set the x/y/z axis threshold
30 - st,click-click-time-limit: click time limit, from 0 to 127.5msec
32 - st,click-latency: click latency, from 0 to 255 msec with
33 step of 1 msec.
34 - st,click-window: click window, from 0 to 255 msec with
35 step of 1 msec.
[all …]
/linux/drivers/accel/ethosu/
H A Dethosu_gem.c150 static void cmd_state_init(struct cmd_state *st) in cmd_state_init() argument
152 /* Initialize to all 1s to detect missing setup */ in cmd_state_init()
153 memset(st, 0xff, sizeof(*st)); in cmd_state_init()
158 return (((u64)cmd[0] & 0xff0000) << 16) | cmd[1]; in cmd_to_addr()
170 if (mode >= 1) { in dma_length()
178 if (dma->stride[1] < 0 && (u64)(-dma->stride[1]) > len) in dma_length()
180 len += dma->stride[1]; in dma_length()
219 if (x >= fm->width0 + 1) { in feat_matrix_length()
220 x -= fm->width0 + 1; in feat_matrix_length()
221 tile += 1; in feat_matrix_length()
[all …]
/linux/Documentation/devicetree/bindings/iio/
H A Dst,st-sensors.yaml4 $id: http://devicetree.org/schemas/iio/st,st-sensors.yaml#
16 - Denis Ciocca <denis.ciocca@st.com>
24 - st,h3lis331dl-accel
25 - st,lis2de12
26 - st,lis2dw12
27 - st,lis2hh12
28 - st,lis2dh12-accel
29 - st,lis2ds12
30 - st,lis302dl
31 - st,lis331dl-accel
[all …]
/linux/drivers/iio/dac/
H A Dad3552r-hs.c71 static int ad3552r_hs_reg_read(struct ad3552r_hs_state *st, u32 reg, u32 *val, in ad3552r_hs_reg_read() argument
75 WARN_ON_ONCE(st->config_d & AD3552R_MASK_SPI_CONFIG_DDR); in ad3552r_hs_reg_read()
77 return st->data->bus_reg_read(st->back, reg, val, xfer_size); in ad3552r_hs_reg_read()
80 static int ad3552r_hs_set_data_source(struct ad3552r_hs_state *st, in ad3552r_hs_set_data_source() argument
85 for (i = 0; i < st->model_data->num_hw_channels; ++i) { in ad3552r_hs_set_data_source()
86 ret = iio_backend_data_source_set(st->back, i, type); in ad3552r_hs_set_data_source()
94 static int ad3552r_hs_update_reg_bits(struct ad3552r_hs_state *st, u32 reg, in ad3552r_hs_update_reg_bits() argument
100 ret = ad3552r_hs_reg_read(st, reg, &rval, xfer_size); in ad3552r_hs_update_reg_bits()
106 return st->data->bus_reg_write(st->back, reg, rval, xfer_size); in ad3552r_hs_update_reg_bits()
113 struct ad3552r_hs_state *st = iio_priv(indio_dev); in ad3552r_hs_read_raw() local
[all …]
H A Dad5592r-base.c26 struct ad5592r_state *st = gpiochip_get_data(chip); in ad5592r_gpio_get() local
30 scoped_guard(mutex, &st->gpio_lock) { in ad5592r_gpio_get()
31 if (st->gpio_out & BIT(offset)) in ad5592r_gpio_get()
32 val = st->gpio_val; in ad5592r_gpio_get()
34 ret = st->ops->gpio_read(st, &val); in ad5592r_gpio_get()
46 struct ad5592r_state *st = gpiochip_get_data(chip); in ad5592r_gpio_set() local
48 guard(mutex)(&st->gpio_lock); in ad5592r_gpio_set()
51 st->gpio_val |= BIT(offset); in ad5592r_gpio_set()
53 st->gpio_val &= ~BIT(offset); in ad5592r_gpio_set()
55 return st->ops->reg_write(st, AD5592R_REG_GPIO_SET, st->gpio_val); in ad5592r_gpio_set()
[all …]
H A Dad7293.c133 static const int dac_offset_table[] = {0, 1, 2};
135 static const int isense_gain_table[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10};
137 static const int adc_range_table[] = {0, 1, 2, 3};
149 static int ad7293_page_select(struct ad7293_state *st, unsigned int reg) in ad7293_page_select() argument
153 if (st->page_select != FIELD_GET(AD7293_PAGE_ADDR_MSK, reg)) { in ad7293_page_select()
154 st->data[0] = FIELD_GET(AD7293_REG_ADDR_MSK, AD7293_REG_PAGE_SELECT); in ad7293_page_select()
155 st->data[1] = FIELD_GET(AD7293_PAGE_ADDR_MSK, reg); in ad7293_page_select()
157 ret = spi_write(st->spi, &st->data[0], 2); in ad7293_page_select()
161 st->page_select = FIELD_GET(AD7293_PAGE_ADDR_MSK, reg); in ad7293_page_select()
167 static int __ad7293_spi_read(struct ad7293_state *st, unsigned int reg, in __ad7293_spi_read() argument
[all …]
/linux/drivers/gpu/drm/etnaviv/
H A Detnaviv_cmd_parser.c26 #define ST(start, num) { (start) >> 2, (num) } macro
28 ST(0x1200, 1),
29 ST(0x1228, 1),
30 ST(0x1238, 1),
31 ST(0x1284, 1),
32 ST(0x128c, 1),
33 ST(0x1304, 1),
34 ST(0x1310, 1),
35 ST(0x1318, 1),
36 ST(0x12800, 4),
[all …]
/linux/drivers/iio/adc/
H A Dad7298.c31 #define AD7298_TAVG BIT(1) /* temperature sensor averaging enable */
58 .indexed = 1, \
75 .indexed = 1,
81 .scan_index = -1,
89 AD7298_V_CHAN(1),
105 struct ad7298_state *st = iio_priv(indio_dev); in ad7298_update_scan_mode() local
114 command = AD7298_WRITE | st->ext_ref; in ad7298_update_scan_mode()
116 for (i = 0, m = AD7298_CH(0); i < AD7298_MAX_CHAN; i++, m >>= 1) in ad7298_update_scan_mode()
120 st->tx_buf[0] = cpu_to_be16(command); in ad7298_update_scan_mode()
123 st->ring_xfer[0].tx_buf = &st->tx_buf[0]; in ad7298_update_scan_mode()
[all …]
H A Dad7192.c37 #define AD7192_REG_MODE 1 /* Mode Register (RW, 24-bit */
60 #define AD7192_STAT_CH2 BIT(1) /* Channel 2 */
61 #define AD7192_STAT_CH1 BIT(0) /* Channel 1 */
79 #define AD7192_MODE_SINGLE 1 /* Single Conversion Mode */
90 #define AD7192_CLK_EXT_MCLK2 1 /* External Clock applied to MCLK2 */
109 #define AD7192_CH_AIN3P_AIN4M BIT(1) /* AIN3(+) - AIN4(-) */
133 #define AD7194_CH_POS(x) (((x) - 1) << 4)
134 #define AD7194_CH_NEG(x) ((x) - 1)
142 #define AD7194_CH_AIN_START 1
160 #define AD7192_GPOCON_P1DAT BIT(1) /* P1 state */
[all …]
H A Dad4691.c85 #define AD4691_ADC_MODE_MASK GENMASK(1, 0)
139 .indexed = 1, \
165 .indexed = 1, \
194 .indexed = 1, \
215 .indexed = 1, \
232 AD4691_CHANNEL(1),
252 AD4691_CHANNEL(1),
268 AD4691_OFFLOAD_CHANNEL(1),
287 AD4691_OFFLOAD_CHANNEL(1),
298 AD4691_MANUAL_CHANNEL(1),
[all …]
H A Dad7625.c49 .indexed = 1, \
50 .differential = 1, \
52 .channel2 = 1, \
175 static int ad7625_set_sampling_freq(struct ad7625_state *st, u32 freq) in ad7625_set_sampling_freq() argument
188 cnv_wf.duty_length_ns = st->info->timing_spec->conv_high_ns; in ad7625_set_sampling_freq()
190 ret = pwm_round_waveform_might_sleep(st->cnv_pwm, &cnv_wf); in ad7625_set_sampling_freq()
201 st->info->chan_spec.scan_type.realbits, in ad7625_set_sampling_freq()
202 st->ref_clk_rate_hz); in ad7625_set_sampling_freq()
205 clk_gate_wf.duty_offset_ns = st->info->timing_spec->conv_msb_ns; in ad7625_set_sampling_freq()
207 ret = pwm_round_waveform_might_sleep(st->clk_gate_pwm, &clk_gate_wf); in ad7625_set_sampling_freq()
[all …]
H A Dad7280a.c45 #define AD7280A_CTRL_HB_CONV_INPUT_6CELL_AUX1_3_5 1
50 #define AD7280A_CTRL_HB_CONV_RREAD_6CELL_AUX1_3_5 1
55 #define AD7280A_CTRL_HB_CONV_START_CS 1
56 #define AD7280A_CTRL_HB_CONV_AVG_MSK GENMASK(2, 1)
58 #define AD7280A_CTRL_HB_CONV_AVG_2 1
67 #define AD7280A_CTRL_LB_ACQ_TIME_800ns 1
73 #define AD7280A_CTRL_LB_INC_DEV_ADDR_MSK BIT(1)
84 #define AD7280A_ALERT_REMOVE_AUX3_AUX5 BIT(1)
124 #define AD7280A_MAX_SPI_CLK_HZ 700000 /* < 1MHz */
129 AD7280A_CELL_VOLTAGE_1_REG + 1)
[all …]
H A Dti-ads1119.c44 #define ADS1119_CONFIG_CM_FIELD BIT(1)
50 #define ADS1119_VREF_EXTERNAL 1
54 #define ADS1119_CM_CONTINUOUS 1
57 #define ADS1119_DR_90_SPS 1
62 #define ADS1119_GAIN_4 1
65 #define ADS1119_MUX_AIN2_AIN3 1
77 #define ADS1119_DEFAULT_GAIN 1
114 1, 1,
115 1, 4,
118 static int ads1119_upd_cfg_reg(struct ads1119_state *st, unsigned int fields, in ads1119_upd_cfg_reg() argument
[all …]
H A Dad7191.c30 #define AD7191_TEMP_MASK BIT(1)
73 struct ad7191_state *st = ad_sigma_delta_to_ad7191(sd); in ad7191_set_channel() local
82 gpiod_set_value(st->chan_gpio, chan_gpio_val); in ad7191_set_channel()
83 gpiod_set_value(st->temp_gpio, temp_gpio_val); in ad7191_set_channel()
96 spi_message_init_with_transfers(&m, &t, 1); in ad7191_set_cs()
104 struct ad7191_state *st = ad_sigma_delta_to_ad7191(sd); in ad7191_set_mode() local
109 return ad7191_set_cs(&st->sd, 1); in ad7191_set_mode()
111 return ad7191_set_cs(&st->sd, 0); in ad7191_set_mode()
125 struct ad7191_state *st = iio_priv(indio_dev); in ad7191_init_regulators() local
126 struct device *dev = &st->sd.spi->dev; in ad7191_init_regulators()
[all …]
H A Dnau7802.c21 #define NAU7802_PUCTRL_RR_BIT NAU7802_PUCTRL_RR(1)
22 #define NAU7802_PUCTRL_PUD(x) (x << 1)
23 #define NAU7802_PUCTRL_PUD_BIT NAU7802_PUCTRL_PUD(1)
25 #define NAU7802_PUCTRL_PUA_BIT NAU7802_PUCTRL_PUA(1)
27 #define NAU7802_PUCTRL_PUR_BIT NAU7802_PUCTRL_PUR(1)
29 #define NAU7802_PUCTRL_CS_BIT NAU7802_PUCTRL_CS(1)
31 #define NAU7802_PUCTRL_CR_BIT NAU7802_PUCTRL_CR(1)
33 #define NAU7802_PUCTRL_AVDDS_BIT NAU7802_PUCTRL_AVDDS(1)
42 #define NAU7802_CTRL2_CHS_BIT NAU7802_CTRL2_CHS(1)
64 .indexed = 1, \
[all …]
H A Dad7779.c85 #define AD7779_DCLK_CLK_DIV_MSK GENMASK(3, 1)
171 static int ad7779_spi_read(struct ad7779_state *st, u8 reg, u8 *rbuf) in ad7779_spi_read() argument
177 .tx_buf = st->reg_tx_buf, in ad7779_spi_read()
178 .rx_buf = st->reg_rx_buf, in ad7779_spi_read()
181 st->reg_tx_buf[0] = AD7779_SPI_READ_CMD | FIELD_GET(AD7779_REG_MSK, reg); in ad7779_spi_read()
182 st->reg_tx_buf[1] = 0; in ad7779_spi_read()
188 st->reg_tx_buf[2] = crc8(ad7779_crc8_table, st->reg_tx_buf, in ad7779_spi_read()
189 t.len - 1, 0); in ad7779_spi_read()
192 ret = spi_sync_transfer(st->spi, &t, 1); in ad7779_spi_read()
197 crc_buf[1] = st->reg_rx_buf[1]; in ad7779_spi_read()
[all …]
H A Dat91-sama5d2_adc.c44 #define AT91_SAMA5D2_CR_START BIT(1)
53 #define AT91_SAMA5D2_MR_TRGSEL(v) ((v) << 1)
57 #define AT91_SAMA5D2_MR_TRGSEL_TRIG1 1
64 /* PWM event line 1 */
96 /* Channel Sequence Register 1 */
152 #define AT91_SAMA5D2_EMR_OSR_4SAMPLES 1
162 #define AT91_SAMA5D2_TRACKX_TS (1)
178 #define AT91_SAMA5D2_ACR_PENDETSENS_MASK GENMASK(1, 0)
187 #define AT91_SAMA5D2_TSMR_TSMODE_4WIRE_NO_PRESS 1
224 #define AT91_SAMA5D2_TRGR_TRGMOD_EXT_TRIG_RISE 1
[all …]
/linux/drivers/staging/iio/frequency/
H A Dad9832.c125 static int ad9832_write_frequency(struct ad9832_state *st, in ad9832_write_frequency() argument
133 clk_freq = clk_get_rate(st->mclk); in ad9832_write_frequency()
144 st->freq_data[i] = cpu_to_be16(FIELD_PREP(AD9832_CMD_MSK, freq_cmd) | in ad9832_write_frequency()
149 return spi_sync(st->spi, &st->freq_msg); in ad9832_write_frequency()
152 static int ad9832_write_phase(struct ad9832_state *st, in ad9832_write_phase() argument
166 st->phase_data[i] = cpu_to_be16(FIELD_PREP(AD9832_CMD_MSK, phase_cmd) | in ad9832_write_phase()
171 return spi_sync(st->spi, &st->phase_msg); in ad9832_write_phase()
178 struct ad9832_state *st = iio_priv(indio_dev); in ad9832_write() local
187 mutex_lock(&st->lock); in ad9832_write()
191 ret = ad9832_write_frequency(st, this_attr->address, val); in ad9832_write()
[all …]
H A Dad9834.c50 #define AD9834_MODE BIT(1)
55 #define RES_MASK(bits) (BIT(bits) - 1)
110 static int ad9834_write_frequency(struct ad9834_state *st, in ad9834_write_frequency() argument
116 clk_freq = clk_get_rate(st->mclk); in ad9834_write_frequency()
123 st->freq_data[0] = cpu_to_be16(addr | (regval & in ad9834_write_frequency()
125 st->freq_data[1] = cpu_to_be16(addr | ((regval >> in ad9834_write_frequency()
129 return spi_sync(st->spi, &st->freq_msg); in ad9834_write_frequency()
132 static int ad9834_write_phase(struct ad9834_state *st, in ad9834_write_phase() argument
137 st->data = cpu_to_be16(addr | phase); in ad9834_write_phase()
139 return spi_sync(st->spi, &st->msg); in ad9834_write_phase()
[all …]
/linux/drivers/macintosh/
H A Dwindfarm_pid.c25 void wf_pid_init(struct wf_pid_state *st, struct wf_pid_param *param) in wf_pid_init() argument
27 memset(st, 0, sizeof(struct wf_pid_state)); in wf_pid_init()
28 st->param = *param; in wf_pid_init()
29 st->first = 1; in wf_pid_init()
33 s32 wf_pid_run(struct wf_pid_state *st, s32 new_sample) in wf_pid_run() argument
37 int i, hlen = st->param.history_len; in wf_pid_run()
40 error = new_sample - st->param.itarget; in wf_pid_run()
43 if (st->first) { in wf_pid_run()
45 st->samples[i] = new_sample; in wf_pid_run()
46 st->errors[i] = error; in wf_pid_run()
[all …]
/linux/drivers/iio/frequency/
H A Dadrf6780.c51 #define ADRF6780_LO_EN_MSK BIT(1)
65 #define ADRF6780_ADC_EN_MSK BIT(1)
90 static int __adrf6780_spi_read(struct adrf6780_state *st, unsigned int reg, in __adrf6780_spi_read() argument
96 st->data[0] = 0x80 | (reg << 1); in __adrf6780_spi_read()
97 st->data[1] = 0x0; in __adrf6780_spi_read()
98 st->data[2] = 0x0; in __adrf6780_spi_read()
100 t.rx_buf = &st->data[0]; in __adrf6780_spi_read()
101 t.tx_buf = &st->data[0]; in __adrf6780_spi_read()
104 ret = spi_sync_transfer(st->spi, &t, 1); in __adrf6780_spi_read()
108 *val = (get_unaligned_be24(&st->data[0]) >> 1) & GENMASK(15, 0); in __adrf6780_spi_read()
[all …]
/linux/drivers/media/usb/dvb-usb-v2/
H A Dlmedm04.c92 MODULE_PARM_DESC(debug, "set debugging level (1=info (or-able)).");
96 MODULE_PARM_DESC(firmware, "set default firmware 0=Sharp7395 1=LG");
100 MODULE_PARM_DESC(pid, "set default 0=default 1=off 2=on");
143 struct lme2510_state *st = d->priv; in lme2510_usb_talk() local
146 if (max(wlen, rlen) > sizeof(st->usb_buffer)) in lme2510_usb_talk()
153 memcpy(st->usb_buffer, wbuf, wlen); in lme2510_usb_talk()
155 ret = dvb_usbv2_generic_rw_locked(d, st->usb_buffer, wlen, in lme2510_usb_talk()
156 st->usb_buffer, rlen); in lme2510_usb_talk()
159 memcpy(rbuf, st->usb_buffer, rlen); in lme2510_usb_talk()
168 struct lme2510_state *st = d->priv; in lme2510_stream_restart() local
[all …]
/linux/Documentation/devicetree/bindings/iio/adc/
H A Dst,stm32-dfsdm-adc.yaml4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml#
10 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
11 - Olivier Moysan <olivier.moysan@foss.st.com>
28 - st,stm32h7-dfsdm
29 - st,stm32mp1-dfsdm
32 maxItems: 1
40 minItems: 1
46 minItems: 1
49 const: 1
63 minItems: 1
[all …]
/linux/tools/testing/selftests/kvm/
H A Dsteal_time.c25 #define ST_GPA_BASE (1 << 30)
35 static void check_status(struct kvm_steal_time *st) in check_status() argument
37 GUEST_ASSERT(!(READ_ONCE(st->version) & 1)); in check_status()
38 GUEST_ASSERT_EQ(READ_ONCE(st->flags), 0); in check_status()
39 GUEST_ASSERT_EQ(READ_ONCE(st->preempted), 0); in check_status()
44 struct kvm_steal_time *st = st_gva[cpu]; in guest_code() local
49 memset(st, 0, sizeof(*st)); in guest_code()
52 check_status(st); in guest_code()
81 struct kvm_steal_time *st = addr_gva2hva(vm, (ulong)st_gva[vcpu_idx]); steal_time_dump() local
134 check_status(struct st_time * st) check_status() argument
142 struct st_time *st; guest_code() local
199 struct st_time *st = addr_gva2hva(vm, (ulong)st_gva[vcpu_idx]); steal_time_dump() local
267 check_status(struct sta_struct * st) check_status() argument
276 struct sta_struct *st = st_gva[cpu]; guest_code() local
321 struct sta_struct *st = addr_gva2hva(vm, (ulong)st_gva[vcpu_idx]); steal_time_dump() local
384 check_status(struct kvm_steal_time * st) check_status() argument
394 struct kvm_steal_time *st = st_gva[cpu]; guest_code() local
458 struct kvm_steal_time *st = addr_gva2hva(vm, (ulong)st_gva[vcpu_idx]); steal_time_dump() local
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