Lines Matching +full:1 +full:st
32 #define ADF4377_0000_LSB_FIRST_MSK BIT(1)
158 #define ADF4377_0019_PD_ADC_MSK BIT(1)
174 #define ADF4377_001A_PD_CLKOUT1_MSK BIT(1)
202 #define ADF4377_001D_CP_DOWN_MSK BIT(1)
286 #define ADF4377_002E_EN_ADC_MSK BIT(1)
294 #define ADF4377_002F_DCLK_DIV1_MSK GENMASK(1, 0)
330 #define ADF4377_003D_O_VCO_BIAS_MSK BIT(1)
353 #define ADF4377_0049_FSM_BUSY_MSK BIT(1)
357 #define ADF4377_004B_VCO_CORE_MSK GENMASK(1, 0)
479 struct adf4377_state *st = iio_priv(indio_dev); in adf4377_reg_access() local
482 return regmap_read(st->regmap, reg, read_val); in adf4377_reg_access()
484 return regmap_write(st->regmap, reg, write_val); in adf4377_reg_access()
491 static int adf4377_soft_reset(struct adf4377_state *st) in adf4377_soft_reset() argument
496 ret = regmap_update_bits(st->regmap, 0x0, ADF4377_0000_SOFT_RESET_MSK | in adf4377_soft_reset()
498 FIELD_PREP(ADF4377_0000_SOFT_RESET_MSK, 1) | in adf4377_soft_reset()
499 FIELD_PREP(ADF4377_0000_SOFT_RESET_R_MSK, 1)); in adf4377_soft_reset()
503 return regmap_read_poll_timeout(st->regmap, 0x0, read_val, in adf4377_soft_reset()
508 static int adf4377_get_freq(struct adf4377_state *st, u64 *freq) in adf4377_get_freq() argument
514 mutex_lock(&st->lock); in adf4377_get_freq()
515 ret = regmap_read(st->regmap, 0x12, &ref_div_factor); in adf4377_get_freq()
519 ret = regmap_bulk_read(st->regmap, 0x10, st->buf, sizeof(st->buf)); in adf4377_get_freq()
523 clkin_freq = clk_get_rate(st->clkin); in adf4377_get_freq()
526 get_unaligned_le16(&st->buf)); in adf4377_get_freq()
530 mutex_unlock(&st->lock); in adf4377_get_freq()
535 static int adf4377_set_freq(struct adf4377_state *st, u64 freq) in adf4377_set_freq() argument
541 mutex_lock(&st->lock); in adf4377_set_freq()
548 ret = regmap_update_bits(st->regmap, 0x1C, ADF4377_001C_EN_DNCLK_MSK | in adf4377_set_freq()
550 FIELD_PREP(ADF4377_001C_EN_DNCLK_MSK, 1) | in adf4377_set_freq()
551 FIELD_PREP(ADF4377_001C_EN_DRCLK_MSK, 1)); in adf4377_set_freq()
555 ret = regmap_update_bits(st->regmap, 0x11, ADF4377_0011_EN_AUTOCAL_MSK | in adf4377_set_freq()
557 FIELD_PREP(ADF4377_0011_EN_AUTOCAL_MSK, 1) | in adf4377_set_freq()
558 FIELD_PREP(ADF4377_0011_DCLK_DIV2_MSK, st->dclk_div2)); in adf4377_set_freq()
562 ret = regmap_update_bits(st->regmap, 0x2E, ADF4377_002E_EN_ADC_CNV_MSK | in adf4377_set_freq()
565 FIELD_PREP(ADF4377_002E_EN_ADC_CNV_MSK, 1) | in adf4377_set_freq()
566 FIELD_PREP(ADF4377_002E_EN_ADC_MSK, 1) | in adf4377_set_freq()
572 ret = regmap_update_bits(st->regmap, 0x20, ADF4377_0020_EN_ADC_CLK_MSK, in adf4377_set_freq()
573 FIELD_PREP(ADF4377_0020_EN_ADC_CLK_MSK, 1)); in adf4377_set_freq()
577 ret = regmap_update_bits(st->regmap, 0x2F, ADF4377_002F_DCLK_DIV1_MSK, in adf4377_set_freq()
578 FIELD_PREP(ADF4377_002F_DCLK_DIV1_MSK, st->dclk_div1)); in adf4377_set_freq()
582 ret = regmap_update_bits(st->regmap, 0x24, ADF4377_0024_DCLK_MODE_MSK, in adf4377_set_freq()
583 FIELD_PREP(ADF4377_0024_DCLK_MODE_MSK, st->dclk_mode)); in adf4377_set_freq()
587 ret = regmap_write(st->regmap, 0x27, in adf4377_set_freq()
589 st->synth_lock_timeout)); in adf4377_set_freq()
593 ret = regmap_update_bits(st->regmap, 0x28, ADF4377_0028_SYNTH_LOCK_TO_MSB_MSK, in adf4377_set_freq()
595 st->synth_lock_timeout >> 8)); in adf4377_set_freq()
599 ret = regmap_write(st->regmap, 0x29, in adf4377_set_freq()
601 st->vco_alc_timeout)); in adf4377_set_freq()
605 ret = regmap_update_bits(st->regmap, 0x2A, ADF4377_002A_VCO_ALC_TO_MSB_MSK, in adf4377_set_freq()
607 st->vco_alc_timeout >> 8)); in adf4377_set_freq()
611 ret = regmap_write(st->regmap, 0x26, in adf4377_set_freq()
612 FIELD_PREP(ADF4377_0026_VCO_BAND_DIV_MSK, st->vco_band_div)); in adf4377_set_freq()
616 ret = regmap_write(st->regmap, 0x2D, in adf4377_set_freq()
617 FIELD_PREP(ADF4377_002D_ADC_CLK_DIV_MSK, st->adc_clk_div)); in adf4377_set_freq()
621 st->clkout_div_sel = 0; in adf4377_set_freq()
626 f_vco <<= 1; in adf4377_set_freq()
627 st->clkout_div_sel++; in adf4377_set_freq()
630 st->n_int = div_u64(freq, st->f_pfd); in adf4377_set_freq()
632 ret = regmap_update_bits(st->regmap, 0x11, ADF4377_0011_EN_RDBLR_MSK | in adf4377_set_freq()
635 FIELD_PREP(ADF4377_0011_N_INT_MSB_MSK, st->n_int >> 8)); in adf4377_set_freq()
639 ret = regmap_update_bits(st->regmap, 0x12, ADF4377_0012_R_DIV_MSK | in adf4377_set_freq()
641 FIELD_PREP(ADF4377_0012_CLKOUT_DIV_MSK, st->clkout_div_sel) | in adf4377_set_freq()
642 FIELD_PREP(ADF4377_0012_R_DIV_MSK, st->ref_div_factor)); in adf4377_set_freq()
646 ret = regmap_write(st->regmap, 0x10, in adf4377_set_freq()
647 FIELD_PREP(ADF4377_0010_N_INT_LSB_MSK, st->n_int)); in adf4377_set_freq()
651 ret = regmap_read_poll_timeout(st->regmap, 0x49, read_val, in adf4377_set_freq()
657 ret = regmap_update_bits(st->regmap, 0x1C, ADF4377_001C_EN_DNCLK_MSK | in adf4377_set_freq()
665 ret = regmap_update_bits(st->regmap, 0x20, ADF4377_0020_EN_ADC_CLK_MSK, in adf4377_set_freq()
671 ret = regmap_update_bits(st->regmap, 0x19, ADF4377_0019_CLKOUT2_OP_MSK | in adf4377_set_freq()
679 mutex_unlock(&st->lock); in adf4377_set_freq()
684 static void adf4377_gpio_init(struct adf4377_state *st) in adf4377_gpio_init() argument
686 if (st->gpio_ce) { in adf4377_gpio_init()
687 gpiod_set_value(st->gpio_ce, 1); in adf4377_gpio_init()
693 if (st->gpio_enclk1) in adf4377_gpio_init()
694 gpiod_set_value(st->gpio_enclk1, 1); in adf4377_gpio_init()
696 if (st->gpio_enclk2) in adf4377_gpio_init()
697 gpiod_set_value(st->gpio_enclk2, 1); in adf4377_gpio_init()
700 static int adf4377_init(struct adf4377_state *st) in adf4377_init() argument
702 struct spi_device *spi = st->spi; in adf4377_init()
705 adf4377_gpio_init(st); in adf4377_init()
707 ret = adf4377_soft_reset(st); in adf4377_init()
713 ret = regmap_multi_reg_write(st->regmap, adf4377_reg_defaults, in adf4377_init()
720 ret = regmap_update_bits(st->regmap, 0x00, in adf4377_init()
731 st->clkin_freq = clk_get_rate(st->clkin); in adf4377_init()
734 ret = regmap_write(st->regmap, 0x1a, in adf4377_init()
749 ret = regmap_update_bits(st->regmap, 0x1D, in adf4377_init()
751 FIELD_PREP(ADF4377_001D_MUXOUT_MSK, st->muxout_select)); in adf4377_init()
756 st->ref_div_factor = 0; in adf4377_init()
758 st->ref_div_factor++; in adf4377_init()
759 st->f_pfd = st->clkin_freq / st->ref_div_factor; in adf4377_init()
760 } while (st->f_pfd > ADF4377_MAX_FREQ_PFD); in adf4377_init()
762 if (st->f_pfd > ADF4377_MAX_FREQ_PFD || st->f_pfd < ADF4377_MIN_FREQ_PFD) in adf4377_init()
765 st->f_div_rclk = st->f_pfd; in adf4377_init()
767 if (st->f_pfd <= ADF4377_FREQ_PFD_80MHZ) { in adf4377_init()
768 st->dclk_div1 = ADF4377_002F_DCLK_DIV1_1; in adf4377_init()
769 st->dclk_div2 = ADF4377_0011_DCLK_DIV2_1; in adf4377_init()
770 st->dclk_mode = 0; in adf4377_init()
771 } else if (st->f_pfd <= ADF4377_FREQ_PFD_125MHZ) { in adf4377_init()
772 st->dclk_div1 = ADF4377_002F_DCLK_DIV1_1; in adf4377_init()
773 st->dclk_div2 = ADF4377_0011_DCLK_DIV2_1; in adf4377_init()
774 st->dclk_mode = 1; in adf4377_init()
775 } else if (st->f_pfd <= ADF4377_FREQ_PFD_160MHZ) { in adf4377_init()
776 st->dclk_div1 = ADF4377_002F_DCLK_DIV1_2; in adf4377_init()
777 st->dclk_div2 = ADF4377_0011_DCLK_DIV2_1; in adf4377_init()
778 st->dclk_mode = 0; in adf4377_init()
779 st->f_div_rclk /= 2; in adf4377_init()
780 } else if (st->f_pfd <= ADF4377_FREQ_PFD_250MHZ) { in adf4377_init()
781 st->dclk_div1 = ADF4377_002F_DCLK_DIV1_2; in adf4377_init()
782 st->dclk_div2 = ADF4377_0011_DCLK_DIV2_1; in adf4377_init()
783 st->dclk_mode = 1; in adf4377_init()
784 st->f_div_rclk /= 2; in adf4377_init()
785 } else if (st->f_pfd <= ADF4377_FREQ_PFD_320MHZ) { in adf4377_init()
786 st->dclk_div1 = ADF4377_002F_DCLK_DIV1_2; in adf4377_init()
787 st->dclk_div2 = ADF4377_0011_DCLK_DIV2_2; in adf4377_init()
788 st->dclk_mode = 0; in adf4377_init()
789 st->f_div_rclk /= 4; in adf4377_init()
791 st->dclk_div1 = ADF4377_002F_DCLK_DIV1_2; in adf4377_init()
792 st->dclk_div2 = ADF4377_0011_DCLK_DIV2_2; in adf4377_init()
793 st->dclk_mode = 1; in adf4377_init()
794 st->f_div_rclk /= 4; in adf4377_init()
797 st->synth_lock_timeout = DIV_ROUND_UP(st->f_div_rclk, 50000); in adf4377_init()
798 st->vco_alc_timeout = DIV_ROUND_UP(st->f_div_rclk, 20000); in adf4377_init()
799 st->vco_band_div = DIV_ROUND_UP(st->f_div_rclk, 150000 * 16 * (1 << st->dclk_mode)); in adf4377_init()
800 st->adc_clk_div = DIV_ROUND_UP((st->f_div_rclk / 400000 - 2), 4); in adf4377_init()
808 struct adf4377_state *st = iio_priv(indio_dev); in adf4377_read() local
814 ret = adf4377_get_freq(st, &val); in adf4377_read()
828 struct adf4377_state *st = iio_priv(indio_dev); in adf4377_write() local
838 ret = adf4377_set_freq(st, freq); in adf4377_write()
869 .indexed = 1,
870 .output = 1,
876 static int adf4377_properties_parse(struct adf4377_state *st) in adf4377_properties_parse() argument
878 struct spi_device *spi = st->spi; in adf4377_properties_parse()
881 st->clkin = devm_clk_get_enabled(&spi->dev, "ref_in"); in adf4377_properties_parse()
882 if (IS_ERR(st->clkin)) in adf4377_properties_parse()
883 return dev_err_probe(&spi->dev, PTR_ERR(st->clkin), in adf4377_properties_parse()
886 st->gpio_ce = devm_gpiod_get_optional(&st->spi->dev, "chip-enable", in adf4377_properties_parse()
888 if (IS_ERR(st->gpio_ce)) in adf4377_properties_parse()
889 return dev_err_probe(&spi->dev, PTR_ERR(st->gpio_ce), in adf4377_properties_parse()
892 st->gpio_enclk1 = devm_gpiod_get_optional(&st->spi->dev, "clk1-enable", in adf4377_properties_parse()
894 if (IS_ERR(st->gpio_enclk1)) in adf4377_properties_parse()
895 return dev_err_probe(&spi->dev, PTR_ERR(st->gpio_enclk1), in adf4377_properties_parse()
898 if (st->chip_info->has_gpio_enclk2) { in adf4377_properties_parse()
899 st->gpio_enclk2 = devm_gpiod_get_optional(&st->spi->dev, "clk2-enable", in adf4377_properties_parse()
901 if (IS_ERR(st->gpio_enclk2)) in adf4377_properties_parse()
902 return dev_err_probe(&spi->dev, PTR_ERR(st->gpio_enclk2), in adf4377_properties_parse()
910 st->muxout_select = ret; in adf4377_properties_parse()
912 st->muxout_select = ADF4377_MUXOUT_HIGH_Z; in adf4377_properties_parse()
919 struct adf4377_state *st = container_of(nb, struct adf4377_state, nb); in adf4377_freq_change() local
923 mutex_lock(&st->lock); in adf4377_freq_change()
924 ret = notifier_from_errno(adf4377_init(st)); in adf4377_freq_change()
925 mutex_unlock(&st->lock); in adf4377_freq_change()
946 struct adf4377_state *st; in adf4377_probe() local
949 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); in adf4377_probe()
957 st = iio_priv(indio_dev); in adf4377_probe()
964 st->regmap = regmap; in adf4377_probe()
965 st->spi = spi; in adf4377_probe()
966 st->chip_info = spi_get_device_match_data(spi); in adf4377_probe()
967 mutex_init(&st->lock); in adf4377_probe()
969 ret = adf4377_properties_parse(st); in adf4377_probe()
973 st->nb.notifier_call = adf4377_freq_change; in adf4377_probe()
974 ret = devm_clk_notifier_register(&spi->dev, st->clkin, &st->nb); in adf4377_probe()
978 ret = adf4377_init(st); in adf4377_probe()