34 #define		AT91_ADC_SWRST		(1 << 0)	/* Software Reset */
35 #define		AT91_ADC_START		(1 << 1)	/* Start Conversion */
40 #define		AT91_ADC_TSAMOD_TS_ONLY_MODE		(1 << 0)	/* Touch Screen Only Mode */
41 #define		AT91_ADC_TRGEN		(1 << 0)	/* Trigger Enable */
42 #define		AT91_ADC_TRGSEL		(7 << 1)	/* Trigger Selection */
43 #define			AT91_ADC_TRGSEL_TC0		(0 << 1)
44 #define			AT91_ADC_TRGSEL_TC1		(1 << 1)
45 #define			AT91_ADC_TRGSEL_TC2		(2 << 1)
46 #define			AT91_ADC_TRGSEL_EXTERNAL	(6 << 1)
47 #define		AT91_ADC_LOWRES		(1 << 4)	/* Low Resolution */
48 #define		AT91_ADC_SLEEP		(1 << 5)	/* Sleep Mode */
49 #define		AT91_ADC_PENDET		(1 << 6)	/* Pen contact detection enable */
69 #define		AT91_ADC_CH(n)		(1 << (n))	/* Channel Number */
72 #define		AT91_ADC_EOC(n)		(1 << (n))	/* End of Conversion on Channel N */
73 #define		AT91_ADC_OVRE(n)	(1 << ((n) + 8))/* Overrun Error on Channel N */
74 #define		AT91_ADC_DRDY		(1 << 16)	/* Data Ready */
75 #define		AT91_ADC_GOVRE		(1 << 17)	/* General Overrun Error */
76 #define		AT91_ADC_ENDRX		(1 << 18)	/* End of RX Buffer */
77 #define		AT91_ADC_RXFUFF		(1 << 19)	/* RX Buffer Full */
80 #define		AT91_ADC_SR_DRDY_9X5	(1 << 24)	/* Data Ready */
88 #define		AT91RL_ADC_IER_PEN	(1 << 20)
89 #define		AT91RL_ADC_IER_NOPEN	(1 << 21)
90 #define		AT91_ADC_IER_PEN	(1 << 29)
91 #define		AT91_ADC_IER_NOPEN	(1 << 30)
92 #define		AT91_ADC_IER_XRDY	(1 << 20)
93 #define		AT91_ADC_IER_YRDY	(1 << 21)
94 #define		AT91_ADC_IER_PRDY	(1 << 22)
95 #define		AT91_ADC_ISR_PENS	(1 << 31)
108 #define			AT91_ADC_TSMR_TSMODE_4WIRE_NO_PRESS	(1 << 0)
117 #define		AT91_ADC_TSMR_NOTSDMA	(1 << 22)	/* No Touchscreen DMA */
119 #define		AT91_ADC_TSMR_PENDET_ENA	(1 << 24)	/* Pen contact detection enable */
136 #define AT91_ADC_CHAN(st, ch) \  argument
137 	(st->registers->channel_base + (ch * 4))
138 #define at91_adc_readl(st, reg) \  argument
139 	(readl_relaxed(st->reg_base + reg))
140 #define at91_adc_writel(st, reg, val) \  argument
141 	(writel_relaxed(val, st->reg_base + reg))
268 	struct at91_adc_state *st = iio_priv(idev);  in at91_adc_trigger_handler()  local
274 		st->buffer[j] = at91_adc_readl(st, AT91_ADC_CHAN(st, chan->channel));  in at91_adc_trigger_handler()
278 	iio_push_to_buffers_with_timestamp(idev, st->buffer, pf->timestamp);  in at91_adc_trigger_handler()
283 	at91_adc_readl(st, AT91_ADC_LCDR);  in at91_adc_trigger_handler()
285 	enable_irq(st->irq);  in at91_adc_trigger_handler()
293 	struct at91_adc_state *st = iio_priv(idev);  in handle_adc_eoc_trigger()  local
299 		st->last_value = at91_adc_readl(st, AT91_ADC_CHAN(st, st->chnb));  in handle_adc_eoc_trigger()
301 		at91_adc_readl(st, AT91_ADC_LCDR);  in handle_adc_eoc_trigger()
302 		st->done = true;  in handle_adc_eoc_trigger()
303 		wake_up_interruptible(&st->wq_data_avail);  in handle_adc_eoc_trigger()
309 	struct at91_adc_state *st = iio_priv(idev);  in at91_ts_sample()  local
312 	unsigned int rxp = 1;  in at91_ts_sample()
315 	unsigned int xyz_mask_bits = st->res;  in at91_ts_sample()
316 	unsigned int xyz_mask = (1 << xyz_mask_bits) - 1;  in at91_ts_sample()
319 	/* x position = (x / xscale) * max, max = 2^MAX_POS_BITS - 1 */  in at91_ts_sample()
320 	reg = at91_adc_readl(st, AT91_ADC_TSXPOSR);  in at91_ts_sample()
326 		return -1;  in at91_ts_sample()
330 	/* y position = (y / yscale) * max, max = 2^MAX_POS_BITS - 1 */  in at91_ts_sample()
331 	reg = at91_adc_readl(st, AT91_ADC_TSYPOSR);  in at91_ts_sample()
337 		return -1;  in at91_ts_sample()
342 	reg = at91_adc_readl(st, AT91_ADC_TSPRESSR);  in at91_ts_sample()
350 		pres = st->ts_pressure_threshold;	/* no pen contacted */  in at91_ts_sample()
355 	if (pres < st->ts_pressure_threshold) {  in at91_ts_sample()
358 		input_report_abs(st->ts_input, ABS_X, x);  in at91_ts_sample()
359 		input_report_abs(st->ts_input, ABS_Y, y);  in at91_ts_sample()
360 		input_report_abs(st->ts_input, ABS_PRESSURE, pres);  in at91_ts_sample()
361 		input_report_key(st->ts_input, BTN_TOUCH, 1);  in at91_ts_sample()
362 		input_sync(st->ts_input);  in at91_ts_sample()
373 	struct at91_adc_state *st = iio_priv(idev);  in at91_adc_rl_interrupt()  local
374 	u32 status = at91_adc_readl(st, st->registers->status_register);  in at91_adc_rl_interrupt()
377 	status &= at91_adc_readl(st, AT91_ADC_IMR);  in at91_adc_rl_interrupt()
378 	if (status & GENMASK(st->num_channels - 1, 0))  in at91_adc_rl_interrupt()
383 		reg = at91_adc_readl(st, AT91_ADC_MR);  in at91_adc_rl_interrupt()
385 		at91_adc_writel(st, AT91_ADC_MR, reg);  in at91_adc_rl_interrupt()
387 		at91_adc_writel(st, AT91_ADC_IDR, AT91RL_ADC_IER_PEN);  in at91_adc_rl_interrupt()
388 		at91_adc_writel(st, AT91_ADC_IER, AT91RL_ADC_IER_NOPEN  in at91_adc_rl_interrupt()
391 		at91_adc_writel(st, st->registers->trigger_register,  in at91_adc_rl_interrupt()
393 			AT91_ADC_TRGR_TRGPER_(st->ts_sample_period_val));  in at91_adc_rl_interrupt()
395 		reg = at91_adc_readl(st, AT91_ADC_MR);  in at91_adc_rl_interrupt()
396 		reg |= AT91_ADC_PENDBC_(st->ts_pendbc) & AT91_ADC_PENDBC;  in at91_adc_rl_interrupt()
397 		at91_adc_writel(st, AT91_ADC_MR, reg);  in at91_adc_rl_interrupt()
398 		at91_adc_writel(st, st->registers->trigger_register,  in at91_adc_rl_interrupt()
401 		at91_adc_writel(st, AT91_ADC_IDR, AT91RL_ADC_IER_NOPEN  in at91_adc_rl_interrupt()
403 		at91_adc_writel(st, AT91_ADC_IER, AT91RL_ADC_IER_PEN);  in at91_adc_rl_interrupt()
404 		st->ts_bufferedmeasure = false;  in at91_adc_rl_interrupt()
405 		input_report_key(st->ts_input, BTN_TOUCH, 0);  in at91_adc_rl_interrupt()
406 		input_sync(st->ts_input);  in at91_adc_rl_interrupt()
407 	} else if (status & AT91_ADC_EOC(3) && st->ts_input) {  in at91_adc_rl_interrupt()
409 		if (st->ts_bufferedmeasure) {  in at91_adc_rl_interrupt()
415 			input_report_abs(st->ts_input, ABS_X, st->ts_prev_absx);  in at91_adc_rl_interrupt()
416 			input_report_abs(st->ts_input, ABS_Y, st->ts_prev_absy);  in at91_adc_rl_interrupt()
417 			input_report_key(st->ts_input, BTN_TOUCH, 1);  in at91_adc_rl_interrupt()
418 			input_sync(st->ts_input);  in at91_adc_rl_interrupt()
420 			st->ts_bufferedmeasure = true;  in at91_adc_rl_interrupt()
423 		st->ts_prev_absx = at91_adc_readl(st, AT91_ADC_CHAN(st, 3))  in at91_adc_rl_interrupt()
425 		st->ts_prev_absx /= at91_adc_readl(st, AT91_ADC_CHAN(st, 2));  in at91_adc_rl_interrupt()
427 		st->ts_prev_absy = at91_adc_readl(st, AT91_ADC_CHAN(st, 1))  in at91_adc_rl_interrupt()
429 		st->ts_prev_absy /= at91_adc_readl(st, AT91_ADC_CHAN(st, 0));  in at91_adc_rl_interrupt()
438 	struct at91_adc_state *st = iio_priv(idev);  in at91_adc_9x5_interrupt()  local
439 	u32 status = at91_adc_readl(st, st->registers->status_register);  in at91_adc_9x5_interrupt()
445 	if (status & GENMASK(st->num_channels - 1, 0))  in at91_adc_9x5_interrupt()
449 		at91_adc_writel(st, AT91_ADC_IDR, AT91_ADC_IER_PEN);  in at91_adc_9x5_interrupt()
450 		at91_adc_writel(st, AT91_ADC_IER, AT91_ADC_IER_NOPEN |  in at91_adc_9x5_interrupt()
453 		at91_adc_writel(st, st->registers->trigger_register,  in at91_adc_9x5_interrupt()
455 			AT91_ADC_TRGR_TRGPER_(st->ts_sample_period_val));  in at91_adc_9x5_interrupt()
457 		at91_adc_writel(st, st->registers->trigger_register, 0);  in at91_adc_9x5_interrupt()
458 		at91_adc_writel(st, AT91_ADC_IDR, AT91_ADC_IER_NOPEN |  in at91_adc_9x5_interrupt()
460 		at91_adc_writel(st, AT91_ADC_IER, AT91_ADC_IER_PEN);  in at91_adc_9x5_interrupt()
462 		input_report_key(st->ts_input, BTN_TOUCH, 0);  in at91_adc_9x5_interrupt()
463 		input_sync(st->ts_input);  in at91_adc_9x5_interrupt()
474 			at91_adc_readl(st, AT91_ADC_TSXPOSR);  in at91_adc_9x5_interrupt()
475 			at91_adc_readl(st, AT91_ADC_TSYPOSR);  in at91_adc_9x5_interrupt()
476 			at91_adc_readl(st, AT91_ADC_TSPRESSR);  in at91_adc_9x5_interrupt()
485 	struct at91_adc_state *st = iio_priv(idev);  in at91_adc_channel_init()  local
491 	if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_4WIRE)  in at91_adc_channel_init()
493 	else if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_5WIRE)  in at91_adc_channel_init()
497 	st->channels_mask &= ~rsvd_mask;  in at91_adc_channel_init()
499 	idev->num_channels = bitmap_weight(&st->channels_mask,  in at91_adc_channel_init()
500 					   st->num_channels) + 1;  in at91_adc_channel_init()
503 				  ((idev->num_channels + 1) *  in at91_adc_channel_init()
510 	for_each_set_bit(bit, &st->channels_mask, st->num_channels) {  in at91_adc_channel_init()
514 		chan->indexed = 1;  in at91_adc_channel_init()
518 		chan->scan_type.realbits = st->res;  in at91_adc_channel_init()
527 	timestamp->channel = -1;  in at91_adc_channel_init()
541 	struct at91_adc_state *st = iio_priv(idev);  in at91_adc_get_trigger_value_by_name()  local
544 	for (i = 0; i < st->caps->trigger_number; i++) {  in at91_adc_get_trigger_value_by_name()
565 	struct at91_adc_state *st = iio_priv(idev);  in at91_adc_configure_trigger()  local
566 	const struct at91_adc_reg_desc *reg = st->registers;  in at91_adc_configure_trigger()
567 	u32 status = at91_adc_readl(st, reg->trigger_register);  in at91_adc_configure_trigger()
572 						   st->caps->triggers,  in at91_adc_configure_trigger()
578 		st->buffer = kmalloc(idev->scan_bytes, GFP_KERNEL);  in at91_adc_configure_trigger()
579 		if (st->buffer == NULL)  in at91_adc_configure_trigger()
582 		at91_adc_writel(st, reg->trigger_register,  in at91_adc_configure_trigger()
586 				 st->num_channels) {  in at91_adc_configure_trigger()
588 			at91_adc_writel(st, AT91_ADC_CHER,  in at91_adc_configure_trigger()
592 		at91_adc_writel(st, AT91_ADC_IER, reg->drdy_mask);  in at91_adc_configure_trigger()
595 		at91_adc_writel(st, AT91_ADC_IDR, reg->drdy_mask);  in at91_adc_configure_trigger()
597 		at91_adc_writel(st, reg->trigger_register,  in at91_adc_configure_trigger()
601 				 st->num_channels) {  in at91_adc_configure_trigger()
603 			at91_adc_writel(st, AT91_ADC_CHDR,  in at91_adc_configure_trigger()
606 		kfree(st->buffer);  in at91_adc_configure_trigger()
641 	struct at91_adc_state *st = iio_priv(idev);  in at91_adc_trigger_init()  local
644 	st->trig = devm_kcalloc(&idev->dev,  in at91_adc_trigger_init()
645 				st->caps->trigger_number, sizeof(*st->trig),  in at91_adc_trigger_init()
648 	if (st->trig == NULL) {  in at91_adc_trigger_init()
653 	for (i = 0; i < st->caps->trigger_number; i++) {  in at91_adc_trigger_init()
654 		if (st->caps->triggers[i].is_external && !(st->use_external))  in at91_adc_trigger_init()
657 		st->trig[i] = at91_adc_allocate_trigger(idev,  in at91_adc_trigger_init()
658 							st->caps->triggers + i);  in at91_adc_trigger_init()
659 		if (st->trig[i] == NULL) {  in at91_adc_trigger_init()
671 		iio_trigger_unregister(st->trig[i]);  in at91_adc_trigger_init()
672 		iio_trigger_free(st->trig[i]);  in at91_adc_trigger_init()
680 	struct at91_adc_state *st = iio_priv(idev);  in at91_adc_trigger_remove()  local
683 	for (i = 0; i < st->caps->trigger_number; i++) {  in at91_adc_trigger_remove()
684 		iio_trigger_unregister(st->trig[i]);  in at91_adc_trigger_remove()
685 		iio_trigger_free(st->trig[i]);  in at91_adc_trigger_remove()
704 	struct at91_adc_state *st = iio_priv(idev);  in at91_adc_read_raw()  local
709 		mutex_lock(&st->lock);  in at91_adc_read_raw()
711 		st->chnb = chan->channel;  in at91_adc_read_raw()
712 		at91_adc_writel(st, AT91_ADC_CHER,  in at91_adc_read_raw()
714 		at91_adc_writel(st, AT91_ADC_IER, BIT(chan->channel));  in at91_adc_read_raw()
715 		at91_adc_writel(st, AT91_ADC_CR, AT91_ADC_START);  in at91_adc_read_raw()
717 		ret = wait_event_interruptible_timeout(st->wq_data_avail,  in at91_adc_read_raw()
718 						       st->done,  in at91_adc_read_raw()
724 		at91_adc_writel(st, AT91_ADC_CHDR,  in at91_adc_read_raw()
726 		at91_adc_writel(st, AT91_ADC_IDR, BIT(chan->channel));  in at91_adc_read_raw()
730 			*val = st->last_value;  in at91_adc_read_raw()
731 			st->last_value = 0;  in at91_adc_read_raw()
732 			st->done = false;  in at91_adc_read_raw()
741 		mutex_unlock(&st->lock);  in at91_adc_read_raw()
745 		*val = st->vref_mv;  in at91_adc_read_raw()
761 	 *   Startup Time = (ticks + 1) * 8 / ADC Clock  in calc_startup_ticks_9260()
763 	return round_up((startup_time * adc_clk_khz / 1000) - 1, 8) / 8;  in calc_startup_ticks_9260()
789 		ticks = size - 1;  in calc_startup_ticks_9x5()
795 	struct at91_adc_state *st, struct device *dev)  in at91_adc_probe_dt_ts()  argument
809 		st->touchscreen_type = prop;  in at91_adc_probe_dt_ts()
816 	if (!st->caps->has_tsmr)  in at91_adc_probe_dt_ts()
820 	st->ts_pressure_threshold = prop;  in at91_adc_probe_dt_ts()
821 	if (st->ts_pressure_threshold) {  in at91_adc_probe_dt_ts()
836 	struct at91_adc_state *st = input_get_drvdata(dev);  in atmel_ts_open()  local
838 	if (st->caps->has_tsmr)  in atmel_ts_open()
839 		at91_adc_writel(st, AT91_ADC_IER, AT91_ADC_IER_PEN);  in atmel_ts_open()
841 		at91_adc_writel(st, AT91_ADC_IER, AT91RL_ADC_IER_PEN);  in atmel_ts_open()
847 	struct at91_adc_state *st = input_get_drvdata(dev);  in atmel_ts_close()  local
849 	if (st->caps->has_tsmr)  in atmel_ts_close()
850 		at91_adc_writel(st, AT91_ADC_IDR, AT91_ADC_IER_PEN);  in atmel_ts_close()
852 		at91_adc_writel(st, AT91_ADC_IDR, AT91RL_ADC_IER_PEN);  in atmel_ts_close()
857 	struct at91_adc_state *st = iio_priv(idev);  in at91_ts_hw_init()  local
866 	st->ts_pendbc = round_up(TOUCH_PEN_DETECT_DEBOUNCE_US * adc_clk_khz /  in at91_ts_hw_init()
867 				 1000, 1);  in at91_ts_hw_init()
869 	while (st->ts_pendbc >> ++i)  in at91_ts_hw_init()
871 	if (abs(st->ts_pendbc - (1 << i)) < abs(st->ts_pendbc - (1 << (i - 1))))  in at91_ts_hw_init()
872 		st->ts_pendbc = i;  in at91_ts_hw_init()
874 		st->ts_pendbc = i - 1;  in at91_ts_hw_init()
876 	if (!st->caps->has_tsmr) {  in at91_ts_hw_init()
877 		reg = at91_adc_readl(st, AT91_ADC_MR);  in at91_ts_hw_init()
880 		reg |= AT91_ADC_PENDBC_(st->ts_pendbc) & AT91_ADC_PENDBC;  in at91_ts_hw_init()
881 		at91_adc_writel(st, AT91_ADC_MR, reg);  in at91_ts_hw_init()
884 		at91_adc_writel(st, AT91_ADC_TSR, reg);  in at91_ts_hw_init()
886 		st->ts_sample_period_val = round_up((TOUCH_SAMPLE_PERIOD_US_RL *  in at91_ts_hw_init()
887 						    adc_clk_khz / 1000) - 1, 1);  in at91_ts_hw_init()
900 	if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_4WIRE)  in at91_ts_hw_init()
906 	reg |= AT91_ADC_TSMR_TSAV_(st->caps->ts_filter_average)  in at91_ts_hw_init()
908 	reg |= AT91_ADC_TSMR_PENDBC_(st->ts_pendbc) & AT91_ADC_TSMR_PENDBC;  in at91_ts_hw_init()
913 	at91_adc_writel(st, AT91_ADC_TSMR, reg);  in at91_ts_hw_init()
917 	 * 0 = 200 kOhm, 1 = 150 kOhm, 2 = 100 kOhm, 3 = 50 kOhm  in at91_ts_hw_init()
920 	at91_adc_writel(st, AT91_ADC_ACR, st->caps->ts_pen_detect_sensitivity  in at91_ts_hw_init()
923 	/* Sample Period Time = (TRGPER + 1) / ADCClock */  in at91_ts_hw_init()
924 	st->ts_sample_period_val = round_up((TOUCH_SAMPLE_PERIOD_US *  in at91_ts_hw_init()
925 			adc_clk_khz / 1000) - 1, 1);  in at91_ts_hw_init()
933 	struct at91_adc_state *st = iio_priv(idev);  in at91_ts_register()  local
952 	if (st->caps->has_tsmr) {  in at91_ts_register()
953 		input_set_abs_params(input, ABS_X, 0, (1 << MAX_POS_BITS) - 1,  in at91_ts_register()
955 		input_set_abs_params(input, ABS_Y, 0, (1 << MAX_POS_BITS) - 1,  in at91_ts_register()
959 		if (st->touchscreen_type != ATMEL_ADC_TOUCHSCREEN_4WIRE) {  in at91_ts_register()
966 		input_set_abs_params(input, ABS_X, 0, (1 << MAX_RLPOS_BITS) - 1,  in at91_ts_register()
968 		input_set_abs_params(input, ABS_Y, 0, (1 << MAX_RLPOS_BITS) - 1,  in at91_ts_register()
972 	st->ts_input = input;  in at91_ts_register()
973 	input_set_drvdata(input, st);  in at91_ts_register()
982 	input_free_device(st->ts_input);  in at91_ts_register()
986 static void at91_ts_unregister(struct at91_adc_state *st)  in at91_ts_unregister()  argument
988 	input_unregister_device(st->ts_input);  in at91_ts_unregister()
997 	struct at91_adc_state *st;  in at91_adc_probe()  local
1005 	st = iio_priv(idev);  in at91_adc_probe()
1007 	st->caps = of_device_get_match_data(&pdev->dev);  in at91_adc_probe()
1009 	st->use_external = of_property_read_bool(node, "atmel,adc-use-external-triggers");  in at91_adc_probe()
1014 	st->channels_mask = prop;  in at91_adc_probe()
1016 	st->sleep_mode = of_property_read_bool(node, "atmel,adc-sleep-mode");  in at91_adc_probe()
1021 	st->startup_time = prop;  in at91_adc_probe()
1025 	st->sample_hold_time = prop;  in at91_adc_probe()
1030 	st->vref_mv = prop;  in at91_adc_probe()
1032 	st->res = st->caps->high_res_bits;  in at91_adc_probe()
1033 	if (st->caps->low_res_bits &&  in at91_adc_probe()
1036 		st->res = st->caps->low_res_bits;  in at91_adc_probe()
1038 	dev_info(&idev->dev, "Resolution used: %u bits\n", st->res);  in at91_adc_probe()
1040 	st->registers = &st->caps->registers;  in at91_adc_probe()
1041 	st->num_channels = st->caps->num_channels;  in at91_adc_probe()
1044 	if (st->caps->has_ts) {  in at91_adc_probe()
1045 		ret = at91_adc_probe_dt_ts(node, st, &idev->dev);  in at91_adc_probe()
1056 	st->irq = platform_get_irq(pdev, 0);  in at91_adc_probe()
1057 	if (st->irq < 0)  in at91_adc_probe()
1060 	st->reg_base = devm_platform_ioremap_resource(pdev, 0);  in at91_adc_probe()
1061 	if (IS_ERR(st->reg_base))  in at91_adc_probe()
1062 		return PTR_ERR(st->reg_base);  in at91_adc_probe()
1067 	at91_adc_writel(st, AT91_ADC_CR, AT91_ADC_SWRST);  in at91_adc_probe()
1068 	at91_adc_writel(st, AT91_ADC_IDR, 0xFFFFFFFF);  in at91_adc_probe()
1070 	if (st->caps->has_tsmr)  in at91_adc_probe()
1071 		ret = devm_request_irq(&pdev->dev, st->irq,  in at91_adc_probe()
1075 		ret = devm_request_irq(&pdev->dev, st->irq,  in at91_adc_probe()
1082 	st->clk = devm_clk_get_enabled(&pdev->dev, "adc_clk");  in at91_adc_probe()
1083 	if (IS_ERR(st->clk))  in at91_adc_probe()
1084 		return dev_err_probe(&pdev->dev, PTR_ERR(st->clk),  in at91_adc_probe()
1087 	st->adc_clk = devm_clk_get_enabled(&pdev->dev, "adc_op_clk");  in at91_adc_probe()
1088 	if (IS_ERR(st->adc_clk))  in at91_adc_probe()
1089 		return dev_err_probe(&pdev->dev, PTR_ERR(st->adc_clk),  in at91_adc_probe()
1094 	 * datasheet : ADC Clock = MCK / ((Prescaler + 1) * 2), ADC Clock being  in at91_adc_probe()
1097 	mstrclk = clk_get_rate(st->clk);  in at91_adc_probe()
1098 	adc_clk = clk_get_rate(st->adc_clk);  in at91_adc_probe()
1104 	prsc = (mstrclk / (2 * adc_clk)) - 1;  in at91_adc_probe()
1106 	if (!st->startup_time)  in at91_adc_probe()
1109 	ticks = (*st->caps->calc_startup_ticks)(st->startup_time, adc_clk_khz);  in at91_adc_probe()
1114 	 * The formula thus is : Sample and Hold Time = (shtim + 1) / ADCClock  in at91_adc_probe()
1116 	if (st->sample_hold_time > 0)  in at91_adc_probe()
1117 		shtim = round_up((st->sample_hold_time * adc_clk_khz / 1000)  in at91_adc_probe()
1118 				 - 1, 1);  in at91_adc_probe()
1122 	reg = AT91_ADC_PRESCAL_(prsc) & st->registers->mr_prescal_mask;  in at91_adc_probe()
1123 	reg |= AT91_ADC_STARTUP_(ticks) & st->registers->mr_startup_mask;  in at91_adc_probe()
1124 	if (st->res == st->caps->low_res_bits)  in at91_adc_probe()
1126 	if (st->sleep_mode)  in at91_adc_probe()
1129 	at91_adc_writel(st, AT91_ADC_MR, reg);  in at91_adc_probe()
1137 	init_waitqueue_head(&st->wq_data_avail);  in at91_adc_probe()
1138 	mutex_init(&st->lock);  in at91_adc_probe()
1145 	if (!st->touchscreen_type) {  in at91_adc_probe()
1174 	if (!st->touchscreen_type) {  in at91_adc_probe()
1178 		at91_ts_unregister(st);  in at91_adc_probe()
1186 	struct at91_adc_state *st = iio_priv(idev);  in at91_adc_remove()  local
1189 	if (!st->touchscreen_type) {  in at91_adc_remove()
1193 		at91_ts_unregister(st);  in at91_adc_remove()
1200 	struct at91_adc_state *st = iio_priv(idev);  in at91_adc_suspend()  local
1203 	clk_disable_unprepare(st->clk);  in at91_adc_suspend()
1211 	struct at91_adc_state *st = iio_priv(idev);  in at91_adc_resume()  local
1213 	clk_prepare_enable(st->clk);  in at91_adc_resume()
1224 	{ .name = "timer-counter-1", .value = 0x3 },