Searched +full:1 +full:c600000 (Results 1 – 6 of 6) sorted by relevance
30 maxItems: 133 maxItems: 140 maxItems: 143 maxItems: 158 port@1:71 0 - For 1 lane enabled in IP.72 0 1 - For 2 lanes enabled in IP.73 0 1 2 3 - For 4 lanes enabled in IP.74 minItems: 181 - port@1[all …]
31 #phy-cells = <1>;39 phy-id = <1>;40 #phy-cells = <1>;49 #phy-cells = <1>;85 num-lanes = <1>;86 phys = <&miphy0 1>;102 num-lanes = <1>;103 phys = <&miphy1 1>;119 num-lanes = <1>;120 phys = <&miphy2 1>;[all …]
78 adsp_mem: memory@8c600000 {84 sw_edp_1p2: edp-1p2-regulator {378 #address-cells = <1>;388 #address-cells = <1>;399 port@1 {400 reg = <1>;416 connector@1 {418 reg = <1>;428 #address-cells = <1>;433 #address-cells = <1>;[all …]
176 clocks = <&cpufreq_hw 1>;179 qcom,freq-domain = <&cpufreq_hw 1>;197 clocks = <&cpufreq_hw 1>;200 qcom,freq-domain = <&cpufreq_hw 1>;263 little_cpu_sleep_1: cpu-sleep-0-1 {273 big_cpu_sleep_0: cpu-sleep-1-0 {283 big_cpu_sleep_1: cpu-sleep-1-1 {310 #reset-cells = <1>;624 qcom,client-id = <1>;663 #clock-cells = <1>;[all …]
149 clocks = <&cpufreq_hw 1>;156 qcom,freq-domain = <&cpufreq_hw 1>;172 clocks = <&cpufreq_hw 1>;179 qcom,freq-domain = <&cpufreq_hw 1>;195 clocks = <&cpufreq_hw 1>;202 qcom,freq-domain = <&cpufreq_hw 1>;218 clocks = <&cpufreq_hw 1>;225 qcom,freq-domain = <&cpufreq_hw 1>;286 big_cpu_sleep_0: cpu-sleep-1-0 {714 pil_nsp1_mem: cdsp1-region@8c600000 {[all …]
21 #define SPEAR1310_CLCD_SYNT_CLK_MASK 143 #define SPEAR1310_GPT_APB_VAL 144 #define SPEAR1310_GPT_CLK_MASK 150 #define SPEAR1310_UART_CLK_OSC24_VAL 156 #define SPEAR1310_AUX_CLK_SYNT_VAL 159 #define SPEAR1310_C3_CLK_MASK 160 #define SPEAR1310_C3_CLK_SHIFT 165 #define SPEAR1310_GMAC_PHY_CLK_MASK 168 #define SPEAR1310_GMAC_PHY_INPUT_CLK_SHIFT 183 #define SPEAR1310_I2S_REF_SEL_MASK 1[all …]