Searched +full:1 +full:c600000 (Results 1 – 14 of 14) sorted by relevance
| /linux/Documentation/devicetree/bindings/display/mediatek/ |
| H A D | mediatek,dp.yaml | 30 maxItems: 1 33 maxItems: 1 40 maxItems: 1 43 maxItems: 1 58 port@1: 71 0 - For 1 lane enabled in IP. 72 0 1 - For 2 lanes enabled in IP. 73 0 1 2 3 - For 4 lanes enabled in IP. 74 minItems: 1 81 - port@1 [all …]
|
| /linux/arch/arm/boot/dts/st/ |
| H A D | spear1310.dtsi | 31 #phy-cells = <1>; 39 phy-id = <1>; 40 #phy-cells = <1>; 49 #phy-cells = <1>; 85 num-lanes = <1>; 86 phys = <&miphy0 1>; 102 num-lanes = <1>; 103 phys = <&miphy1 1>; 119 num-lanes = <1>; 120 phys = <&miphy2 1>; [all …]
|
| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | sdm850-lenovo-yoga-c630.dts | 78 adsp_mem: memory@8c600000 { 84 sw_edp_1p2: edp-1p2-regulator { 378 #address-cells = <1>; 388 #address-cells = <1>; 399 port@1 { 400 reg = <1>; 416 connector@1 { 418 reg = <1>; 428 #address-cells = <1>; 433 #address-cells = <1>; [all …]
|
| H A D | sm6125.dtsi | 55 cpu1: cpu@1 { 165 #reset-cells = <1>; 201 #clock-cells = <1>; 208 #power-domain-cells = <1>; 377 #address-cells = <1>; 378 #size-cells = <1>; 385 #hwlock-cells = <1>; 669 #clock-cells = <1>; 670 #reset-cells = <1>; 671 #power-domain-cells = <1>; [all …]
|
| H A D | sm6375.dtsi | 176 clocks = <&cpufreq_hw 1>; 179 qcom,freq-domain = <&cpufreq_hw 1>; 197 clocks = <&cpufreq_hw 1>; 200 qcom,freq-domain = <&cpufreq_hw 1>; 263 little_cpu_sleep_1: cpu-sleep-0-1 { 273 big_cpu_sleep_0: cpu-sleep-1-0 { 283 big_cpu_sleep_1: cpu-sleep-1-1 { 310 #reset-cells = <1>; 624 qcom,client-id = <1>; 663 #clock-cells = <1>; [all …]
|
| H A D | agatti.dtsi | 68 cpu1: cpu@1 { 161 #reset-cells = <1>; 230 #clock-cells = <1>; 235 #power-domain-cells = <1>; 281 mboxes = <&apcs_glb 1>; 381 qcom,client-id = <1>; 399 #qcom,smem-state-cells = <1>; 418 qcom,remote-pid = <1>; 422 #qcom,smem-state-cells = <1>; 448 #hwlock-cells = <1>; [all …]
|
| H A D | sm6115.dtsi | 66 cpu1: cpu@1 { 112 clocks = <&cpufreq_hw 1>; 117 qcom,freq-domain = <&cpufreq_hw 1>; 131 clocks = <&cpufreq_hw 1>; 136 qcom,freq-domain = <&cpufreq_hw 1>; 145 clocks = <&cpufreq_hw 1>; 150 qcom,freq-domain = <&cpufreq_hw 1>; 159 clocks = <&cpufreq_hw 1>; 164 qcom,freq-domain = <&cpufreq_hw 1>; 220 big_cpu_sleep_0: cpu-sleep-1-0 { [all …]
|
| H A D | sc8280xp.dtsi | 149 clocks = <&cpufreq_hw 1>; 156 qcom,freq-domain = <&cpufreq_hw 1>; 172 clocks = <&cpufreq_hw 1>; 179 qcom,freq-domain = <&cpufreq_hw 1>; 195 clocks = <&cpufreq_hw 1>; 202 qcom,freq-domain = <&cpufreq_hw 1>; 218 clocks = <&cpufreq_hw 1>; 225 qcom,freq-domain = <&cpufreq_hw 1>; 286 big_cpu_sleep_0: cpu-sleep-1-0 { 714 pil_nsp1_mem: cdsp1-region@8c600000 { [all …]
|
| /linux/drivers/clk/spear/ |
| H A D | spear1310_clock.c | 21 #define SPEAR1310_CLCD_SYNT_CLK_MASK 1 43 #define SPEAR1310_GPT_APB_VAL 1 44 #define SPEAR1310_GPT_CLK_MASK 1 50 #define SPEAR1310_UART_CLK_OSC24_VAL 1 56 #define SPEAR1310_AUX_CLK_SYNT_VAL 1 59 #define SPEAR1310_C3_CLK_MASK 1 60 #define SPEAR1310_C3_CLK_SHIFT 1 65 #define SPEAR1310_GMAC_PHY_CLK_MASK 1 68 #define SPEAR1310_GMAC_PHY_INPUT_CLK_SHIFT 1 83 #define SPEAR1310_I2S_REF_SEL_MASK 1 [all …]
|
| /linux/arch/arm64/boot/dts/nvidia/ |
| H A D | tegra264.dtsi | 134 #dma-cells = <1>; 168 #address-cells = <1>; 179 i2s1_port: port@1 { 180 reg = <1>; 203 #address-cells = <1>; 214 i2s2_port: port@1 { 215 reg = <1>; 238 #address-cells = <1>; 249 i2s3_port: port@1 { 250 reg = <1>; [all …]
|
| H A D | tegra194.dtsi | 162 snps,write-requests = <1>; 207 #dma-cells = <1>; 548 dmas = <&adma 1>, <&adma 1>, 610 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 641 #dma-cells = <1>; 687 #interconnect-cells = <1>; 731 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 807 #address-cells = <1>; 834 #address-cells = <1>; 850 #address-cells = <1>; [all …]
|
| H A D | tegra234.dtsi | 50 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 221 #dma-cells = <1>; 268 #address-cells = <1>; 279 i2s1_port: port@1 { 280 reg = <1>; 304 #address-cells = <1>; 315 i2s2_port: port@1 { 316 reg = <1>; 340 #address-cells = <1>; 351 i2s3_port: port@1 { [all …]
|
| /linux/Documentation/filesystems/ |
| H A D | proc.rst | 11 move /proc/sys Shen Feng <shen@cn.fujitsu.com> April 1 2009 23 1 Collecting System Information 81 Chapter 1: Collecting System Information 108 subdirectory has the entries listed in Table 1-1. 128 .. table:: Table 1-1: Process specific entries in /proc 189 THP_enabled: 1 190 Threads: 1 207 nonvoluntary_ctxt_switches: 1 212 file /proc/PID/status. It fields are described in table 1-2. 215 memory usage. Its seven fields are explained in Table 1-3. The stat file [all …]
|
| /linux/arch/arm64/boot/dts/mediatek/ |
| H A D | mt8195.dtsi | 50 #address-cells = <1>; 134 performance-domains = <&performance 1>; 153 performance-domains = <&performance 1>; 172 performance-domains = <&performance 1>; 191 performance-domains = <&performance 1>; 335 clock-mult = <1>; 356 #performance-domain-cells = <1>; 465 #redistributor-regions = <1>; 477 ppi_cluster1: interrupt-partition-1 { 486 #clock-cells = <1>; [all …]
|