Searched +full:1 +full:a400000 (Results 1 – 11 of 11) sorted by relevance
| /linux/Documentation/devicetree/bindings/ata/ |
| H A D | apm,xgene-ahci.yaml | 28 maxItems: 1 31 maxItems: 1 53 sata@1a400000 {
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| /linux/Documentation/devicetree/bindings/mmc/ |
| H A D | socionext,uniphier-sd.yaml | 14 description: version 2.91, 3.1, 3.1.1, respectively 17 - socionext,uniphier-sd-v3.1 21 maxItems: 1 24 maxItems: 1 27 maxItems: 1 30 maxItems: 1 55 minItems: 1 100 sd: mmc@5a400000 { 106 pinctrl-1 = <&pinctrl_sd_uhs>;
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| /linux/arch/arm64/boot/dts/arm/ |
| H A D | morello.dtsi | 99 clocks = <&scmi_dvfs 1>; 126 clocks = <&scmi_dvfs 1>; 154 mboxes = <&mailbox 1 0>, <&mailbox 1 1>; 156 #address-cells = <1>; 161 #clock-cells = <1>; 166 #clock-cells = <1>; 217 uart0: serial@2a400000 { 246 #msi-cells = <1>; 254 #msi-cells = <1>; 262 #msi-cells = <1>; [all …]
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| /linux/arch/arm/boot/dts/socionext/ |
| H A D | uniphier-ld4.dtsi | 13 #address-cells = <1>; 14 #size-cells = <1>; 17 #address-cells = <1>; 50 #address-cells = <1>; 51 #size-cells = <1>; 72 #address-cells = <1>; 99 clocks = <&peri_clk 1>; 100 resets = <&peri_rst 1>; 143 #address-cells = <1>; 157 #address-cells = <1>; [all …]
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| H A D | uniphier-sld8.dtsi | 13 #address-cells = <1>; 14 #size-cells = <1>; 17 #address-cells = <1>; 50 #address-cells = <1>; 51 #size-cells = <1>; 72 #address-cells = <1>; 99 clocks = <&peri_clk 1>; 100 resets = <&peri_rst 1>; 147 #address-cells = <1>; 161 #address-cells = <1>; [all …]
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| H A D | uniphier-pro4.dtsi | 13 #address-cells = <1>; 14 #size-cells = <1>; 17 #address-cells = <1>; 28 cpu@1 { 31 reg = <1>; 58 #address-cells = <1>; 59 #size-cells = <1>; 80 #address-cells = <1>; 107 clocks = <&peri_clk 1>; 108 resets = <&peri_rst 1>; [all …]
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| H A D | uniphier-pxs2.dtsi | 14 #address-cells = <1>; 15 #size-cells = <1>; 18 #address-cells = <1>; 32 cpu1: cpu@1 { 35 reg = <1>; 156 #address-cells = <1>; 157 #size-cells = <1>; 180 #address-cells = <1>; 193 #address-cells = <1>; 220 clocks = <&peri_clk 1>; [all …]
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| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx8-ss-dma.dtsi | 20 #address-cells = <1>; 21 #size-cells = <1>; 27 #address-cells = <1>; 37 dmas = <&edma2 1 0 0>, <&edma2 0 0 FSL_EDMA_RX>; 45 #address-cells = <1>; 63 #address-cells = <1>; 81 #address-cells = <1>; 205 spi0_lpcg: clock-controller@5a400000 { 208 #clock-cells = <1>; 220 #clock-cells = <1>; [all …]
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | sc8280xp.dtsi | 153 clocks = <&cpufreq_hw 1>; 160 qcom,freq-domain = <&cpufreq_hw 1>; 176 clocks = <&cpufreq_hw 1>; 183 qcom,freq-domain = <&cpufreq_hw 1>; 199 clocks = <&cpufreq_hw 1>; 206 qcom,freq-domain = <&cpufreq_hw 1>; 222 clocks = <&cpufreq_hw 1>; 229 qcom,freq-domain = <&cpufreq_hw 1>; 290 big_cpu_sleep_0: cpu-sleep-1-0 { 688 #qcom,smem-state-cells = <1>; [all …]
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| H A D | monaco.dtsi | 165 qcom,freq-domain = <&cpufreq_hw 1>; 191 qcom,freq-domain = <&cpufreq_hw 1>; 217 qcom,freq-domain = <&cpufreq_hw 1>; 243 qcom,freq-domain = <&cpufreq_hw 1>; 302 l3_1: l3-cache-1 { 321 big_cpu_sleep_0: cpu-sleep-1-0 { 341 gold_cluster_sleep: cluster-sleep-1 { 633 mc_virt: interconnect-1 { 837 #qcom,smem-state-cells = <1>; 861 #qcom,smem-state-cells = <1>; [all …]
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| H A D | glymur.dtsi | 123 compatible = "qcom,oryon-2-1"; 127 power-domains = <&cpu_pd6>, <&scmi_perf 1>; 141 compatible = "qcom,oryon-2-1"; 145 power-domains = <&cpu_pd7>, <&scmi_perf 1>; 153 compatible = "qcom,oryon-2-1"; 157 power-domains = <&cpu_pd8>, <&scmi_perf 1>; 165 compatible = "qcom,oryon-2-1"; 169 power-domains = <&cpu_pd9>, <&scmi_perf 1>; 177 compatible = "qcom,oryon-2-1"; 181 power-domains = <&cpu_pd10>, <&scmi_perf 1>; [all …]
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