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/freebsd/sys/contrib/device-tree/Bindings/opp/
H A Dqcom-nvmem-cpufreq.txt49 1: MSM8996 V3, speedbin 1
53 5: MSM8996 SG, speedbin 1
57 Example 1:
80 CPU1: cpu@1 {
97 clocks = <&kryocc 1>;
113 clocks = <&kryocc 1>;
149 opp-hz = /bits/ 64 <307200000>;
155 opp-hz = /bits/ 64 <384000000>;
161 opp-hz = /bits/ 64 <422400000>;
167 opp-hz = /bits/ 64 <460800000>;
[all …]
H A Dopp-v2.yaml24 * Example 1: Single cluster Dual-core ARM cortex A9, switch DVFS states
28 #address-cells = <1>;
42 cpu@1 {
45 reg = <1>;
59 opp-hz = /bits/ 64 <1000000000>;
66 opp-hz = /bits/ 64 <1100000000>;
72 opp-hz = /bits/ 64 <1200000000>;
85 #address-cells = <1>;
99 cpu@1 {
102 reg = <1>;
[all …]
H A Dopp.txt13 Binding 1: operating-points
87 - opp-hz: Frequency in Hz, expressed as a 64-bit big-endian integer. This is a
157 in the table have this, the OPP with highest opp-hz will be used.
191 Example 1: Single cluster Dual-core ARM cortex A9, switch DVFS states together.
195 #address-cells = <1>;
208 cpu@1 {
210 reg = <1>;
224 opp-hz = /bits/ 64 <1000000000>;
231 opp-hz = /bits/ 64 <1100000000>;
237 opp-hz = /bits/ 64 <1200000000>;
[all …]
/freebsd/sys/kern/
H A Dsubr_param.c15 * 1. Redistributions of source code must retain the above copyright
62 #ifndef HZ
63 # define HZ 1000 macro
69 # define HZ_VM HZ
83 int hz; /* system clock's frequency */ variable
84 int tick; /* usec per tick (1000000 / hz) */
85 time_t tick_seconds_max; /* max hz * seconds an integer can hold */
86 struct bintime tick_bt; /* bintime per tick (1s / hz) */
111 SYSCTL_INT(_kern, OID_AUTO, hz, CTLFLAG_RDTUN | CTLFLAG_NOFETCH, &hz, 0,
114 "Maximum hz value supported");
[all …]
/freebsd/sys/dev/drm2/
H A Ddrm_edid_modes.h34 /* 640x350@85Hz */
38 /* 640x400@85Hz */
42 /* 720x400@85Hz */
46 /* 640x480@60Hz */
50 /* 640x480@72Hz */
54 /* 640x480@75Hz */
58 /* 640x480@85Hz */
62 /* 800x600@56Hz */
66 /* 800x600@60Hz */
70 /* 800x600@72Hz */
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsa8540p.dtsi18 opp-hz = /bits/ 64 <300000000>;
22 opp-hz = /bits/ 64 <403200000>;
26 opp-hz = /bits/ 64 <499200000>;
30 opp-hz = /bits/ 64 <595200000>;
34 opp-hz = /bits/ 64 <710400000>;
38 opp-hz = /bits/ 64 <806400000>;
42 opp-hz = /bits/ 64 <902400000>;
46 opp-hz = /bits/ 64 <1017600000>;
50 opp-hz = /bits/ 64 <1113600000>;
54 opp-hz = /bits/ 64 <1209600000>;
[all …]
H A Dmsm8996pro.dtsi14 * nibble of supported hw, so speed bin 0 becomes 0x10, speed bin 1
24 opp-hz = /bits/ 64 <307200000>;
30 opp-hz = /bits/ 64 <384000000>;
36 opp-hz = /bits/ 64 <460800000>;
42 opp-hz = /bits/ 64 <537600000>;
48 opp-hz = /bits/ 64 <614400000>;
54 opp-hz = /bits/ 64 <691200000>;
60 opp-hz = /bits/ 64 <768000000>;
66 opp-hz = /bits/ 64 <844800000>;
72 opp-hz = /bits/ 64 <902400000>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/cpufreq/
H A Dcpufreq-mediatek.txt34 Example 1 (MT7623 SoC):
41 opp-hz = /bits/ 64 <598000000>;
46 opp-hz = /bits/ 64 <747500000>;
51 opp-hz = /bits/ 64 <1040000000>;
56 opp-hz = /bits/ 64 <1196000000>;
61 opp-hz = /bits/ 64 <1300000000>;
76 cpu@1 {
101 opp-hz = /bits/ 64 <507000000>;
106 opp-hz = /bits/ 64 <702000000>;
111 opp-hz = /bits/ 64 <1001000000>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3399-op1-opp.dtsi12 opp-hz = /bits/ 64 <408000000>;
17 opp-hz = /bits/ 64 <600000000>;
21 opp-hz = /bits/ 64 <816000000>;
25 opp-hz = /bits/ 64 <1008000000>;
29 opp-hz = /bits/ 64 <1200000000>;
33 opp-hz = /bits/ 64 <1416000000>;
37 opp-hz = /bits/ 64 <1512000000>;
42 cluster1_opp: opp-table-1 {
47 opp-hz = /bits/ 64 <408000000>;
52 opp-hz = /bits/ 64 <600000000>;
[all …]
H A Drk3399-op1.dtsi14 opp-hz = /bits/ 64 <408000000>;
19 opp-hz = /bits/ 64 <600000000>;
23 opp-hz = /bits/ 64 <816000000>;
27 opp-hz = /bits/ 64 <1008000000>;
31 opp-hz = /bits/ 64 <1200000000>;
35 opp-hz = /bits/ 64 <1416000000>;
39 opp-hz = /bits/ 64 <1512000000>;
44 cluster1_opp: opp-table-1 {
49 opp-hz = /bits/ 64 <408000000>;
54 opp-hz = /bits/ 64 <600000000>;
[all …]
H A Drk3399-opp.dtsi12 opp-hz = /bits/ 64 <408000000>;
17 opp-hz = /bits/ 64 <600000000>;
21 opp-hz = /bits/ 64 <816000000>;
25 opp-hz = /bits/ 64 <1008000000>;
29 opp-hz = /bits/ 64 <1200000000>;
33 opp-hz = /bits/ 64 <1416000000>;
38 cluster1_opp: opp-table-1 {
43 opp-hz = /bits/ 64 <408000000>;
48 opp-hz = /bits/ 64 <600000000>;
52 opp-hz = /bits/ 64 <816000000>;
[all …]
H A Drk3399.dtsi14 opp-hz = /bits/ 64 <408000000>;
19 opp-hz = /bits/ 64 <600000000>;
23 opp-hz = /bits/ 64 <816000000>;
27 opp-hz = /bits/ 64 <1008000000>;
31 opp-hz = /bits/ 64 <1200000000>;
35 opp-hz = /bits/ 64 <1416000000>;
40 cluster1_opp: opp-table-1 {
45 opp-hz = /bits/ 64 <408000000>;
50 opp-hz = /bits/ 64 <600000000>;
54 opp-hz = /bits/ 64 <816000000>;
[all …]
H A Drk3399-t-opp.dtsi13 opp-hz = /bits/ 64 <408000000>;
18 opp-hz = /bits/ 64 <600000000>;
22 opp-hz = /bits/ 64 <816000000>;
26 opp-hz = /bits/ 64 <1008000000>;
31 cluster1_opp: opp-table-1 {
36 opp-hz = /bits/ 64 <408000000>;
41 opp-hz = /bits/ 64 <600000000>;
45 opp-hz = /bits/ 64 <816000000>;
49 opp-hz = /bits/ 64 <1008000000>;
53 opp-hz = /bits/ 64 <1200000000>;
[all …]
H A Drk3399-t.dtsi15 opp-hz = /bits/ 64 <408000000>;
20 opp-hz = /bits/ 64 <600000000>;
24 opp-hz = /bits/ 64 <816000000>;
28 opp-hz = /bits/ 64 <1008000000>;
33 cluster1_opp: opp-table-1 {
38 opp-hz = /bits/ 64 <408000000>;
43 opp-hz = /bits/ 64 <600000000>;
47 opp-hz = /bits/ 64 <816000000>;
51 opp-hz = /bits/ 64 <1008000000>;
55 opp-hz = /bits/ 64 <1200000000>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/amlogic/
H A Dmeson-g12b-a311d.dtsi15 opp-hz = /bits/ 64 <1000000000>;
20 opp-hz = /bits/ 64 <1200000000>;
25 opp-hz = /bits/ 64 <1398000000>;
30 opp-hz = /bits/ 64 <1512000000>;
35 opp-hz = /bits/ 64 <1608000000>;
40 opp-hz = /bits/ 64 <1704000000>;
45 opp-hz = /bits/ 64 <1800000000>;
50 cpub_opp_table_1: opp-table-1 {
55 opp-hz = /bits/ 64 <1000000000>;
60 opp-hz = /bits/ 64 <1200000000>;
[all …]
H A Dmeson-g12b-s922x.dtsi15 opp-hz = /bits/ 64 <1000000000>;
20 opp-hz = /bits/ 64 <1200000000>;
25 opp-hz = /bits/ 64 <1398000000>;
30 opp-hz = /bits/ 64 <1512000000>;
35 opp-hz = /bits/ 64 <1608000000>;
40 opp-hz = /bits/ 64 <1704000000>;
45 opp-hz = /bits/ 64 <1896000000>;
50 opp-hz = /bits/ 64 <1992000000>;
55 cpub_opp_table_1: opp-table-1 {
60 opp-hz = /bits/ 64 <1000000000>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/apple/
H A Dt600x-common.dtsi73 cpu_e01: cpu@1 {
206 l2_cache_1: l2-cache-1 {
225 opp-hz = /bits/ 64 <600000000>;
226 opp-level = <1>;
230 opp-hz = /bits/ 64 <972000000>;
235 opp-hz = /bits/ 64 <1332000000>;
240 opp-hz = /bits/ 64 <1704000000>;
245 opp-hz = /bits/ 64 <2064000000>;
251 firestorm_opp: opp-table-1 {
255 opp-hz = /bits/ 64 <600000000>;
[all …]
/freebsd/usr.bin/gprof/
H A Dprintgprof.c10 * 1. Redistributions of source code must retain the above copyright
57 errx( 1 , "[printprof] ran out of memory for time sorting" ); in printprof()
58 for ( idx = 0 ; idx < nname ; idx += 1 ) { in printprof()
62 for ( idx = 0 ; idx < nname ; idx += 1 ) { in printprof()
80 return 1 ; in timecmp()
82 return -1; in timecmp()
85 return 1; in timecmp()
87 return -1; in timecmp()
105 100.0/totime , totime / hz ); in flatprofheader()
117 hz >= 10000000 ? "ns/call" : hz >= 10000 ? "us/call" : "ms/call" , in flatprofheader()
[all …]
/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos4x12.dtsi42 opp-hz = /bits/ 64 <100000000>;
45 opp-hz = /bits/ 64 <134000000>;
48 opp-hz = /bits/ 64 <160000000>;
51 opp-hz = /bits/ 64 <267000000>;
87 opp-hz = /bits/ 64 <160000000>;
90 opp-hz = /bits/ 64 <200000000>;
106 opp-hz = /bits/ 64 <100000000>;
109 opp-hz = /bits/ 64 <134000000>;
143 opp-hz = /bits/ 64 <50000000>;
146 opp-hz
[all...]
H A Dexynos4210.dtsi43 opp-hz = /bits/ 64 <134000000>;
46 opp-hz = /bits/ 64 <160000000>;
49 opp-hz = /bits/ 64 <200000000>;
66 opp-hz = /bits/ 64 <100000000>;
69 opp-hz = /bits/ 64 <134000000>;
72 opp-hz = /bits/ 64 <160000000>;
89 opp-hz = /bits/ 64 <134000000>;
93 opp-hz = /bits/ 64 <267000000>;
97 opp-hz = /bits/ 64 <400000000>;
116 opp-hz
[all...]
/freebsd/share/man/man9/
H A Dhz.97 .\" 1. Redistributions of source code must retain the above copyright
25 .Dd July 1, 2021
29 .Nm hz ,
37 .Vt extern int hz;
53 That routine may be called once every 1 /
54 .Va hz
64 .Xr ps 1
66 .Xr top 1 .
89 of 1 /
98 .Va hz
[all …]
/freebsd/lib/msun/src/
H A De_fmodl.c19 #define BIAS (LDBL_MAX_EXP - 1)
39 #define SET_NBIT(hx) ((hx) | (1ULL << LDBL_MANH_SIZE))
43 #define HFRAC_BITS (LDBL_MANH_SIZE - 1)
46 #define MANL_SHIFT (LDBL_MANL_SIZE - 1)
64 int64_t hx,hz; /* We need a carry bit even if LDBL_MANH_SIZE is 32. */ in fmodl() local
117 hz=hx-hy;lz=lx-ly; if(lx<ly) hz -= 1; in fmodl()
118 if(hz<0){hx = hx+hx+(lx>>MANL_SHIFT); lx = lx+lx;} in fmodl()
120 if ((hz|lz)==0) /* return sign(x)*0 */ in fmodl()
122 hx = hz+hz+(lz>>MANL_SHIFT); lx = lz+lz; in fmodl()
125 hz=hx-hy;lz=lx-ly; if(lx<ly) hz -= 1; in fmodl()
[all …]
/freebsd/sys/dev/videomode/
H A Dedidreg.h12 * 1. Redistributions of source code must retain the above copyright
90 /* 0 = 0.7,0.3, 1 = 0.714,0.286, 2 = 1.0,0.4, 3 = 0.7,0.0 */
105 #define EDID_FEATURES_DISP_TYPE_RGB 1
129 #define EDID_EST_TIMING_720_400_70 0x8000 /* 720x400 @ 70Hz */
130 #define EDID_EST_TIMING_720_400_88 0x4000 /* 720x400 @ 88Hz */
131 #define EDID_EST_TIMING_640_480_60 0x2000 /* 640x480 @ 60Hz */
132 #define EDID_EST_TIMING_640_480_67 0x1000 /* 640x480 @ 67Hz */
133 #define EDID_EST_TIMING_640_480_72 0x0800 /* 640x480 @ 72Hz */
134 #define EDID_EST_TIMING_640_480_75 0x0400 /* 640x480 @ 75Hz */
135 #define EDID_EST_TIMING_800_600_56 0x0200 /* 800x600 @ 56Hz */
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt8183.dtsi49 opp-hz = /bits/ 64 <793000000>;
54 opp-hz = /bits/ 64 <910000000>;
59 opp-hz = /bits/ 64 <1014000000>;
64 opp-hz = /bits/ 64 <1131000000>;
69 opp-hz = /bits/ 64 <1248000000>;
74 opp-hz = /bits/ 64 <1326000000>;
79 opp-hz = /bits/ 64 <1417000000>;
84 opp-hz = /bits/ 64 <1508000000>;
89 opp-hz = /bits/ 64 <1586000000>;
94 opp-hz = /bits/ 64 <1625000000>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/hwmon/
H A Dadt7475.yaml40 maxItems: 1
45 the pwm uses a logic low output for 100% duty cycle. If set to 1 the pwm
52 enum: [0, 1]
53 default: 1
60 - 1: The PWM period in nanoseconds
61 - 90909091 (11 Hz)
62 - 71428571 (14 Hz)
63 - 45454545 (22 Hz)
64 - 34482759 (29 Hz)
65 - 28571429 (35 Hz)
[all …]

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