1*b2d2a78aSEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*b2d2a78aSEmmanuel Vadot/* 3*b2d2a78aSEmmanuel Vadot * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd 4*b2d2a78aSEmmanuel Vadot * Copyright (c) 2022 Radxa Limited 5*b2d2a78aSEmmanuel Vadot */ 6*b2d2a78aSEmmanuel Vadot 7*b2d2a78aSEmmanuel Vadot#include "rk3399-base.dtsi" 8*b2d2a78aSEmmanuel Vadot 9*b2d2a78aSEmmanuel Vadot/ { 10*b2d2a78aSEmmanuel Vadot cluster0_opp: opp-table-0 { 11*b2d2a78aSEmmanuel Vadot compatible = "operating-points-v2"; 12*b2d2a78aSEmmanuel Vadot opp-shared; 13*b2d2a78aSEmmanuel Vadot 14*b2d2a78aSEmmanuel Vadot opp00 { 15*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <408000000>; 16*b2d2a78aSEmmanuel Vadot opp-microvolt = <875000 875000 1250000>; 17*b2d2a78aSEmmanuel Vadot clock-latency-ns = <40000>; 18*b2d2a78aSEmmanuel Vadot }; 19*b2d2a78aSEmmanuel Vadot opp01 { 20*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <600000000>; 21*b2d2a78aSEmmanuel Vadot opp-microvolt = <875000 875000 1250000>; 22*b2d2a78aSEmmanuel Vadot }; 23*b2d2a78aSEmmanuel Vadot opp02 { 24*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <816000000>; 25*b2d2a78aSEmmanuel Vadot opp-microvolt = <900000 900000 1250000>; 26*b2d2a78aSEmmanuel Vadot }; 27*b2d2a78aSEmmanuel Vadot opp03 { 28*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <1008000000>; 29*b2d2a78aSEmmanuel Vadot opp-microvolt = <975000 975000 1250000>; 30*b2d2a78aSEmmanuel Vadot }; 31*b2d2a78aSEmmanuel Vadot }; 32*b2d2a78aSEmmanuel Vadot 33*b2d2a78aSEmmanuel Vadot cluster1_opp: opp-table-1 { 34*b2d2a78aSEmmanuel Vadot compatible = "operating-points-v2"; 35*b2d2a78aSEmmanuel Vadot opp-shared; 36*b2d2a78aSEmmanuel Vadot 37*b2d2a78aSEmmanuel Vadot opp00 { 38*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <408000000>; 39*b2d2a78aSEmmanuel Vadot opp-microvolt = <875000 875000 1250000>; 40*b2d2a78aSEmmanuel Vadot clock-latency-ns = <40000>; 41*b2d2a78aSEmmanuel Vadot }; 42*b2d2a78aSEmmanuel Vadot opp01 { 43*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <600000000>; 44*b2d2a78aSEmmanuel Vadot opp-microvolt = <875000 875000 1250000>; 45*b2d2a78aSEmmanuel Vadot }; 46*b2d2a78aSEmmanuel Vadot opp02 { 47*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <816000000>; 48*b2d2a78aSEmmanuel Vadot opp-microvolt = <875000 875000 1250000>; 49*b2d2a78aSEmmanuel Vadot }; 50*b2d2a78aSEmmanuel Vadot opp03 { 51*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <1008000000>; 52*b2d2a78aSEmmanuel Vadot opp-microvolt = <925000 925000 1250000>; 53*b2d2a78aSEmmanuel Vadot }; 54*b2d2a78aSEmmanuel Vadot opp04 { 55*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <1200000000>; 56*b2d2a78aSEmmanuel Vadot opp-microvolt = <1000000 1000000 1250000>; 57*b2d2a78aSEmmanuel Vadot }; 58*b2d2a78aSEmmanuel Vadot opp05 { 59*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <1416000000>; 60*b2d2a78aSEmmanuel Vadot opp-microvolt = <1075000 1075000 1250000>; 61*b2d2a78aSEmmanuel Vadot }; 62*b2d2a78aSEmmanuel Vadot opp06 { 63*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <1512000000>; 64*b2d2a78aSEmmanuel Vadot opp-microvolt = <1150000 1150000 1250000>; 65*b2d2a78aSEmmanuel Vadot }; 66*b2d2a78aSEmmanuel Vadot }; 67*b2d2a78aSEmmanuel Vadot 68*b2d2a78aSEmmanuel Vadot gpu_opp_table: opp-table-2 { 69*b2d2a78aSEmmanuel Vadot compatible = "operating-points-v2"; 70*b2d2a78aSEmmanuel Vadot 71*b2d2a78aSEmmanuel Vadot opp00 { 72*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <200000000>; 73*b2d2a78aSEmmanuel Vadot opp-microvolt = <875000 875000 1150000>; 74*b2d2a78aSEmmanuel Vadot }; 75*b2d2a78aSEmmanuel Vadot opp01 { 76*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <300000000>; 77*b2d2a78aSEmmanuel Vadot opp-microvolt = <875000 875000 1150000>; 78*b2d2a78aSEmmanuel Vadot }; 79*b2d2a78aSEmmanuel Vadot opp02 { 80*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <400000000>; 81*b2d2a78aSEmmanuel Vadot opp-microvolt = <875000 875000 1150000>; 82*b2d2a78aSEmmanuel Vadot }; 83*b2d2a78aSEmmanuel Vadot opp03 { 84*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <600000000>; 85*b2d2a78aSEmmanuel Vadot opp-microvolt = <975000 975000 1150000>; 86*b2d2a78aSEmmanuel Vadot }; 87*b2d2a78aSEmmanuel Vadot }; 88*b2d2a78aSEmmanuel Vadot}; 89*b2d2a78aSEmmanuel Vadot 90*b2d2a78aSEmmanuel Vadot&cpu_l0 { 91*b2d2a78aSEmmanuel Vadot operating-points-v2 = <&cluster0_opp>; 92*b2d2a78aSEmmanuel Vadot}; 93*b2d2a78aSEmmanuel Vadot 94*b2d2a78aSEmmanuel Vadot&cpu_l1 { 95*b2d2a78aSEmmanuel Vadot operating-points-v2 = <&cluster0_opp>; 96*b2d2a78aSEmmanuel Vadot}; 97*b2d2a78aSEmmanuel Vadot 98*b2d2a78aSEmmanuel Vadot&cpu_l2 { 99*b2d2a78aSEmmanuel Vadot operating-points-v2 = <&cluster0_opp>; 100*b2d2a78aSEmmanuel Vadot}; 101*b2d2a78aSEmmanuel Vadot 102*b2d2a78aSEmmanuel Vadot&cpu_l3 { 103*b2d2a78aSEmmanuel Vadot operating-points-v2 = <&cluster0_opp>; 104*b2d2a78aSEmmanuel Vadot}; 105*b2d2a78aSEmmanuel Vadot 106*b2d2a78aSEmmanuel Vadot&cpu_b0 { 107*b2d2a78aSEmmanuel Vadot operating-points-v2 = <&cluster1_opp>; 108*b2d2a78aSEmmanuel Vadot}; 109*b2d2a78aSEmmanuel Vadot 110*b2d2a78aSEmmanuel Vadot&cpu_b1 { 111*b2d2a78aSEmmanuel Vadot operating-points-v2 = <&cluster1_opp>; 112*b2d2a78aSEmmanuel Vadot}; 113*b2d2a78aSEmmanuel Vadot 114*b2d2a78aSEmmanuel Vadot&gpu { 115*b2d2a78aSEmmanuel Vadot operating-points-v2 = <&gpu_opp_table>; 116*b2d2a78aSEmmanuel Vadot}; 117