1*b2d2a78aSEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*b2d2a78aSEmmanuel Vadot/* 3*b2d2a78aSEmmanuel Vadot * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd 4*b2d2a78aSEmmanuel Vadot */ 5*b2d2a78aSEmmanuel Vadot 6*b2d2a78aSEmmanuel Vadot#include "rk3399.dtsi" 7*b2d2a78aSEmmanuel Vadot 8*b2d2a78aSEmmanuel Vadot/ { 9*b2d2a78aSEmmanuel Vadot cluster0_opp: opp-table-0 { 10*b2d2a78aSEmmanuel Vadot compatible = "operating-points-v2"; 11*b2d2a78aSEmmanuel Vadot opp-shared; 12*b2d2a78aSEmmanuel Vadot 13*b2d2a78aSEmmanuel Vadot opp00 { 14*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <408000000>; 15*b2d2a78aSEmmanuel Vadot opp-microvolt = <800000>; 16*b2d2a78aSEmmanuel Vadot clock-latency-ns = <40000>; 17*b2d2a78aSEmmanuel Vadot }; 18*b2d2a78aSEmmanuel Vadot opp01 { 19*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <600000000>; 20*b2d2a78aSEmmanuel Vadot opp-microvolt = <825000>; 21*b2d2a78aSEmmanuel Vadot }; 22*b2d2a78aSEmmanuel Vadot opp02 { 23*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <816000000>; 24*b2d2a78aSEmmanuel Vadot opp-microvolt = <850000>; 25*b2d2a78aSEmmanuel Vadot }; 26*b2d2a78aSEmmanuel Vadot opp03 { 27*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <1008000000>; 28*b2d2a78aSEmmanuel Vadot opp-microvolt = <900000>; 29*b2d2a78aSEmmanuel Vadot }; 30*b2d2a78aSEmmanuel Vadot opp04 { 31*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <1200000000>; 32*b2d2a78aSEmmanuel Vadot opp-microvolt = <975000>; 33*b2d2a78aSEmmanuel Vadot }; 34*b2d2a78aSEmmanuel Vadot opp05 { 35*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <1416000000>; 36*b2d2a78aSEmmanuel Vadot opp-microvolt = <1100000>; 37*b2d2a78aSEmmanuel Vadot }; 38*b2d2a78aSEmmanuel Vadot opp06 { 39*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <1512000000>; 40*b2d2a78aSEmmanuel Vadot opp-microvolt = <1150000>; 41*b2d2a78aSEmmanuel Vadot }; 42*b2d2a78aSEmmanuel Vadot }; 43*b2d2a78aSEmmanuel Vadot 44*b2d2a78aSEmmanuel Vadot cluster1_opp: opp-table-1 { 45*b2d2a78aSEmmanuel Vadot compatible = "operating-points-v2"; 46*b2d2a78aSEmmanuel Vadot opp-shared; 47*b2d2a78aSEmmanuel Vadot 48*b2d2a78aSEmmanuel Vadot opp00 { 49*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <408000000>; 50*b2d2a78aSEmmanuel Vadot opp-microvolt = <800000>; 51*b2d2a78aSEmmanuel Vadot clock-latency-ns = <40000>; 52*b2d2a78aSEmmanuel Vadot }; 53*b2d2a78aSEmmanuel Vadot opp01 { 54*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <600000000>; 55*b2d2a78aSEmmanuel Vadot opp-microvolt = <800000>; 56*b2d2a78aSEmmanuel Vadot }; 57*b2d2a78aSEmmanuel Vadot opp02 { 58*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <816000000>; 59*b2d2a78aSEmmanuel Vadot opp-microvolt = <825000>; 60*b2d2a78aSEmmanuel Vadot }; 61*b2d2a78aSEmmanuel Vadot opp03 { 62*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <1008000000>; 63*b2d2a78aSEmmanuel Vadot opp-microvolt = <850000>; 64*b2d2a78aSEmmanuel Vadot }; 65*b2d2a78aSEmmanuel Vadot opp04 { 66*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <1200000000>; 67*b2d2a78aSEmmanuel Vadot opp-microvolt = <900000>; 68*b2d2a78aSEmmanuel Vadot }; 69*b2d2a78aSEmmanuel Vadot opp05 { 70*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <1416000000>; 71*b2d2a78aSEmmanuel Vadot opp-microvolt = <975000>; 72*b2d2a78aSEmmanuel Vadot }; 73*b2d2a78aSEmmanuel Vadot opp06 { 74*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <1608000000>; 75*b2d2a78aSEmmanuel Vadot opp-microvolt = <1050000>; 76*b2d2a78aSEmmanuel Vadot }; 77*b2d2a78aSEmmanuel Vadot opp07 { 78*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <1800000000>; 79*b2d2a78aSEmmanuel Vadot opp-microvolt = <1150000>; 80*b2d2a78aSEmmanuel Vadot }; 81*b2d2a78aSEmmanuel Vadot opp08 { 82*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <2016000000>; 83*b2d2a78aSEmmanuel Vadot opp-microvolt = <1250000>; 84*b2d2a78aSEmmanuel Vadot }; 85*b2d2a78aSEmmanuel Vadot }; 86*b2d2a78aSEmmanuel Vadot 87*b2d2a78aSEmmanuel Vadot gpu_opp_table: opp-table-2 { 88*b2d2a78aSEmmanuel Vadot compatible = "operating-points-v2"; 89*b2d2a78aSEmmanuel Vadot 90*b2d2a78aSEmmanuel Vadot opp00 { 91*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <200000000>; 92*b2d2a78aSEmmanuel Vadot opp-microvolt = <800000>; 93*b2d2a78aSEmmanuel Vadot }; 94*b2d2a78aSEmmanuel Vadot opp01 { 95*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <297000000>; 96*b2d2a78aSEmmanuel Vadot opp-microvolt = <800000>; 97*b2d2a78aSEmmanuel Vadot }; 98*b2d2a78aSEmmanuel Vadot opp02 { 99*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <400000000>; 100*b2d2a78aSEmmanuel Vadot opp-microvolt = <825000>; 101*b2d2a78aSEmmanuel Vadot }; 102*b2d2a78aSEmmanuel Vadot opp03 { 103*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <500000000>; 104*b2d2a78aSEmmanuel Vadot opp-microvolt = <850000>; 105*b2d2a78aSEmmanuel Vadot }; 106*b2d2a78aSEmmanuel Vadot opp04 { 107*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <600000000>; 108*b2d2a78aSEmmanuel Vadot opp-microvolt = <925000>; 109*b2d2a78aSEmmanuel Vadot }; 110*b2d2a78aSEmmanuel Vadot opp05 { 111*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <800000000>; 112*b2d2a78aSEmmanuel Vadot opp-microvolt = <1075000>; 113*b2d2a78aSEmmanuel Vadot }; 114*b2d2a78aSEmmanuel Vadot }; 115*b2d2a78aSEmmanuel Vadot 116*b2d2a78aSEmmanuel Vadot dmc_opp_table: opp-table-3 { 117*b2d2a78aSEmmanuel Vadot compatible = "operating-points-v2"; 118*b2d2a78aSEmmanuel Vadot 119*b2d2a78aSEmmanuel Vadot opp00 { 120*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <400000000>; 121*b2d2a78aSEmmanuel Vadot opp-microvolt = <900000>; 122*b2d2a78aSEmmanuel Vadot }; 123*b2d2a78aSEmmanuel Vadot opp01 { 124*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <666000000>; 125*b2d2a78aSEmmanuel Vadot opp-microvolt = <900000>; 126*b2d2a78aSEmmanuel Vadot }; 127*b2d2a78aSEmmanuel Vadot opp02 { 128*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <800000000>; 129*b2d2a78aSEmmanuel Vadot opp-microvolt = <900000>; 130*b2d2a78aSEmmanuel Vadot }; 131*b2d2a78aSEmmanuel Vadot opp03 { 132*b2d2a78aSEmmanuel Vadot opp-hz = /bits/ 64 <928000000>; 133*b2d2a78aSEmmanuel Vadot opp-microvolt = <925000>; 134*b2d2a78aSEmmanuel Vadot }; 135*b2d2a78aSEmmanuel Vadot }; 136*b2d2a78aSEmmanuel Vadot}; 137*b2d2a78aSEmmanuel Vadot 138*b2d2a78aSEmmanuel Vadot&cpu_l0 { 139*b2d2a78aSEmmanuel Vadot operating-points-v2 = <&cluster0_opp>; 140*b2d2a78aSEmmanuel Vadot}; 141*b2d2a78aSEmmanuel Vadot 142*b2d2a78aSEmmanuel Vadot&cpu_l1 { 143*b2d2a78aSEmmanuel Vadot operating-points-v2 = <&cluster0_opp>; 144*b2d2a78aSEmmanuel Vadot}; 145*b2d2a78aSEmmanuel Vadot 146*b2d2a78aSEmmanuel Vadot&cpu_l2 { 147*b2d2a78aSEmmanuel Vadot operating-points-v2 = <&cluster0_opp>; 148*b2d2a78aSEmmanuel Vadot}; 149*b2d2a78aSEmmanuel Vadot 150*b2d2a78aSEmmanuel Vadot&cpu_l3 { 151*b2d2a78aSEmmanuel Vadot operating-points-v2 = <&cluster0_opp>; 152*b2d2a78aSEmmanuel Vadot}; 153*b2d2a78aSEmmanuel Vadot 154*b2d2a78aSEmmanuel Vadot&cpu_b0 { 155*b2d2a78aSEmmanuel Vadot operating-points-v2 = <&cluster1_opp>; 156*b2d2a78aSEmmanuel Vadot}; 157*b2d2a78aSEmmanuel Vadot 158*b2d2a78aSEmmanuel Vadot&cpu_b1 { 159*b2d2a78aSEmmanuel Vadot operating-points-v2 = <&cluster1_opp>; 160*b2d2a78aSEmmanuel Vadot}; 161*b2d2a78aSEmmanuel Vadot 162*b2d2a78aSEmmanuel Vadot&dmc { 163*b2d2a78aSEmmanuel Vadot operating-points-v2 = <&dmc_opp_table>; 164*b2d2a78aSEmmanuel Vadot}; 165*b2d2a78aSEmmanuel Vadot 166*b2d2a78aSEmmanuel Vadot&gpu { 167*b2d2a78aSEmmanuel Vadot operating-points-v2 = <&gpu_opp_table>; 168*b2d2a78aSEmmanuel Vadot}; 169