/linux/drivers/media/platform/ti/omap3isp/ |
H A D | gamma_table.h | 31 179, 179, 179, 180, 180, 180, 180, 181, 181, 181, 181, 182, 182, 182, 182, 183,
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/linux/Documentation/devicetree/bindings/perf/ |
H A D | arm,ccn.yaml | 38 interrupts = <0 181 4>;
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/linux/include/dt-bindings/clock/ |
H A D | px30-cru.h | 106 #define ACLK_VOPB 181 379 #define SRST_WDT_NS_P 181
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H A D | hi3620-clock.h | 97 #define HI3620_GPIOCLK12 181
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H A D | rockchip,rv1126-cru.h | 247 #define ACLK_CIF 181 578 #define SRST_USBOTG_A 181
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H A D | axg-audio-clkc.h | 161 #define AUD_CLKID_EARCRX_CMDC 181
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/linux/Documentation/devicetree/bindings/pwm/ |
H A D | opencores,pwm.yaml | 53 clocks = <&clkgen 181>;
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/linux/drivers/pinctrl/mediatek/ |
H A D | pinctrl-mt2712.c | 161 MTK_PIN_IES_SMT_SPEC(181, 181, 0x8f0, 5), 258 MTK_PIN_IES_SMT_SPEC(181, 181, 0x8b0, 5), 487 MTK_PIN_DRV_GRP(181, 0xbd0, 12, 0),
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/linux/arch/arm64/boot/dts/mediatek/ |
H A D | mt2712-pinfunc.h | 906 #define MT2712_PIN_181_I2SO1_DATA0__FUNC_GPIO181 (MTK_PIN_NO(181) | 0) 907 #define MT2712_PIN_181_I2SO1_DATA0__FUNC_I2SO1_DO (MTK_PIN_NO(181) | 1) 908 #define MT2712_PIN_181_I2SO1_DATA0__FUNC_I2SO0_DO0 (MTK_PIN_NO(181) | 2) 909 #define MT2712_PIN_181_I2SO1_DATA0__FUNC_I2SO2_DO (MTK_PIN_NO(181) | 3) 910 #define MT2712_PIN_181_I2SO1_DATA0__FUNC_DAI_TX (MTK_PIN_NO(181) | 4) 911 #define MT2712_PIN_181_I2SO1_DATA0__FUNC_TDMIN_MCLK (MTK_PIN_NO(181) | 5) 912 #define MT2712_PIN_181_I2SO1_DATA0__FUNC_I2S_IQ2_SDIA (MTK_PIN_NO(181) | 7)
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/linux/arch/arm64/boot/dts/freescale/ |
H A D | qoriq-bman-portals.dtsi | 45 interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>;
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/linux/drivers/gpu/drm/amd/amdkfd/ |
H A D | soc15_int.h | 28 #define SOC15_INTSRC_CP_END_OF_PIPE 181
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/linux/include/dt-bindings/pinctrl/ |
H A D | mt8135-pinfunc.h | 1138 #define MT8135_PIN_181_CMPCLK__FUNC_GPIO181 (MTK_PIN_NO(181) | 0) 1139 #define MT8135_PIN_181_CMPCLK__FUNC_CMPCLK (MTK_PIN_NO(181) | 1) 1140 #define MT8135_PIN_181_CMPCLK__FUNC_EINT182 (MTK_PIN_NO(181) | 2) 1141 #define MT8135_PIN_181_CMPCLK__FUNC_CMCSK (MTK_PIN_NO(181) | 3) 1142 #define MT8135_PIN_181_CMPCLK__FUNC_CM2MCLK_4X (MTK_PIN_NO(181) | 4) 1143 #define MT8135_PIN_181_CMPCLK__FUNC_TS_AUXADC_SEL_3 (MTK_PIN_NO(181) | 5) 1144 #define MT8135_PIN_181_CMPCLK__FUNC_VENC_TEST_CK (MTK_PIN_NO(181) | 6) 1145 #define MT8135_PIN_181_CMPCLK__FUNC_TESTA_OUT27 (MTK_PIN_NO(181) | 7)
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H A D | mt6795-pinfunc.h | 834 #define PINMUX_GPIO181__FUNC_GPIO181 (MTK_PIN_NO(181) | 0) 835 #define PINMUX_GPIO181__FUNC_AUD_DAT_MISO_1 (MTK_PIN_NO(181) | 1) 836 #define PINMUX_GPIO181__FUNC_I2S1_BCK (MTK_PIN_NO(181) | 2) 837 #define PINMUX_GPIO181__FUNC_I2S2_BCK (MTK_PIN_NO(181) | 3) 838 #define PINMUX_GPIO181__FUNC_I2S0_BCK (MTK_PIN_NO(181) | 4)
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/linux/drivers/pinctrl/intel/ |
H A D | pinctrl-tigerlake.c | 237 PINCTRL_PIN(181, "UART0_RTSB"), 575 PINCTRL_PIN(181, "SATAXPCIE_0"), 709 TGL_GPP(0, 181, 193, 288), /* GPP_E */ 727 TGL_H_COMMUNITY(2, 181, 217, tglh_community3_gpps),
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H A D | pinctrl-lakefield.c | 221 PINCTRL_PIN(181, "LPSS_SSP_2_RXD"), 323 LKF_GPP(1, 181, 212, 192), /* WEST_1 */
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H A D | pinctrl-moorefield.c | 214 PINCTRL_PIN(181, "PROCHOT"), 301 TNG_FAMILY(11, 181, 195),
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H A D | pinctrl-sunrisepoint.c | 487 PINCTRL_PIN(181, "DDSP_HDP_0"), 555 SPT_H_GPP(0, 181, 191, 192), /* GPP_I */ 561 SPT_H_COMMUNITY(2, 181, 191, spth_community3_gpps),
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/linux/drivers/gpu/drm/amd/include/ivsrcid/gfx/ |
H A D | irqsrcs_gfx_10_1.h | 32 #define GFX_10_1__SRCID__CP_EOP_INTERRUPT 181 // B5 End-of-Pipe Interrupt
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H A D | irqsrcs_gfx_9_0.h | 34 #define GFX_9_0__SRCID__CP_EOP_INTERRUPT 181 /* B5 End-of-Pipe Interrupt */
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/linux/include/linux/ |
H A D | miscdevice.h | 45 #define TOSH_MINOR_DEV 181
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/linux/Documentation/userspace-api/media/dvb/ |
H A D | dvbstb.svg | 13 …181z"/><rect id="rect351" class="BoundingBox" x="4555.1" y="5213.1" width="1561" height="1802" fil…
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/linux/Documentation/devicetree/bindings/display/tegra/ |
H A D | nvidia,tegra124-dpaux.yaml | 128 resets = <&tegra_car 181>;
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/linux/drivers/mmc/host/ |
H A D | sdhci-of-aspeed-test.c | 32 aspeed_sdhci_phase_to_tap(NULL, rate, 181)); in aspeed_sdhci_phase_ddr52()
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/linux/drivers/accel/habanalabs/include/goya/ |
H A D | goya_async_events.h | 97 GOYA_ASYNC_EVENT_ID_PCIE_QID1_ENG3 = 181,
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/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | qcom,sm8250-pinctrl.yaml | 118 gpio-ranges = <&tlmm 0 0 181>; /* GPIOs + ufs_reset */
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