1*f5d2cbe5SCathy Xu /* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ 2*f5d2cbe5SCathy Xu /* 3*f5d2cbe5SCathy Xu * Copyright (C) 2025 MediaTek Inc. 4*f5d2cbe5SCathy Xu * Author: Guodong Liu <guodong.liu@mediatek.com> 5*f5d2cbe5SCathy Xu * Lei Xue <lei.xue@mediatek.com> 6*f5d2cbe5SCathy Xu * Cathy Xu <ot_cathy.xu@mediatek.com> 7*f5d2cbe5SCathy Xu */ 8*f5d2cbe5SCathy Xu 9*f5d2cbe5SCathy Xu #ifndef __MT8196_PINFUNC_H 10*f5d2cbe5SCathy Xu #define __MT8196_PINFUNC_H 11*f5d2cbe5SCathy Xu 12*f5d2cbe5SCathy Xu #include <dt-bindings/pinctrl/mt65xx.h> 13*f5d2cbe5SCathy Xu 14*f5d2cbe5SCathy Xu #define PINMUX_GPIO0__FUNC_GPIO0 (MTK_PIN_NO(0) | 0) 15*f5d2cbe5SCathy Xu #define PINMUX_GPIO0__FUNC_DMIC1_CLK (MTK_PIN_NO(0) | 1) 16*f5d2cbe5SCathy Xu #define PINMUX_GPIO0__FUNC_SPI3_A_MO (MTK_PIN_NO(0) | 3) 17*f5d2cbe5SCathy Xu #define PINMUX_GPIO0__FUNC_FMI2S_B_LRCK (MTK_PIN_NO(0) | 4) 18*f5d2cbe5SCathy Xu #define PINMUX_GPIO0__FUNC_SCP_DMIC1_CLK (MTK_PIN_NO(0) | 5) 19*f5d2cbe5SCathy Xu #define PINMUX_GPIO0__FUNC_TP_GPIO14_AO (MTK_PIN_NO(0) | 6) 20*f5d2cbe5SCathy Xu 21*f5d2cbe5SCathy Xu #define PINMUX_GPIO1__FUNC_GPIO1 (MTK_PIN_NO(1) | 0) 22*f5d2cbe5SCathy Xu #define PINMUX_GPIO1__FUNC_DMIC1_DAT (MTK_PIN_NO(1) | 1) 23*f5d2cbe5SCathy Xu #define PINMUX_GPIO1__FUNC_SRCLKENAI1 (MTK_PIN_NO(1) | 2) 24*f5d2cbe5SCathy Xu #define PINMUX_GPIO1__FUNC_SPI3_A_MI (MTK_PIN_NO(1) | 3) 25*f5d2cbe5SCathy Xu #define PINMUX_GPIO1__FUNC_FMI2S_B_DI (MTK_PIN_NO(1) | 4) 26*f5d2cbe5SCathy Xu #define PINMUX_GPIO1__FUNC_SCP_DMIC1_DAT (MTK_PIN_NO(1) | 5) 27*f5d2cbe5SCathy Xu #define PINMUX_GPIO1__FUNC_TP_GPIO15_AO (MTK_PIN_NO(1) | 6) 28*f5d2cbe5SCathy Xu 29*f5d2cbe5SCathy Xu #define PINMUX_GPIO2__FUNC_GPIO2 (MTK_PIN_NO(2) | 0) 30*f5d2cbe5SCathy Xu #define PINMUX_GPIO2__FUNC_PWM_VLP (MTK_PIN_NO(2) | 1) 31*f5d2cbe5SCathy Xu #define PINMUX_GPIO2__FUNC_DSI_HSYNC (MTK_PIN_NO(2) | 2) 32*f5d2cbe5SCathy Xu #define PINMUX_GPIO2__FUNC_RG_TSFDC_LDO_EN (MTK_PIN_NO(2) | 5) 33*f5d2cbe5SCathy Xu #define PINMUX_GPIO2__FUNC_TP_GPIO8_AO (MTK_PIN_NO(2) | 6) 34*f5d2cbe5SCathy Xu 35*f5d2cbe5SCathy Xu #define PINMUX_GPIO3__FUNC_GPIO3 (MTK_PIN_NO(3) | 0) 36*f5d2cbe5SCathy Xu #define PINMUX_GPIO3__FUNC_MD_INT0 (MTK_PIN_NO(3) | 1) 37*f5d2cbe5SCathy Xu #define PINMUX_GPIO3__FUNC_DSI1_HSYNC (MTK_PIN_NO(3) | 2) 38*f5d2cbe5SCathy Xu #define PINMUX_GPIO3__FUNC_DA_TSFDC_LDO_MODE (MTK_PIN_NO(3) | 5) 39*f5d2cbe5SCathy Xu #define PINMUX_GPIO3__FUNC_TP_GPIO9_AO (MTK_PIN_NO(3) | 6) 40*f5d2cbe5SCathy Xu 41*f5d2cbe5SCathy Xu #define PINMUX_GPIO4__FUNC_GPIO4 (MTK_PIN_NO(4) | 0) 42*f5d2cbe5SCathy Xu #define PINMUX_GPIO4__FUNC_DISP_PWM1 (MTK_PIN_NO(4) | 1) 43*f5d2cbe5SCathy Xu #define PINMUX_GPIO4__FUNC_MD32_0_GPIO0 (MTK_PIN_NO(4) | 2) 44*f5d2cbe5SCathy Xu 45*f5d2cbe5SCathy Xu #define PINMUX_GPIO5__FUNC_GPIO5 (MTK_PIN_NO(5) | 0) 46*f5d2cbe5SCathy Xu #define PINMUX_GPIO5__FUNC_LCM1_RST (MTK_PIN_NO(5) | 1) 47*f5d2cbe5SCathy Xu #define PINMUX_GPIO5__FUNC_SPI7_A_CLK (MTK_PIN_NO(5) | 2) 48*f5d2cbe5SCathy Xu 49*f5d2cbe5SCathy Xu #define PINMUX_GPIO6__FUNC_GPIO6 (MTK_PIN_NO(6) | 0) 50*f5d2cbe5SCathy Xu #define PINMUX_GPIO6__FUNC_DSI1_TE (MTK_PIN_NO(6) | 1) 51*f5d2cbe5SCathy Xu #define PINMUX_GPIO6__FUNC_SPI7_A_CSB (MTK_PIN_NO(6) | 2) 52*f5d2cbe5SCathy Xu 53*f5d2cbe5SCathy Xu #define PINMUX_GPIO7__FUNC_GPIO7 (MTK_PIN_NO(7) | 0) 54*f5d2cbe5SCathy Xu #define PINMUX_GPIO7__FUNC_SPI7_A_MO (MTK_PIN_NO(7) | 2) 55*f5d2cbe5SCathy Xu #define PINMUX_GPIO7__FUNC_GPS_PPS0 (MTK_PIN_NO(7) | 3) 56*f5d2cbe5SCathy Xu 57*f5d2cbe5SCathy Xu #define PINMUX_GPIO8__FUNC_GPIO8 (MTK_PIN_NO(8) | 0) 58*f5d2cbe5SCathy Xu #define PINMUX_GPIO8__FUNC_SPI7_A_MI (MTK_PIN_NO(8) | 2) 59*f5d2cbe5SCathy Xu #define PINMUX_GPIO8__FUNC_EDP_TX_HPD (MTK_PIN_NO(8) | 3) 60*f5d2cbe5SCathy Xu 61*f5d2cbe5SCathy Xu #define PINMUX_GPIO9__FUNC_GPIO9 (MTK_PIN_NO(9) | 0) 62*f5d2cbe5SCathy Xu #define PINMUX_GPIO9__FUNC_I2SIN1_LRCK (MTK_PIN_NO(9) | 3) 63*f5d2cbe5SCathy Xu #define PINMUX_GPIO9__FUNC_RG_TSFDC_LDO_REFSEL0 (MTK_PIN_NO(9) | 7) 64*f5d2cbe5SCathy Xu 65*f5d2cbe5SCathy Xu #define PINMUX_GPIO10__FUNC_GPIO10 (MTK_PIN_NO(10) | 0) 66*f5d2cbe5SCathy Xu #define PINMUX_GPIO10__FUNC_I2SOUT1_DO (MTK_PIN_NO(10) | 3) 67*f5d2cbe5SCathy Xu #define PINMUX_GPIO10__FUNC_RG_TSFDC_LDO_REFSEL1 (MTK_PIN_NO(10) | 7) 68*f5d2cbe5SCathy Xu 69*f5d2cbe5SCathy Xu #define PINMUX_GPIO11__FUNC_GPIO11 (MTK_PIN_NO(11) | 0) 70*f5d2cbe5SCathy Xu #define PINMUX_GPIO11__FUNC_FMI2S_B_BCK (MTK_PIN_NO(11) | 4) 71*f5d2cbe5SCathy Xu #define PINMUX_GPIO11__FUNC_DBG_MON_A30 (MTK_PIN_NO(11) | 7) 72*f5d2cbe5SCathy Xu 73*f5d2cbe5SCathy Xu #define PINMUX_GPIO12__FUNC_GPIO12 (MTK_PIN_NO(12) | 0) 74*f5d2cbe5SCathy Xu #define PINMUX_GPIO12__FUNC_I2SIN1_DI_B (MTK_PIN_NO(12) | 3) 75*f5d2cbe5SCathy Xu 76*f5d2cbe5SCathy Xu #define PINMUX_GPIO13__FUNC_GPIO13 (MTK_PIN_NO(13) | 0) 77*f5d2cbe5SCathy Xu #define PINMUX_GPIO13__FUNC_EDP_TX_HPD (MTK_PIN_NO(13) | 1) 78*f5d2cbe5SCathy Xu #define PINMUX_GPIO13__FUNC_GPS_PPS1 (MTK_PIN_NO(13) | 2) 79*f5d2cbe5SCathy Xu 80*f5d2cbe5SCathy Xu #define PINMUX_GPIO14__FUNC_GPIO14 (MTK_PIN_NO(14) | 0) 81*f5d2cbe5SCathy Xu #define PINMUX_GPIO14__FUNC_SRCLKENA2 (MTK_PIN_NO(14) | 1) 82*f5d2cbe5SCathy Xu #define PINMUX_GPIO14__FUNC_DSI2_TE (MTK_PIN_NO(14) | 2) 83*f5d2cbe5SCathy Xu #define PINMUX_GPIO14__FUNC_SPMI_P_TRIG_FLAG (MTK_PIN_NO(14) | 3) 84*f5d2cbe5SCathy Xu #define PINMUX_GPIO14__FUNC_MD_INT3 (MTK_PIN_NO(14) | 5) 85*f5d2cbe5SCathy Xu #define PINMUX_GPIO14__FUNC_TP_GPIO8_AO (MTK_PIN_NO(14) | 6) 86*f5d2cbe5SCathy Xu 87*f5d2cbe5SCathy Xu #define PINMUX_GPIO15__FUNC_GPIO15 (MTK_PIN_NO(15) | 0) 88*f5d2cbe5SCathy Xu #define PINMUX_GPIO15__FUNC_SRCLKENAI0 (MTK_PIN_NO(15) | 1) 89*f5d2cbe5SCathy Xu #define PINMUX_GPIO15__FUNC_SPMI_M_TRIG_FLAG (MTK_PIN_NO(15) | 2) 90*f5d2cbe5SCathy Xu #define PINMUX_GPIO15__FUNC_UCTS0 (MTK_PIN_NO(15) | 3) 91*f5d2cbe5SCathy Xu #define PINMUX_GPIO15__FUNC_MD_INT4 (MTK_PIN_NO(15) | 4) 92*f5d2cbe5SCathy Xu #define PINMUX_GPIO15__FUNC_I2SOUT2_DO (MTK_PIN_NO(15) | 5) 93*f5d2cbe5SCathy Xu #define PINMUX_GPIO15__FUNC_TP_GPIO9_AO (MTK_PIN_NO(15) | 6) 94*f5d2cbe5SCathy Xu 95*f5d2cbe5SCathy Xu #define PINMUX_GPIO16__FUNC_GPIO16 (MTK_PIN_NO(16) | 0) 96*f5d2cbe5SCathy Xu #define PINMUX_GPIO16__FUNC_SRCLKENAI1 (MTK_PIN_NO(16) | 1) 97*f5d2cbe5SCathy Xu #define PINMUX_GPIO16__FUNC_DP_TX_HPD (MTK_PIN_NO(16) | 2) 98*f5d2cbe5SCathy Xu #define PINMUX_GPIO16__FUNC_URTS0 (MTK_PIN_NO(16) | 3) 99*f5d2cbe5SCathy Xu #define PINMUX_GPIO16__FUNC_GPS_L5_ELNA_EN (MTK_PIN_NO(16) | 4) 100*f5d2cbe5SCathy Xu #define PINMUX_GPIO16__FUNC_KPROW2 (MTK_PIN_NO(16) | 5) 101*f5d2cbe5SCathy Xu #define PINMUX_GPIO16__FUNC_TP_GPIO10_AO (MTK_PIN_NO(16) | 6) 102*f5d2cbe5SCathy Xu 103*f5d2cbe5SCathy Xu #define PINMUX_GPIO17__FUNC_GPIO17 (MTK_PIN_NO(17) | 0) 104*f5d2cbe5SCathy Xu #define PINMUX_GPIO17__FUNC_MD_INT0 (MTK_PIN_NO(17) | 1) 105*f5d2cbe5SCathy Xu #define PINMUX_GPIO17__FUNC_DP_OC_EN (MTK_PIN_NO(17) | 2) 106*f5d2cbe5SCathy Xu #define PINMUX_GPIO17__FUNC_UCTS1 (MTK_PIN_NO(17) | 3) 107*f5d2cbe5SCathy Xu #define PINMUX_GPIO17__FUNC_MD_NTN_URXD1 (MTK_PIN_NO(17) | 4) 108*f5d2cbe5SCathy Xu #define PINMUX_GPIO17__FUNC_KPCOL2 (MTK_PIN_NO(17) | 5) 109*f5d2cbe5SCathy Xu #define PINMUX_GPIO17__FUNC_TP_GPIO11_AO (MTK_PIN_NO(17) | 6) 110*f5d2cbe5SCathy Xu 111*f5d2cbe5SCathy Xu #define PINMUX_GPIO18__FUNC_GPIO18 (MTK_PIN_NO(18) | 0) 112*f5d2cbe5SCathy Xu #define PINMUX_GPIO18__FUNC_DMIC1_CLK (MTK_PIN_NO(18) | 1) 113*f5d2cbe5SCathy Xu #define PINMUX_GPIO18__FUNC_DP_RAUX_SBU1 (MTK_PIN_NO(18) | 2) 114*f5d2cbe5SCathy Xu #define PINMUX_GPIO18__FUNC_URTS1 (MTK_PIN_NO(18) | 3) 115*f5d2cbe5SCathy Xu #define PINMUX_GPIO18__FUNC_MD_NTN_UTXD1 (MTK_PIN_NO(18) | 4) 116*f5d2cbe5SCathy Xu #define PINMUX_GPIO18__FUNC_I2SIN2_DI (MTK_PIN_NO(18) | 5) 117*f5d2cbe5SCathy Xu #define PINMUX_GPIO18__FUNC_TP_UTXD_GNSS_VLP (MTK_PIN_NO(18) | 6) 118*f5d2cbe5SCathy Xu 119*f5d2cbe5SCathy Xu #define PINMUX_GPIO19__FUNC_GPIO19 (MTK_PIN_NO(19) | 0) 120*f5d2cbe5SCathy Xu #define PINMUX_GPIO19__FUNC_DMIC1_DAT (MTK_PIN_NO(19) | 1) 121*f5d2cbe5SCathy Xu #define PINMUX_GPIO19__FUNC_DP_RAUX_SBU2 (MTK_PIN_NO(19) | 2) 122*f5d2cbe5SCathy Xu #define PINMUX_GPIO19__FUNC_CONN_TCXOENA_REQ (MTK_PIN_NO(19) | 3) 123*f5d2cbe5SCathy Xu #define PINMUX_GPIO19__FUNC_CLKM3_A (MTK_PIN_NO(19) | 4) 124*f5d2cbe5SCathy Xu #define PINMUX_GPIO19__FUNC_I2SIN2_BCK (MTK_PIN_NO(19) | 5) 125*f5d2cbe5SCathy Xu #define PINMUX_GPIO19__FUNC_TP_URXD_GNSS_VLP (MTK_PIN_NO(19) | 6) 126*f5d2cbe5SCathy Xu 127*f5d2cbe5SCathy Xu #define PINMUX_GPIO20__FUNC_GPIO20 (MTK_PIN_NO(20) | 0) 128*f5d2cbe5SCathy Xu #define PINMUX_GPIO20__FUNC_IDDIG (MTK_PIN_NO(20) | 1) 129*f5d2cbe5SCathy Xu #define PINMUX_GPIO20__FUNC_LCM2_RST (MTK_PIN_NO(20) | 2) 130*f5d2cbe5SCathy Xu #define PINMUX_GPIO20__FUNC_GPS_PPS1 (MTK_PIN_NO(20) | 3) 131*f5d2cbe5SCathy Xu #define PINMUX_GPIO20__FUNC_CLKM2_A (MTK_PIN_NO(20) | 4) 132*f5d2cbe5SCathy Xu 133*f5d2cbe5SCathy Xu #define PINMUX_GPIO21__FUNC_GPIO21 (MTK_PIN_NO(21) | 0) 134*f5d2cbe5SCathy Xu #define PINMUX_GPIO21__FUNC_BPI_BUS11 (MTK_PIN_NO(21) | 1) 135*f5d2cbe5SCathy Xu #define PINMUX_GPIO21__FUNC_PCIE_PERSTN_1P (MTK_PIN_NO(21) | 2) 136*f5d2cbe5SCathy Xu #define PINMUX_GPIO21__FUNC_DSI1_TE (MTK_PIN_NO(21) | 3) 137*f5d2cbe5SCathy Xu #define PINMUX_GPIO21__FUNC_DMIC_CLK (MTK_PIN_NO(21) | 4) 138*f5d2cbe5SCathy Xu #define PINMUX_GPIO21__FUNC_SCP_DMIC_CLK (MTK_PIN_NO(21) | 5) 139*f5d2cbe5SCathy Xu 140*f5d2cbe5SCathy Xu #define PINMUX_GPIO22__FUNC_GPIO22 (MTK_PIN_NO(22) | 0) 141*f5d2cbe5SCathy Xu #define PINMUX_GPIO22__FUNC_BPI_BUS12 (MTK_PIN_NO(22) | 1) 142*f5d2cbe5SCathy Xu #define PINMUX_GPIO22__FUNC_PCIE_CLKREQN_1P (MTK_PIN_NO(22) | 2) 143*f5d2cbe5SCathy Xu #define PINMUX_GPIO22__FUNC_DSI2_TE (MTK_PIN_NO(22) | 3) 144*f5d2cbe5SCathy Xu #define PINMUX_GPIO22__FUNC_DMIC_DAT (MTK_PIN_NO(22) | 4) 145*f5d2cbe5SCathy Xu #define PINMUX_GPIO22__FUNC_SCP_DMIC_DAT (MTK_PIN_NO(22) | 5) 146*f5d2cbe5SCathy Xu 147*f5d2cbe5SCathy Xu #define PINMUX_GPIO23__FUNC_GPIO23 (MTK_PIN_NO(23) | 0) 148*f5d2cbe5SCathy Xu #define PINMUX_GPIO23__FUNC_BPI_BUS13 (MTK_PIN_NO(23) | 1) 149*f5d2cbe5SCathy Xu #define PINMUX_GPIO23__FUNC_PCIE_WAKEN_1P (MTK_PIN_NO(23) | 2) 150*f5d2cbe5SCathy Xu #define PINMUX_GPIO23__FUNC_DSI3_TE (MTK_PIN_NO(23) | 3) 151*f5d2cbe5SCathy Xu #define PINMUX_GPIO23__FUNC_DMIC1_CLK (MTK_PIN_NO(23) | 4) 152*f5d2cbe5SCathy Xu #define PINMUX_GPIO23__FUNC_SCP_DMIC1_CLK (MTK_PIN_NO(23) | 5) 153*f5d2cbe5SCathy Xu 154*f5d2cbe5SCathy Xu #define PINMUX_GPIO24__FUNC_GPIO24 (MTK_PIN_NO(24) | 0) 155*f5d2cbe5SCathy Xu #define PINMUX_GPIO24__FUNC_BPI_BUS14 (MTK_PIN_NO(24) | 1) 156*f5d2cbe5SCathy Xu #define PINMUX_GPIO24__FUNC_LCM1_RST (MTK_PIN_NO(24) | 2) 157*f5d2cbe5SCathy Xu #define PINMUX_GPIO24__FUNC_AGPS_SYNC (MTK_PIN_NO(24) | 3) 158*f5d2cbe5SCathy Xu #define PINMUX_GPIO24__FUNC_DMIC1_DAT (MTK_PIN_NO(24) | 4) 159*f5d2cbe5SCathy Xu #define PINMUX_GPIO24__FUNC_SCP_DMIC1_DAT (MTK_PIN_NO(24) | 5) 160*f5d2cbe5SCathy Xu #define PINMUX_GPIO24__FUNC_DISP_PWM1 (MTK_PIN_NO(24) | 6) 161*f5d2cbe5SCathy Xu 162*f5d2cbe5SCathy Xu #define PINMUX_GPIO25__FUNC_GPIO25 (MTK_PIN_NO(25) | 0) 163*f5d2cbe5SCathy Xu #define PINMUX_GPIO25__FUNC_BPI_BUS15 (MTK_PIN_NO(25) | 1) 164*f5d2cbe5SCathy Xu #define PINMUX_GPIO25__FUNC_LCM2_RST (MTK_PIN_NO(25) | 2) 165*f5d2cbe5SCathy Xu #define PINMUX_GPIO25__FUNC_SRCLKENAI1 (MTK_PIN_NO(25) | 3) 166*f5d2cbe5SCathy Xu #define PINMUX_GPIO25__FUNC_DMIC2_CLK (MTK_PIN_NO(25) | 4) 167*f5d2cbe5SCathy Xu #define PINMUX_GPIO25__FUNC_DISP_PWM2 (MTK_PIN_NO(25) | 6) 168*f5d2cbe5SCathy Xu 169*f5d2cbe5SCathy Xu #define PINMUX_GPIO26__FUNC_GPIO26 (MTK_PIN_NO(26) | 0) 170*f5d2cbe5SCathy Xu #define PINMUX_GPIO26__FUNC_BPI_BUS16 (MTK_PIN_NO(26) | 1) 171*f5d2cbe5SCathy Xu #define PINMUX_GPIO26__FUNC_LCM3_RST (MTK_PIN_NO(26) | 2) 172*f5d2cbe5SCathy Xu #define PINMUX_GPIO26__FUNC_DMIC2_DAT (MTK_PIN_NO(26) | 4) 173*f5d2cbe5SCathy Xu #define PINMUX_GPIO26__FUNC_DISP_PWM3 (MTK_PIN_NO(26) | 6) 174*f5d2cbe5SCathy Xu 175*f5d2cbe5SCathy Xu #define PINMUX_GPIO27__FUNC_GPIO27 (MTK_PIN_NO(27) | 0) 176*f5d2cbe5SCathy Xu #define PINMUX_GPIO27__FUNC_BPI_BUS17 (MTK_PIN_NO(27) | 1) 177*f5d2cbe5SCathy Xu #define PINMUX_GPIO27__FUNC_UTXD4 (MTK_PIN_NO(27) | 2) 178*f5d2cbe5SCathy Xu #define PINMUX_GPIO27__FUNC_DISP_PWM4 (MTK_PIN_NO(27) | 6) 179*f5d2cbe5SCathy Xu #define PINMUX_GPIO27__FUNC_DBG_MON_A20 (MTK_PIN_NO(27) | 7) 180*f5d2cbe5SCathy Xu 181*f5d2cbe5SCathy Xu #define PINMUX_GPIO28__FUNC_GPIO28 (MTK_PIN_NO(28) | 0) 182*f5d2cbe5SCathy Xu #define PINMUX_GPIO28__FUNC_BPI_BUS18 (MTK_PIN_NO(28) | 1) 183*f5d2cbe5SCathy Xu #define PINMUX_GPIO28__FUNC_URXD4 (MTK_PIN_NO(28) | 2) 184*f5d2cbe5SCathy Xu #define PINMUX_GPIO28__FUNC_SPI2_A_MI (MTK_PIN_NO(28) | 3) 185*f5d2cbe5SCathy Xu #define PINMUX_GPIO28__FUNC_CLKM0_A (MTK_PIN_NO(28) | 4) 186*f5d2cbe5SCathy Xu #define PINMUX_GPIO28__FUNC_DBG_MON_A21 (MTK_PIN_NO(28) | 7) 187*f5d2cbe5SCathy Xu 188*f5d2cbe5SCathy Xu #define PINMUX_GPIO29__FUNC_GPIO29 (MTK_PIN_NO(29) | 0) 189*f5d2cbe5SCathy Xu #define PINMUX_GPIO29__FUNC_BPI_BUS19 (MTK_PIN_NO(29) | 1) 190*f5d2cbe5SCathy Xu #define PINMUX_GPIO29__FUNC_MD_NTN_UTXD1 (MTK_PIN_NO(29) | 2) 191*f5d2cbe5SCathy Xu #define PINMUX_GPIO29__FUNC_SPI2_A_MO (MTK_PIN_NO(29) | 3) 192*f5d2cbe5SCathy Xu #define PINMUX_GPIO29__FUNC_CLKM1_A (MTK_PIN_NO(29) | 4) 193*f5d2cbe5SCathy Xu #define PINMUX_GPIO29__FUNC_UCTS4 (MTK_PIN_NO(29) | 6) 194*f5d2cbe5SCathy Xu #define PINMUX_GPIO29__FUNC_DBG_MON_A17 (MTK_PIN_NO(29) | 7) 195*f5d2cbe5SCathy Xu 196*f5d2cbe5SCathy Xu #define PINMUX_GPIO30__FUNC_GPIO30 (MTK_PIN_NO(30) | 0) 197*f5d2cbe5SCathy Xu #define PINMUX_GPIO30__FUNC_BPI_BUS20 (MTK_PIN_NO(30) | 1) 198*f5d2cbe5SCathy Xu #define PINMUX_GPIO30__FUNC_MD_NTN_URXD1 (MTK_PIN_NO(30) | 2) 199*f5d2cbe5SCathy Xu #define PINMUX_GPIO30__FUNC_SPI2_A_CLK (MTK_PIN_NO(30) | 3) 200*f5d2cbe5SCathy Xu #define PINMUX_GPIO30__FUNC_CLKM2_A (MTK_PIN_NO(30) | 4) 201*f5d2cbe5SCathy Xu #define PINMUX_GPIO30__FUNC_DSI3_HSYNC (MTK_PIN_NO(30) | 5) 202*f5d2cbe5SCathy Xu #define PINMUX_GPIO30__FUNC_URTS4 (MTK_PIN_NO(30) | 6) 203*f5d2cbe5SCathy Xu #define PINMUX_GPIO30__FUNC_DBG_MON_A18 (MTK_PIN_NO(30) | 7) 204*f5d2cbe5SCathy Xu 205*f5d2cbe5SCathy Xu #define PINMUX_GPIO31__FUNC_GPIO31 (MTK_PIN_NO(31) | 0) 206*f5d2cbe5SCathy Xu #define PINMUX_GPIO31__FUNC_BPI_BUS21 (MTK_PIN_NO(31) | 1) 207*f5d2cbe5SCathy Xu #define PINMUX_GPIO31__FUNC_SPI2_A_CSB (MTK_PIN_NO(31) | 3) 208*f5d2cbe5SCathy Xu #define PINMUX_GPIO31__FUNC_CLKM3_A (MTK_PIN_NO(31) | 4) 209*f5d2cbe5SCathy Xu #define PINMUX_GPIO31__FUNC_EDP_TX_HPD (MTK_PIN_NO(31) | 6) 210*f5d2cbe5SCathy Xu #define PINMUX_GPIO31__FUNC_DBG_MON_A19 (MTK_PIN_NO(31) | 7) 211*f5d2cbe5SCathy Xu 212*f5d2cbe5SCathy Xu #define PINMUX_GPIO32__FUNC_GPIO32 (MTK_PIN_NO(32) | 0) 213*f5d2cbe5SCathy Xu #define PINMUX_GPIO32__FUNC_LCM4_RST (MTK_PIN_NO(32) | 1) 214*f5d2cbe5SCathy Xu #define PINMUX_GPIO32__FUNC_DP_TX_HPD (MTK_PIN_NO(32) | 2) 215*f5d2cbe5SCathy Xu #define PINMUX_GPIO32__FUNC_SSPM_JTAG_TCK_VLP (MTK_PIN_NO(32) | 3) 216*f5d2cbe5SCathy Xu #define PINMUX_GPIO32__FUNC_ADSP_JTAG0_TCK (MTK_PIN_NO(32) | 4) 217*f5d2cbe5SCathy Xu #define PINMUX_GPIO32__FUNC_SCP_JTAG0_TCK_VLP (MTK_PIN_NO(32) | 5) 218*f5d2cbe5SCathy Xu #define PINMUX_GPIO32__FUNC_SPU0_TCK (MTK_PIN_NO(32) | 6) 219*f5d2cbe5SCathy Xu #define PINMUX_GPIO32__FUNC_IO_JTAG_TCK (MTK_PIN_NO(32) | 7) 220*f5d2cbe5SCathy Xu 221*f5d2cbe5SCathy Xu #define PINMUX_GPIO33__FUNC_GPIO33 (MTK_PIN_NO(33) | 0) 222*f5d2cbe5SCathy Xu #define PINMUX_GPIO33__FUNC_DSI4_TE (MTK_PIN_NO(33) | 1) 223*f5d2cbe5SCathy Xu #define PINMUX_GPIO33__FUNC_DP_OC_EN (MTK_PIN_NO(33) | 2) 224*f5d2cbe5SCathy Xu #define PINMUX_GPIO33__FUNC_SSPM_JTAG_TRSTN_VLP (MTK_PIN_NO(33) | 3) 225*f5d2cbe5SCathy Xu #define PINMUX_GPIO33__FUNC_ADSP_JTAG0_TRSTN (MTK_PIN_NO(33) | 4) 226*f5d2cbe5SCathy Xu #define PINMUX_GPIO33__FUNC_SCP_JTAG0_TRSTN_VLP (MTK_PIN_NO(33) | 5) 227*f5d2cbe5SCathy Xu #define PINMUX_GPIO33__FUNC_SPU0_NTRST (MTK_PIN_NO(33) | 6) 228*f5d2cbe5SCathy Xu #define PINMUX_GPIO33__FUNC_IO_JTAG_TRSTN (MTK_PIN_NO(33) | 7) 229*f5d2cbe5SCathy Xu 230*f5d2cbe5SCathy Xu #define PINMUX_GPIO34__FUNC_GPIO34 (MTK_PIN_NO(34) | 0) 231*f5d2cbe5SCathy Xu #define PINMUX_GPIO34__FUNC_UCTS5 (MTK_PIN_NO(34) | 1) 232*f5d2cbe5SCathy Xu #define PINMUX_GPIO34__FUNC_DP_RAUX_SBU1 (MTK_PIN_NO(34) | 2) 233*f5d2cbe5SCathy Xu #define PINMUX_GPIO34__FUNC_SSPM_JTAG_TDI_VLP (MTK_PIN_NO(34) | 3) 234*f5d2cbe5SCathy Xu #define PINMUX_GPIO34__FUNC_ADSP_JTAG0_TDI (MTK_PIN_NO(34) | 4) 235*f5d2cbe5SCathy Xu #define PINMUX_GPIO34__FUNC_SCP_JTAG0_TDI_VLP (MTK_PIN_NO(34) | 5) 236*f5d2cbe5SCathy Xu #define PINMUX_GPIO34__FUNC_SPU0_TDI (MTK_PIN_NO(34) | 6) 237*f5d2cbe5SCathy Xu #define PINMUX_GPIO34__FUNC_IO_JTAG_TDI (MTK_PIN_NO(34) | 7) 238*f5d2cbe5SCathy Xu 239*f5d2cbe5SCathy Xu #define PINMUX_GPIO35__FUNC_GPIO35 (MTK_PIN_NO(35) | 0) 240*f5d2cbe5SCathy Xu #define PINMUX_GPIO35__FUNC_URTS5 (MTK_PIN_NO(35) | 1) 241*f5d2cbe5SCathy Xu #define PINMUX_GPIO35__FUNC_DP_RAUX_SBU2 (MTK_PIN_NO(35) | 2) 242*f5d2cbe5SCathy Xu #define PINMUX_GPIO35__FUNC_SSPM_JTAG_TDO_VLP (MTK_PIN_NO(35) | 3) 243*f5d2cbe5SCathy Xu #define PINMUX_GPIO35__FUNC_ADSP_JTAG0_TDO (MTK_PIN_NO(35) | 4) 244*f5d2cbe5SCathy Xu #define PINMUX_GPIO35__FUNC_SCP_JTAG0_TDO_VLP (MTK_PIN_NO(35) | 5) 245*f5d2cbe5SCathy Xu #define PINMUX_GPIO35__FUNC_SPU0_TDO (MTK_PIN_NO(35) | 6) 246*f5d2cbe5SCathy Xu #define PINMUX_GPIO35__FUNC_IO_JTAG_TDO (MTK_PIN_NO(35) | 7) 247*f5d2cbe5SCathy Xu 248*f5d2cbe5SCathy Xu #define PINMUX_GPIO36__FUNC_GPIO36 (MTK_PIN_NO(36) | 0) 249*f5d2cbe5SCathy Xu #define PINMUX_GPIO36__FUNC_UTXD5 (MTK_PIN_NO(36) | 1) 250*f5d2cbe5SCathy Xu #define PINMUX_GPIO36__FUNC_SSPM_JTAG_TMS_VLP (MTK_PIN_NO(36) | 3) 251*f5d2cbe5SCathy Xu #define PINMUX_GPIO36__FUNC_ADSP_JTAG0_TMS (MTK_PIN_NO(36) | 4) 252*f5d2cbe5SCathy Xu #define PINMUX_GPIO36__FUNC_SCP_JTAG0_TMS_VLP (MTK_PIN_NO(36) | 5) 253*f5d2cbe5SCathy Xu #define PINMUX_GPIO36__FUNC_SPU0_TMS (MTK_PIN_NO(36) | 6) 254*f5d2cbe5SCathy Xu #define PINMUX_GPIO36__FUNC_IO_JTAG_TMS (MTK_PIN_NO(36) | 7) 255*f5d2cbe5SCathy Xu 256*f5d2cbe5SCathy Xu #define PINMUX_GPIO37__FUNC_GPIO37 (MTK_PIN_NO(37) | 0) 257*f5d2cbe5SCathy Xu #define PINMUX_GPIO37__FUNC_URXD5 (MTK_PIN_NO(37) | 1) 258*f5d2cbe5SCathy Xu #define PINMUX_GPIO37__FUNC_MD_INT3 (MTK_PIN_NO(37) | 3) 259*f5d2cbe5SCathy Xu #define PINMUX_GPIO37__FUNC_CLKM0_B (MTK_PIN_NO(37) | 4) 260*f5d2cbe5SCathy Xu #define PINMUX_GPIO37__FUNC_TP_GPIO5_AO (MTK_PIN_NO(37) | 5) 261*f5d2cbe5SCathy Xu #define PINMUX_GPIO37__FUNC_SPU0_UTX (MTK_PIN_NO(37) | 6) 262*f5d2cbe5SCathy Xu #define PINMUX_GPIO37__FUNC_DAP_MD32_SWCK (MTK_PIN_NO(37) | 7) 263*f5d2cbe5SCathy Xu 264*f5d2cbe5SCathy Xu #define PINMUX_GPIO38__FUNC_GPIO38 (MTK_PIN_NO(38) | 0) 265*f5d2cbe5SCathy Xu #define PINMUX_GPIO38__FUNC_SPMI_P_TRIG_FLAG (MTK_PIN_NO(38) | 2) 266*f5d2cbe5SCathy Xu #define PINMUX_GPIO38__FUNC_MD_INT4 (MTK_PIN_NO(38) | 3) 267*f5d2cbe5SCathy Xu #define PINMUX_GPIO38__FUNC_CLKM1_B (MTK_PIN_NO(38) | 4) 268*f5d2cbe5SCathy Xu #define PINMUX_GPIO38__FUNC_TP_GPIO6_AO (MTK_PIN_NO(38) | 5) 269*f5d2cbe5SCathy Xu #define PINMUX_GPIO38__FUNC_SPU0_URX (MTK_PIN_NO(38) | 6) 270*f5d2cbe5SCathy Xu #define PINMUX_GPIO38__FUNC_DAP_MD32_SWD (MTK_PIN_NO(38) | 7) 271*f5d2cbe5SCathy Xu 272*f5d2cbe5SCathy Xu #define PINMUX_GPIO39__FUNC_GPIO39 (MTK_PIN_NO(39) | 0) 273*f5d2cbe5SCathy Xu #define PINMUX_GPIO39__FUNC_I2S_MCK0 (MTK_PIN_NO(39) | 1) 274*f5d2cbe5SCathy Xu #define PINMUX_GPIO39__FUNC_GPS_PPS0 (MTK_PIN_NO(39) | 3) 275*f5d2cbe5SCathy Xu #define PINMUX_GPIO39__FUNC_CONN_TCXOENA_REQ (MTK_PIN_NO(39) | 4) 276*f5d2cbe5SCathy Xu #define PINMUX_GPIO39__FUNC_DBG_MON_B12 (MTK_PIN_NO(39) | 7) 277*f5d2cbe5SCathy Xu 278*f5d2cbe5SCathy Xu #define PINMUX_GPIO40__FUNC_GPIO40 (MTK_PIN_NO(40) | 0) 279*f5d2cbe5SCathy Xu #define PINMUX_GPIO40__FUNC_I2SIN6_0_BCK (MTK_PIN_NO(40) | 1) 280*f5d2cbe5SCathy Xu #define PINMUX_GPIO40__FUNC_SPI4_B_CLK (MTK_PIN_NO(40) | 3) 281*f5d2cbe5SCathy Xu #define PINMUX_GPIO40__FUNC_UCTS2 (MTK_PIN_NO(40) | 4) 282*f5d2cbe5SCathy Xu #define PINMUX_GPIO40__FUNC_CCU1_UTXD (MTK_PIN_NO(40) | 5) 283*f5d2cbe5SCathy Xu #define PINMUX_GPIO40__FUNC_DBG_MON_B13 (MTK_PIN_NO(40) | 7) 284*f5d2cbe5SCathy Xu 285*f5d2cbe5SCathy Xu #define PINMUX_GPIO41__FUNC_GPIO41 (MTK_PIN_NO(41) | 0) 286*f5d2cbe5SCathy Xu #define PINMUX_GPIO41__FUNC_I2SIN6_0_LRCK (MTK_PIN_NO(41) | 1) 287*f5d2cbe5SCathy Xu #define PINMUX_GPIO41__FUNC_SPI4_B_CSB (MTK_PIN_NO(41) | 3) 288*f5d2cbe5SCathy Xu #define PINMUX_GPIO41__FUNC_URTS2 (MTK_PIN_NO(41) | 4) 289*f5d2cbe5SCathy Xu #define PINMUX_GPIO41__FUNC_CCU1_URXD (MTK_PIN_NO(41) | 5) 290*f5d2cbe5SCathy Xu #define PINMUX_GPIO41__FUNC_DBG_MON_B14 (MTK_PIN_NO(41) | 7) 291*f5d2cbe5SCathy Xu 292*f5d2cbe5SCathy Xu #define PINMUX_GPIO42__FUNC_GPIO42 (MTK_PIN_NO(42) | 0) 293*f5d2cbe5SCathy Xu #define PINMUX_GPIO42__FUNC_I2SIN6_0_DI (MTK_PIN_NO(42) | 1) 294*f5d2cbe5SCathy Xu #define PINMUX_GPIO42__FUNC_SPI4_B_MI (MTK_PIN_NO(42) | 3) 295*f5d2cbe5SCathy Xu #define PINMUX_GPIO42__FUNC_URXD2 (MTK_PIN_NO(42) | 4) 296*f5d2cbe5SCathy Xu #define PINMUX_GPIO42__FUNC_CCU1_URTS (MTK_PIN_NO(42) | 5) 297*f5d2cbe5SCathy Xu #define PINMUX_GPIO42__FUNC_MD32_0_RXD (MTK_PIN_NO(42) | 6) 298*f5d2cbe5SCathy Xu #define PINMUX_GPIO42__FUNC_DBG_MON_B15 (MTK_PIN_NO(42) | 7) 299*f5d2cbe5SCathy Xu 300*f5d2cbe5SCathy Xu #define PINMUX_GPIO43__FUNC_GPIO43 (MTK_PIN_NO(43) | 0) 301*f5d2cbe5SCathy Xu #define PINMUX_GPIO43__FUNC_I2SOUT6_0_DO (MTK_PIN_NO(43) | 1) 302*f5d2cbe5SCathy Xu #define PINMUX_GPIO43__FUNC_SPI4_B_MO (MTK_PIN_NO(43) | 3) 303*f5d2cbe5SCathy Xu #define PINMUX_GPIO43__FUNC_UTXD2 (MTK_PIN_NO(43) | 4) 304*f5d2cbe5SCathy Xu #define PINMUX_GPIO43__FUNC_CCU1_UCTS (MTK_PIN_NO(43) | 5) 305*f5d2cbe5SCathy Xu #define PINMUX_GPIO43__FUNC_MD32_0_TXD (MTK_PIN_NO(43) | 6) 306*f5d2cbe5SCathy Xu #define PINMUX_GPIO43__FUNC_DBG_MON_B16 (MTK_PIN_NO(43) | 7) 307*f5d2cbe5SCathy Xu 308*f5d2cbe5SCathy Xu #define PINMUX_GPIO44__FUNC_GPIO44 (MTK_PIN_NO(44) | 0) 309*f5d2cbe5SCathy Xu #define PINMUX_GPIO44__FUNC_MD_INT1_C2K_UIM0_HOT_PLUG (MTK_PIN_NO(44) | 1) 310*f5d2cbe5SCathy Xu #define PINMUX_GPIO44__FUNC_SPI3_A_CLK (MTK_PIN_NO(44) | 3) 311*f5d2cbe5SCathy Xu #define PINMUX_GPIO44__FUNC_TP_GPIO10_AO (MTK_PIN_NO(44) | 6) 312*f5d2cbe5SCathy Xu 313*f5d2cbe5SCathy Xu #define PINMUX_GPIO45__FUNC_GPIO45 (MTK_PIN_NO(45) | 0) 314*f5d2cbe5SCathy Xu #define PINMUX_GPIO45__FUNC_MD_INT2_C2K_UIM1_HOT_PLUG (MTK_PIN_NO(45) | 1) 315*f5d2cbe5SCathy Xu #define PINMUX_GPIO45__FUNC_DSI2_HSYNC (MTK_PIN_NO(45) | 2) 316*f5d2cbe5SCathy Xu #define PINMUX_GPIO45__FUNC_SPI3_A_CSB (MTK_PIN_NO(45) | 3) 317*f5d2cbe5SCathy Xu #define PINMUX_GPIO45__FUNC_PWM_VLP (MTK_PIN_NO(45) | 4) 318*f5d2cbe5SCathy Xu #define PINMUX_GPIO45__FUNC_TP_GPIO11_AO (MTK_PIN_NO(45) | 6) 319*f5d2cbe5SCathy Xu 320*f5d2cbe5SCathy Xu #define PINMUX_GPIO46__FUNC_GPIO46 (MTK_PIN_NO(46) | 0) 321*f5d2cbe5SCathy Xu #define PINMUX_GPIO46__FUNC_SCP_SCL4 (MTK_PIN_NO(46) | 1) 322*f5d2cbe5SCathy Xu #define PINMUX_GPIO46__FUNC_PWM_VLP (MTK_PIN_NO(46) | 2) 323*f5d2cbe5SCathy Xu #define PINMUX_GPIO46__FUNC_SCP_ILDO_DTEST1_VLP (MTK_PIN_NO(46) | 4) 324*f5d2cbe5SCathy Xu #define PINMUX_GPIO46__FUNC_UFS_MPHY_SCL (MTK_PIN_NO(46) | 5) 325*f5d2cbe5SCathy Xu #define PINMUX_GPIO46__FUNC_TP_GPIO0_AO (MTK_PIN_NO(46) | 6) 326*f5d2cbe5SCathy Xu 327*f5d2cbe5SCathy Xu #define PINMUX_GPIO47__FUNC_GPIO47 (MTK_PIN_NO(47) | 0) 328*f5d2cbe5SCathy Xu #define PINMUX_GPIO47__FUNC_SCP_SDA4 (MTK_PIN_NO(47) | 1) 329*f5d2cbe5SCathy Xu #define PINMUX_GPIO47__FUNC_SCP_ILDO_DTEST2_VLP (MTK_PIN_NO(47) | 4) 330*f5d2cbe5SCathy Xu #define PINMUX_GPIO47__FUNC_UFS_MPHY_SDA (MTK_PIN_NO(47) | 5) 331*f5d2cbe5SCathy Xu #define PINMUX_GPIO47__FUNC_TP_GPIO1_AO (MTK_PIN_NO(47) | 6) 332*f5d2cbe5SCathy Xu 333*f5d2cbe5SCathy Xu #define PINMUX_GPIO48__FUNC_GPIO48 (MTK_PIN_NO(48) | 0) 334*f5d2cbe5SCathy Xu #define PINMUX_GPIO48__FUNC_SCP_SCL5 (MTK_PIN_NO(48) | 1) 335*f5d2cbe5SCathy Xu #define PINMUX_GPIO48__FUNC_PWM_VLP (MTK_PIN_NO(48) | 2) 336*f5d2cbe5SCathy Xu #define PINMUX_GPIO48__FUNC_CCU0_UTXD (MTK_PIN_NO(48) | 3) 337*f5d2cbe5SCathy Xu #define PINMUX_GPIO48__FUNC_SCP_ILDO_DTEST3_VLP (MTK_PIN_NO(48) | 4) 338*f5d2cbe5SCathy Xu #define PINMUX_GPIO48__FUNC_TP_GPIO2_AO (MTK_PIN_NO(48) | 6) 339*f5d2cbe5SCathy Xu 340*f5d2cbe5SCathy Xu #define PINMUX_GPIO49__FUNC_GPIO49 (MTK_PIN_NO(49) | 0) 341*f5d2cbe5SCathy Xu #define PINMUX_GPIO49__FUNC_SCP_SDA5 (MTK_PIN_NO(49) | 1) 342*f5d2cbe5SCathy Xu #define PINMUX_GPIO49__FUNC_CCU0_URXD (MTK_PIN_NO(49) | 3) 343*f5d2cbe5SCathy Xu #define PINMUX_GPIO49__FUNC_SCP_ILDO_DTEST4_VLP (MTK_PIN_NO(49) | 4) 344*f5d2cbe5SCathy Xu #define PINMUX_GPIO49__FUNC_TP_GPIO3_AO (MTK_PIN_NO(49) | 6) 345*f5d2cbe5SCathy Xu 346*f5d2cbe5SCathy Xu #define PINMUX_GPIO50__FUNC_GPIO50 (MTK_PIN_NO(50) | 0) 347*f5d2cbe5SCathy Xu #define PINMUX_GPIO50__FUNC_SCP_SCL6 (MTK_PIN_NO(50) | 1) 348*f5d2cbe5SCathy Xu #define PINMUX_GPIO50__FUNC_PWM_VLP (MTK_PIN_NO(50) | 2) 349*f5d2cbe5SCathy Xu #define PINMUX_GPIO50__FUNC_CCU0_URTS (MTK_PIN_NO(50) | 3) 350*f5d2cbe5SCathy Xu #define PINMUX_GPIO50__FUNC_DSI_HSYNC (MTK_PIN_NO(50) | 4) 351*f5d2cbe5SCathy Xu #define PINMUX_GPIO50__FUNC_TP_GPIO4_AO (MTK_PIN_NO(50) | 6) 352*f5d2cbe5SCathy Xu 353*f5d2cbe5SCathy Xu #define PINMUX_GPIO51__FUNC_GPIO51 (MTK_PIN_NO(51) | 0) 354*f5d2cbe5SCathy Xu #define PINMUX_GPIO51__FUNC_SCP_SDA6 (MTK_PIN_NO(51) | 1) 355*f5d2cbe5SCathy Xu #define PINMUX_GPIO51__FUNC_CCU0_UCTS (MTK_PIN_NO(51) | 3) 356*f5d2cbe5SCathy Xu #define PINMUX_GPIO51__FUNC_DSI1_HSYNC (MTK_PIN_NO(51) | 4) 357*f5d2cbe5SCathy Xu #define PINMUX_GPIO51__FUNC_TP_GPIO5_AO (MTK_PIN_NO(51) | 6) 358*f5d2cbe5SCathy Xu 359*f5d2cbe5SCathy Xu #define PINMUX_GPIO52__FUNC_GPIO52 (MTK_PIN_NO(52) | 0) 360*f5d2cbe5SCathy Xu #define PINMUX_GPIO52__FUNC_SCP_SCL1 (MTK_PIN_NO(52) | 1) 361*f5d2cbe5SCathy Xu #define PINMUX_GPIO52__FUNC_TDM_DATA2 (MTK_PIN_NO(52) | 3) 362*f5d2cbe5SCathy Xu 363*f5d2cbe5SCathy Xu #define PINMUX_GPIO53__FUNC_GPIO53 (MTK_PIN_NO(53) | 0) 364*f5d2cbe5SCathy Xu #define PINMUX_GPIO53__FUNC_SCP_SDA1 (MTK_PIN_NO(53) | 1) 365*f5d2cbe5SCathy Xu #define PINMUX_GPIO53__FUNC_TDM_DATA3 (MTK_PIN_NO(53) | 3) 366*f5d2cbe5SCathy Xu 367*f5d2cbe5SCathy Xu #define PINMUX_GPIO54__FUNC_GPIO54 (MTK_PIN_NO(54) | 0) 368*f5d2cbe5SCathy Xu #define PINMUX_GPIO54__FUNC_AUD_CLK_MOSI (MTK_PIN_NO(54) | 1) 369*f5d2cbe5SCathy Xu #define PINMUX_GPIO54__FUNC_TDM_MCK (MTK_PIN_NO(54) | 3) 370*f5d2cbe5SCathy Xu 371*f5d2cbe5SCathy Xu #define PINMUX_GPIO55__FUNC_GPIO55 (MTK_PIN_NO(55) | 0) 372*f5d2cbe5SCathy Xu #define PINMUX_GPIO55__FUNC_AUD_CLK_MISO (MTK_PIN_NO(55) | 1) 373*f5d2cbe5SCathy Xu #define PINMUX_GPIO55__FUNC_I2SOUT2_BCK (MTK_PIN_NO(55) | 2) 374*f5d2cbe5SCathy Xu #define PINMUX_GPIO55__FUNC_TDM_BCK (MTK_PIN_NO(55) | 3) 375*f5d2cbe5SCathy Xu 376*f5d2cbe5SCathy Xu #define PINMUX_GPIO56__FUNC_GPIO56 (MTK_PIN_NO(56) | 0) 377*f5d2cbe5SCathy Xu #define PINMUX_GPIO56__FUNC_AUD_DAT_MOSI0 (MTK_PIN_NO(56) | 1) 378*f5d2cbe5SCathy Xu #define PINMUX_GPIO56__FUNC_I2SOUT2_LRCK (MTK_PIN_NO(56) | 2) 379*f5d2cbe5SCathy Xu #define PINMUX_GPIO56__FUNC_TDM_LRCK (MTK_PIN_NO(56) | 3) 380*f5d2cbe5SCathy Xu 381*f5d2cbe5SCathy Xu #define PINMUX_GPIO57__FUNC_GPIO57 (MTK_PIN_NO(57) | 0) 382*f5d2cbe5SCathy Xu #define PINMUX_GPIO57__FUNC_AUD_DAT_MOSI1 (MTK_PIN_NO(57) | 1) 383*f5d2cbe5SCathy Xu #define PINMUX_GPIO57__FUNC_I2SOUT2_DO (MTK_PIN_NO(57) | 2) 384*f5d2cbe5SCathy Xu #define PINMUX_GPIO57__FUNC_TDM_DATA0 (MTK_PIN_NO(57) | 3) 385*f5d2cbe5SCathy Xu 386*f5d2cbe5SCathy Xu #define PINMUX_GPIO58__FUNC_GPIO58 (MTK_PIN_NO(58) | 0) 387*f5d2cbe5SCathy Xu #define PINMUX_GPIO58__FUNC_AUD_DAT_MISO0 (MTK_PIN_NO(58) | 1) 388*f5d2cbe5SCathy Xu #define PINMUX_GPIO58__FUNC_TDM_DATA1 (MTK_PIN_NO(58) | 3) 389*f5d2cbe5SCathy Xu 390*f5d2cbe5SCathy Xu #define PINMUX_GPIO59__FUNC_GPIO59 (MTK_PIN_NO(59) | 0) 391*f5d2cbe5SCathy Xu #define PINMUX_GPIO59__FUNC_AUD_DAT_MISO1 (MTK_PIN_NO(59) | 1) 392*f5d2cbe5SCathy Xu #define PINMUX_GPIO59__FUNC_I2SIN1_BCK (MTK_PIN_NO(59) | 3) 393*f5d2cbe5SCathy Xu 394*f5d2cbe5SCathy Xu #define PINMUX_GPIO60__FUNC_GPIO60 (MTK_PIN_NO(60) | 0) 395*f5d2cbe5SCathy Xu #define PINMUX_GPIO60__FUNC_KPCOL0 (MTK_PIN_NO(60) | 1) 396*f5d2cbe5SCathy Xu #define PINMUX_GPIO60__FUNC_TP_GPIO13_AO (MTK_PIN_NO(60) | 6) 397*f5d2cbe5SCathy Xu 398*f5d2cbe5SCathy Xu #define PINMUX_GPIO61__FUNC_GPIO61 (MTK_PIN_NO(61) | 0) 399*f5d2cbe5SCathy Xu #define PINMUX_GPIO61__FUNC_MCU_M_PMIC_POC_I (MTK_PIN_NO(61) | 1) 400*f5d2cbe5SCathy Xu 401*f5d2cbe5SCathy Xu #define PINMUX_GPIO62__FUNC_GPIO62 (MTK_PIN_NO(62) | 0) 402*f5d2cbe5SCathy Xu #define PINMUX_GPIO62__FUNC_MCU_B_PMIC_POC_I (MTK_PIN_NO(62) | 1) 403*f5d2cbe5SCathy Xu 404*f5d2cbe5SCathy Xu #define PINMUX_GPIO63__FUNC_GPIO63 (MTK_PIN_NO(63) | 0) 405*f5d2cbe5SCathy Xu #define PINMUX_GPIO63__FUNC_MFG_PMIC_POC_I (MTK_PIN_NO(63) | 1) 406*f5d2cbe5SCathy Xu 407*f5d2cbe5SCathy Xu #define PINMUX_GPIO64__FUNC_GPIO64 (MTK_PIN_NO(64) | 0) 408*f5d2cbe5SCathy Xu #define PINMUX_GPIO64__FUNC_PRE_UVLO (MTK_PIN_NO(64) | 1) 409*f5d2cbe5SCathy Xu 410*f5d2cbe5SCathy Xu #define PINMUX_GPIO65__FUNC_GPIO65 (MTK_PIN_NO(65) | 0) 411*f5d2cbe5SCathy Xu #define PINMUX_GPIO65__FUNC_DPM2PMIC (MTK_PIN_NO(65) | 1) 412*f5d2cbe5SCathy Xu #define PINMUX_GPIO65__FUNC_SRCLKENA1 (MTK_PIN_NO(65) | 2) 413*f5d2cbe5SCathy Xu 414*f5d2cbe5SCathy Xu #define PINMUX_GPIO66__FUNC_GPIO66 (MTK_PIN_NO(66) | 0) 415*f5d2cbe5SCathy Xu #define PINMUX_GPIO66__FUNC_WATCHDOG (MTK_PIN_NO(66) | 1) 416*f5d2cbe5SCathy Xu 417*f5d2cbe5SCathy Xu #define PINMUX_GPIO67__FUNC_GPIO67 (MTK_PIN_NO(67) | 0) 418*f5d2cbe5SCathy Xu #define PINMUX_GPIO67__FUNC_SRCLKENA0 (MTK_PIN_NO(67) | 1) 419*f5d2cbe5SCathy Xu 420*f5d2cbe5SCathy Xu #define PINMUX_GPIO68__FUNC_GPIO68 (MTK_PIN_NO(68) | 0) 421*f5d2cbe5SCathy Xu #define PINMUX_GPIO68__FUNC_SCP_VREQ_VAO (MTK_PIN_NO(68) | 1) 422*f5d2cbe5SCathy Xu 423*f5d2cbe5SCathy Xu #define PINMUX_GPIO69__FUNC_GPIO69 (MTK_PIN_NO(69) | 0) 424*f5d2cbe5SCathy Xu #define PINMUX_GPIO69__FUNC_RTC32K_CK (MTK_PIN_NO(69) | 1) 425*f5d2cbe5SCathy Xu 426*f5d2cbe5SCathy Xu #define PINMUX_GPIO70__FUNC_GPIO70 (MTK_PIN_NO(70) | 0) 427*f5d2cbe5SCathy Xu #define PINMUX_GPIO70__FUNC_CMFLASH0 (MTK_PIN_NO(70) | 1) 428*f5d2cbe5SCathy Xu 429*f5d2cbe5SCathy Xu #define PINMUX_GPIO71__FUNC_GPIO71 (MTK_PIN_NO(71) | 0) 430*f5d2cbe5SCathy Xu 431*f5d2cbe5SCathy Xu #define PINMUX_GPIO72__FUNC_GPIO72 (MTK_PIN_NO(72) | 0) 432*f5d2cbe5SCathy Xu 433*f5d2cbe5SCathy Xu #define PINMUX_GPIO73__FUNC_GPIO73 (MTK_PIN_NO(73) | 0) 434*f5d2cbe5SCathy Xu 435*f5d2cbe5SCathy Xu #define PINMUX_GPIO74__FUNC_GPIO74 (MTK_PIN_NO(74) | 0) 436*f5d2cbe5SCathy Xu #define PINMUX_GPIO74__FUNC_DCXO_FPM_LPM (MTK_PIN_NO(74) | 1) 437*f5d2cbe5SCathy Xu 438*f5d2cbe5SCathy Xu #define PINMUX_GPIO75__FUNC_GPIO75 (MTK_PIN_NO(75) | 0) 439*f5d2cbe5SCathy Xu #define PINMUX_GPIO75__FUNC_SPMI_M_SCL (MTK_PIN_NO(75) | 1) 440*f5d2cbe5SCathy Xu 441*f5d2cbe5SCathy Xu #define PINMUX_GPIO76__FUNC_GPIO76 (MTK_PIN_NO(76) | 0) 442*f5d2cbe5SCathy Xu #define PINMUX_GPIO76__FUNC_SPMI_M_SDA (MTK_PIN_NO(76) | 1) 443*f5d2cbe5SCathy Xu 444*f5d2cbe5SCathy Xu #define PINMUX_GPIO77__FUNC_GPIO77 (MTK_PIN_NO(77) | 0) 445*f5d2cbe5SCathy Xu #define PINMUX_GPIO77__FUNC_SPMI_P_SCL (MTK_PIN_NO(77) | 1) 446*f5d2cbe5SCathy Xu 447*f5d2cbe5SCathy Xu #define PINMUX_GPIO78__FUNC_GPIO78 (MTK_PIN_NO(78) | 0) 448*f5d2cbe5SCathy Xu #define PINMUX_GPIO78__FUNC_SPMI_P_SDA (MTK_PIN_NO(78) | 1) 449*f5d2cbe5SCathy Xu 450*f5d2cbe5SCathy Xu #define PINMUX_GPIO79__FUNC_GPIO79 (MTK_PIN_NO(79) | 0) 451*f5d2cbe5SCathy Xu #define PINMUX_GPIO79__FUNC_CMMCLK0 (MTK_PIN_NO(79) | 1) 452*f5d2cbe5SCathy Xu #define PINMUX_GPIO79__FUNC_MD_INT4 (MTK_PIN_NO(79) | 2) 453*f5d2cbe5SCathy Xu 454*f5d2cbe5SCathy Xu #define PINMUX_GPIO80__FUNC_GPIO80 (MTK_PIN_NO(80) | 0) 455*f5d2cbe5SCathy Xu #define PINMUX_GPIO80__FUNC_CMMCLK1 (MTK_PIN_NO(80) | 1) 456*f5d2cbe5SCathy Xu 457*f5d2cbe5SCathy Xu #define PINMUX_GPIO81__FUNC_GPIO81 (MTK_PIN_NO(81) | 0) 458*f5d2cbe5SCathy Xu #define PINMUX_GPIO81__FUNC_SCP_SPI0_CK (MTK_PIN_NO(81) | 1) 459*f5d2cbe5SCathy Xu #define PINMUX_GPIO81__FUNC_SPI6_B_CLK (MTK_PIN_NO(81) | 2) 460*f5d2cbe5SCathy Xu #define PINMUX_GPIO81__FUNC_PWM_VLP (MTK_PIN_NO(81) | 3) 461*f5d2cbe5SCathy Xu #define PINMUX_GPIO81__FUNC_I2SOUT5_BCK (MTK_PIN_NO(81) | 4) 462*f5d2cbe5SCathy Xu #define PINMUX_GPIO81__FUNC_TP_GPIO0_AO (MTK_PIN_NO(81) | 6) 463*f5d2cbe5SCathy Xu 464*f5d2cbe5SCathy Xu #define PINMUX_GPIO82__FUNC_GPIO82 (MTK_PIN_NO(82) | 0) 465*f5d2cbe5SCathy Xu #define PINMUX_GPIO82__FUNC_SCP_SPI0_CS (MTK_PIN_NO(82) | 1) 466*f5d2cbe5SCathy Xu #define PINMUX_GPIO82__FUNC_SPI6_B_CSB (MTK_PIN_NO(82) | 2) 467*f5d2cbe5SCathy Xu #define PINMUX_GPIO82__FUNC_I2SOUT5_LRCK (MTK_PIN_NO(82) | 4) 468*f5d2cbe5SCathy Xu #define PINMUX_GPIO82__FUNC_TP_GPIO1_AO (MTK_PIN_NO(82) | 6) 469*f5d2cbe5SCathy Xu 470*f5d2cbe5SCathy Xu #define PINMUX_GPIO83__FUNC_GPIO83 (MTK_PIN_NO(83) | 0) 471*f5d2cbe5SCathy Xu #define PINMUX_GPIO83__FUNC_SCP_SPI0_MO (MTK_PIN_NO(83) | 1) 472*f5d2cbe5SCathy Xu #define PINMUX_GPIO83__FUNC_SPI6_B_MO (MTK_PIN_NO(83) | 2) 473*f5d2cbe5SCathy Xu #define PINMUX_GPIO83__FUNC_I2SOUT5_DATA0 (MTK_PIN_NO(83) | 4) 474*f5d2cbe5SCathy Xu #define PINMUX_GPIO83__FUNC_TP_GPIO2_AO (MTK_PIN_NO(83) | 6) 475*f5d2cbe5SCathy Xu 476*f5d2cbe5SCathy Xu #define PINMUX_GPIO84__FUNC_GPIO84 (MTK_PIN_NO(84) | 0) 477*f5d2cbe5SCathy Xu #define PINMUX_GPIO84__FUNC_SCP_SPI0_MI (MTK_PIN_NO(84) | 1) 478*f5d2cbe5SCathy Xu #define PINMUX_GPIO84__FUNC_SPI6_B_MI (MTK_PIN_NO(84) | 2) 479*f5d2cbe5SCathy Xu #define PINMUX_GPIO84__FUNC_I2SOUT5_DATA1 (MTK_PIN_NO(84) | 4) 480*f5d2cbe5SCathy Xu #define PINMUX_GPIO84__FUNC_TP_GPIO3_AO (MTK_PIN_NO(84) | 6) 481*f5d2cbe5SCathy Xu 482*f5d2cbe5SCathy Xu #define PINMUX_GPIO85__FUNC_GPIO85 (MTK_PIN_NO(85) | 0) 483*f5d2cbe5SCathy Xu #define PINMUX_GPIO85__FUNC_SCP_SPI1_CK (MTK_PIN_NO(85) | 1) 484*f5d2cbe5SCathy Xu #define PINMUX_GPIO85__FUNC_SPI7_B_CLK (MTK_PIN_NO(85) | 2) 485*f5d2cbe5SCathy Xu #define PINMUX_GPIO85__FUNC_I2SIN5_DATA0 (MTK_PIN_NO(85) | 4) 486*f5d2cbe5SCathy Xu #define PINMUX_GPIO85__FUNC_PWM_VLP (MTK_PIN_NO(85) | 5) 487*f5d2cbe5SCathy Xu #define PINMUX_GPIO85__FUNC_TP_GPIO4_AO (MTK_PIN_NO(85) | 6) 488*f5d2cbe5SCathy Xu 489*f5d2cbe5SCathy Xu #define PINMUX_GPIO86__FUNC_GPIO86 (MTK_PIN_NO(86) | 0) 490*f5d2cbe5SCathy Xu #define PINMUX_GPIO86__FUNC_SCP_SPI1_CS (MTK_PIN_NO(86) | 1) 491*f5d2cbe5SCathy Xu #define PINMUX_GPIO86__FUNC_SPI7_B_CSB (MTK_PIN_NO(86) | 2) 492*f5d2cbe5SCathy Xu #define PINMUX_GPIO86__FUNC_I2SIN5_DATA1 (MTK_PIN_NO(86) | 4) 493*f5d2cbe5SCathy Xu #define PINMUX_GPIO86__FUNC_TP_GPIO5_AO (MTK_PIN_NO(86) | 6) 494*f5d2cbe5SCathy Xu 495*f5d2cbe5SCathy Xu #define PINMUX_GPIO87__FUNC_GPIO87 (MTK_PIN_NO(87) | 0) 496*f5d2cbe5SCathy Xu #define PINMUX_GPIO87__FUNC_SCP_SPI1_MO (MTK_PIN_NO(87) | 1) 497*f5d2cbe5SCathy Xu #define PINMUX_GPIO87__FUNC_SPI7_B_MO (MTK_PIN_NO(87) | 2) 498*f5d2cbe5SCathy Xu #define PINMUX_GPIO87__FUNC_I2SIN5_BCK (MTK_PIN_NO(87) | 4) 499*f5d2cbe5SCathy Xu #define PINMUX_GPIO87__FUNC_TP_GPIO6_AO (MTK_PIN_NO(87) | 6) 500*f5d2cbe5SCathy Xu 501*f5d2cbe5SCathy Xu #define PINMUX_GPIO88__FUNC_GPIO88 (MTK_PIN_NO(88) | 0) 502*f5d2cbe5SCathy Xu #define PINMUX_GPIO88__FUNC_SCP_SPI1_MI (MTK_PIN_NO(88) | 1) 503*f5d2cbe5SCathy Xu #define PINMUX_GPIO88__FUNC_SPI7_B_MI (MTK_PIN_NO(88) | 2) 504*f5d2cbe5SCathy Xu #define PINMUX_GPIO88__FUNC_I2SIN5_LRCK (MTK_PIN_NO(88) | 4) 505*f5d2cbe5SCathy Xu #define PINMUX_GPIO88__FUNC_TP_GPIO7_AO (MTK_PIN_NO(88) | 6) 506*f5d2cbe5SCathy Xu 507*f5d2cbe5SCathy Xu #define PINMUX_GPIO89__FUNC_GPIO89 (MTK_PIN_NO(89) | 0) 508*f5d2cbe5SCathy Xu #define PINMUX_GPIO89__FUNC_DSI_TE (MTK_PIN_NO(89) | 1) 509*f5d2cbe5SCathy Xu #define PINMUX_GPIO89__FUNC_DSI1_TE (MTK_PIN_NO(89) | 2) 510*f5d2cbe5SCathy Xu #define PINMUX_GPIO89__FUNC_DBG_MON_B30 (MTK_PIN_NO(89) | 7) 511*f5d2cbe5SCathy Xu 512*f5d2cbe5SCathy Xu #define PINMUX_GPIO90__FUNC_GPIO90 (MTK_PIN_NO(90) | 0) 513*f5d2cbe5SCathy Xu #define PINMUX_GPIO90__FUNC_LCM_RST (MTK_PIN_NO(90) | 1) 514*f5d2cbe5SCathy Xu #define PINMUX_GPIO90__FUNC_LCM1_RST (MTK_PIN_NO(90) | 2) 515*f5d2cbe5SCathy Xu #define PINMUX_GPIO90__FUNC_DBG_MON_B31 (MTK_PIN_NO(90) | 7) 516*f5d2cbe5SCathy Xu 517*f5d2cbe5SCathy Xu #define PINMUX_GPIO91__FUNC_GPIO91 (MTK_PIN_NO(91) | 0) 518*f5d2cbe5SCathy Xu #define PINMUX_GPIO91__FUNC_CMFLASH2 (MTK_PIN_NO(91) | 1) 519*f5d2cbe5SCathy Xu #define PINMUX_GPIO91__FUNC_SF_D0 (MTK_PIN_NO(91) | 2) 520*f5d2cbe5SCathy Xu #define PINMUX_GPIO91__FUNC_SRCLKENAI1 (MTK_PIN_NO(91) | 3) 521*f5d2cbe5SCathy Xu #define PINMUX_GPIO91__FUNC_KPCOL2 (MTK_PIN_NO(91) | 5) 522*f5d2cbe5SCathy Xu #define PINMUX_GPIO91__FUNC_TP_GPIO11_AO (MTK_PIN_NO(91) | 6) 523*f5d2cbe5SCathy Xu 524*f5d2cbe5SCathy Xu #define PINMUX_GPIO92__FUNC_GPIO92 (MTK_PIN_NO(92) | 0) 525*f5d2cbe5SCathy Xu #define PINMUX_GPIO92__FUNC_CMFLASH3 (MTK_PIN_NO(92) | 1) 526*f5d2cbe5SCathy Xu #define PINMUX_GPIO92__FUNC_SF_D1 (MTK_PIN_NO(92) | 2) 527*f5d2cbe5SCathy Xu #define PINMUX_GPIO92__FUNC_DISP_PWM1 (MTK_PIN_NO(92) | 4) 528*f5d2cbe5SCathy Xu #define PINMUX_GPIO92__FUNC_TP_GPIO12_AO (MTK_PIN_NO(92) | 6) 529*f5d2cbe5SCathy Xu 530*f5d2cbe5SCathy Xu #define PINMUX_GPIO93__FUNC_GPIO93 (MTK_PIN_NO(93) | 0) 531*f5d2cbe5SCathy Xu #define PINMUX_GPIO93__FUNC_CMFLASH1 (MTK_PIN_NO(93) | 1) 532*f5d2cbe5SCathy Xu #define PINMUX_GPIO93__FUNC_SF_D2 (MTK_PIN_NO(93) | 2) 533*f5d2cbe5SCathy Xu #define PINMUX_GPIO93__FUNC_SRCLKENAI0 (MTK_PIN_NO(93) | 3) 534*f5d2cbe5SCathy Xu #define PINMUX_GPIO93__FUNC_KPROW2 (MTK_PIN_NO(93) | 5) 535*f5d2cbe5SCathy Xu #define PINMUX_GPIO93__FUNC_TP_GPIO13_AO (MTK_PIN_NO(93) | 6) 536*f5d2cbe5SCathy Xu 537*f5d2cbe5SCathy Xu #define PINMUX_GPIO94__FUNC_GPIO94 (MTK_PIN_NO(94) | 0) 538*f5d2cbe5SCathy Xu #define PINMUX_GPIO94__FUNC_I2S_MCK1 (MTK_PIN_NO(94) | 1) 539*f5d2cbe5SCathy Xu #define PINMUX_GPIO94__FUNC_SF_D3 (MTK_PIN_NO(94) | 2) 540*f5d2cbe5SCathy Xu #define PINMUX_GPIO94__FUNC_MD32_0_GPIO0 (MTK_PIN_NO(94) | 4) 541*f5d2cbe5SCathy Xu #define PINMUX_GPIO94__FUNC_CLKM0_A (MTK_PIN_NO(94) | 5) 542*f5d2cbe5SCathy Xu #define PINMUX_GPIO94__FUNC_TP_GPIO14_AO (MTK_PIN_NO(94) | 6) 543*f5d2cbe5SCathy Xu #define PINMUX_GPIO94__FUNC_DBG_MON_B18 (MTK_PIN_NO(94) | 7) 544*f5d2cbe5SCathy Xu 545*f5d2cbe5SCathy Xu #define PINMUX_GPIO95__FUNC_GPIO95 (MTK_PIN_NO(95) | 0) 546*f5d2cbe5SCathy Xu #define PINMUX_GPIO95__FUNC_I2SIN1_BCK (MTK_PIN_NO(95) | 1) 547*f5d2cbe5SCathy Xu #define PINMUX_GPIO95__FUNC_I2SIN4_BCK (MTK_PIN_NO(95) | 2) 548*f5d2cbe5SCathy Xu #define PINMUX_GPIO95__FUNC_SPI6_A_CLK (MTK_PIN_NO(95) | 3) 549*f5d2cbe5SCathy Xu #define PINMUX_GPIO95__FUNC_MD32_1_GPIO0 (MTK_PIN_NO(95) | 4) 550*f5d2cbe5SCathy Xu #define PINMUX_GPIO95__FUNC_CLKM1_A (MTK_PIN_NO(95) | 5) 551*f5d2cbe5SCathy Xu #define PINMUX_GPIO95__FUNC_TP_GPIO15_AO (MTK_PIN_NO(95) | 6) 552*f5d2cbe5SCathy Xu #define PINMUX_GPIO95__FUNC_DBG_MON_B19 (MTK_PIN_NO(95) | 7) 553*f5d2cbe5SCathy Xu 554*f5d2cbe5SCathy Xu #define PINMUX_GPIO96__FUNC_GPIO96 (MTK_PIN_NO(96) | 0) 555*f5d2cbe5SCathy Xu #define PINMUX_GPIO96__FUNC_I2SIN1_LRCK (MTK_PIN_NO(96) | 1) 556*f5d2cbe5SCathy Xu #define PINMUX_GPIO96__FUNC_I2SIN4_LRCK (MTK_PIN_NO(96) | 2) 557*f5d2cbe5SCathy Xu #define PINMUX_GPIO96__FUNC_SPI6_A_CSB (MTK_PIN_NO(96) | 3) 558*f5d2cbe5SCathy Xu #define PINMUX_GPIO96__FUNC_MD32_2_GPIO0 (MTK_PIN_NO(96) | 4) 559*f5d2cbe5SCathy Xu #define PINMUX_GPIO96__FUNC_CLKM2_A (MTK_PIN_NO(96) | 5) 560*f5d2cbe5SCathy Xu #define PINMUX_GPIO96__FUNC_DBG_MON_B20 (MTK_PIN_NO(96) | 7) 561*f5d2cbe5SCathy Xu 562*f5d2cbe5SCathy Xu #define PINMUX_GPIO97__FUNC_GPIO97 (MTK_PIN_NO(97) | 0) 563*f5d2cbe5SCathy Xu #define PINMUX_GPIO97__FUNC_I2SIN1_DI_A (MTK_PIN_NO(97) | 1) 564*f5d2cbe5SCathy Xu #define PINMUX_GPIO97__FUNC_I2SIN4_DATA0 (MTK_PIN_NO(97) | 2) 565*f5d2cbe5SCathy Xu #define PINMUX_GPIO97__FUNC_SPI6_A_MO (MTK_PIN_NO(97) | 3) 566*f5d2cbe5SCathy Xu #define PINMUX_GPIO97__FUNC_MD32_3_GPIO0 (MTK_PIN_NO(97) | 4) 567*f5d2cbe5SCathy Xu #define PINMUX_GPIO97__FUNC_CLKM3_A (MTK_PIN_NO(97) | 5) 568*f5d2cbe5SCathy Xu #define PINMUX_GPIO97__FUNC_DBG_MON_B21 (MTK_PIN_NO(97) | 7) 569*f5d2cbe5SCathy Xu 570*f5d2cbe5SCathy Xu #define PINMUX_GPIO98__FUNC_GPIO98 (MTK_PIN_NO(98) | 0) 571*f5d2cbe5SCathy Xu #define PINMUX_GPIO98__FUNC_I2SOUT1_DO (MTK_PIN_NO(98) | 1) 572*f5d2cbe5SCathy Xu #define PINMUX_GPIO98__FUNC_I2SOUT4_DATA0 (MTK_PIN_NO(98) | 2) 573*f5d2cbe5SCathy Xu #define PINMUX_GPIO98__FUNC_SPI6_A_MI (MTK_PIN_NO(98) | 3) 574*f5d2cbe5SCathy Xu #define PINMUX_GPIO98__FUNC_DBG_MON_B22 (MTK_PIN_NO(98) | 7) 575*f5d2cbe5SCathy Xu 576*f5d2cbe5SCathy Xu #define PINMUX_GPIO99__FUNC_GPIO99 (MTK_PIN_NO(99) | 0) 577*f5d2cbe5SCathy Xu #define PINMUX_GPIO99__FUNC_SCL0 (MTK_PIN_NO(99) | 1) 578*f5d2cbe5SCathy Xu #define PINMUX_GPIO99__FUNC_LCM2_RST (MTK_PIN_NO(99) | 2) 579*f5d2cbe5SCathy Xu #define PINMUX_GPIO99__FUNC_AUD_DAC_26M_CLK (MTK_PIN_NO(99) | 3) 580*f5d2cbe5SCathy Xu #define PINMUX_GPIO99__FUNC_SPU0_SCL (MTK_PIN_NO(99) | 4) 581*f5d2cbe5SCathy Xu #define PINMUX_GPIO99__FUNC_DBG_MON_B24 (MTK_PIN_NO(99) | 7) 582*f5d2cbe5SCathy Xu 583*f5d2cbe5SCathy Xu #define PINMUX_GPIO100__FUNC_GPIO100 (MTK_PIN_NO(100) | 0) 584*f5d2cbe5SCathy Xu #define PINMUX_GPIO100__FUNC_SDA0 (MTK_PIN_NO(100) | 1) 585*f5d2cbe5SCathy Xu #define PINMUX_GPIO100__FUNC_DSI2_TE (MTK_PIN_NO(100) | 2) 586*f5d2cbe5SCathy Xu #define PINMUX_GPIO100__FUNC_SPU0_SDA (MTK_PIN_NO(100) | 4) 587*f5d2cbe5SCathy Xu #define PINMUX_GPIO100__FUNC_DBG_MON_B25 (MTK_PIN_NO(100) | 7) 588*f5d2cbe5SCathy Xu 589*f5d2cbe5SCathy Xu #define PINMUX_GPIO101__FUNC_GPIO101 (MTK_PIN_NO(101) | 0) 590*f5d2cbe5SCathy Xu #define PINMUX_GPIO101__FUNC_SCL10 (MTK_PIN_NO(101) | 1) 591*f5d2cbe5SCathy Xu #define PINMUX_GPIO101__FUNC_SF_CS (MTK_PIN_NO(101) | 2) 592*f5d2cbe5SCathy Xu #define PINMUX_GPIO101__FUNC_SCP_DMIC1_CLK (MTK_PIN_NO(101) | 3) 593*f5d2cbe5SCathy Xu #define PINMUX_GPIO101__FUNC_I2SIN5_DATA2 (MTK_PIN_NO(101) | 4) 594*f5d2cbe5SCathy Xu #define PINMUX_GPIO101__FUNC_SCP_SCL_OIS (MTK_PIN_NO(101) | 5) 595*f5d2cbe5SCathy Xu #define PINMUX_GPIO101__FUNC_TP_GPIO10_AO (MTK_PIN_NO(101) | 6) 596*f5d2cbe5SCathy Xu #define PINMUX_GPIO101__FUNC_DBG_MON_B28 (MTK_PIN_NO(101) | 7) 597*f5d2cbe5SCathy Xu 598*f5d2cbe5SCathy Xu #define PINMUX_GPIO102__FUNC_GPIO102 (MTK_PIN_NO(102) | 0) 599*f5d2cbe5SCathy Xu #define PINMUX_GPIO102__FUNC_SDA10 (MTK_PIN_NO(102) | 1) 600*f5d2cbe5SCathy Xu #define PINMUX_GPIO102__FUNC_SF_CK (MTK_PIN_NO(102) | 2) 601*f5d2cbe5SCathy Xu #define PINMUX_GPIO102__FUNC_SCP_DMIC1_DAT (MTK_PIN_NO(102) | 3) 602*f5d2cbe5SCathy Xu #define PINMUX_GPIO102__FUNC_I2SIN5_DATA3 (MTK_PIN_NO(102) | 4) 603*f5d2cbe5SCathy Xu #define PINMUX_GPIO102__FUNC_SCP_SDA_OIS (MTK_PIN_NO(102) | 5) 604*f5d2cbe5SCathy Xu #define PINMUX_GPIO102__FUNC_TP_GPIO11_AO (MTK_PIN_NO(102) | 6) 605*f5d2cbe5SCathy Xu #define PINMUX_GPIO102__FUNC_DBG_MON_B29 (MTK_PIN_NO(102) | 7) 606*f5d2cbe5SCathy Xu 607*f5d2cbe5SCathy Xu #define PINMUX_GPIO103__FUNC_GPIO103 (MTK_PIN_NO(103) | 0) 608*f5d2cbe5SCathy Xu #define PINMUX_GPIO103__FUNC_DISP_PWM (MTK_PIN_NO(103) | 1) 609*f5d2cbe5SCathy Xu #define PINMUX_GPIO103__FUNC_DSI1_TE (MTK_PIN_NO(103) | 2) 610*f5d2cbe5SCathy Xu #define PINMUX_GPIO103__FUNC_I2S_MCK0 (MTK_PIN_NO(103) | 5) 611*f5d2cbe5SCathy Xu #define PINMUX_GPIO103__FUNC_DBG_MON_B23 (MTK_PIN_NO(103) | 7) 612*f5d2cbe5SCathy Xu 613*f5d2cbe5SCathy Xu #define PINMUX_GPIO104__FUNC_GPIO104 (MTK_PIN_NO(104) | 0) 614*f5d2cbe5SCathy Xu #define PINMUX_GPIO104__FUNC_SCL6 (MTK_PIN_NO(104) | 1) 615*f5d2cbe5SCathy Xu #define PINMUX_GPIO104__FUNC_SPU1_SCL (MTK_PIN_NO(104) | 2) 616*f5d2cbe5SCathy Xu #define PINMUX_GPIO104__FUNC_AUD_DAC_26M_CLK (MTK_PIN_NO(104) | 3) 617*f5d2cbe5SCathy Xu #define PINMUX_GPIO104__FUNC_USB_DRVVBUS_2P (MTK_PIN_NO(104) | 4) 618*f5d2cbe5SCathy Xu #define PINMUX_GPIO104__FUNC_I2S_MCK1 (MTK_PIN_NO(104) | 5) 619*f5d2cbe5SCathy Xu #define PINMUX_GPIO104__FUNC_IDDIG_2P (MTK_PIN_NO(104) | 6) 620*f5d2cbe5SCathy Xu #define PINMUX_GPIO104__FUNC_DBG_MON_B26 (MTK_PIN_NO(104) | 7) 621*f5d2cbe5SCathy Xu 622*f5d2cbe5SCathy Xu #define PINMUX_GPIO105__FUNC_GPIO105 (MTK_PIN_NO(105) | 0) 623*f5d2cbe5SCathy Xu #define PINMUX_GPIO105__FUNC_SDA6 (MTK_PIN_NO(105) | 1) 624*f5d2cbe5SCathy Xu #define PINMUX_GPIO105__FUNC_SPU1_SDA (MTK_PIN_NO(105) | 2) 625*f5d2cbe5SCathy Xu #define PINMUX_GPIO105__FUNC_DISP_PWM2 (MTK_PIN_NO(105) | 3) 626*f5d2cbe5SCathy Xu #define PINMUX_GPIO105__FUNC_VBUSVALID_2P (MTK_PIN_NO(105) | 4) 627*f5d2cbe5SCathy Xu #define PINMUX_GPIO105__FUNC_I2S_MCK2 (MTK_PIN_NO(105) | 5) 628*f5d2cbe5SCathy Xu #define PINMUX_GPIO105__FUNC_VBUSVALID_3P (MTK_PIN_NO(105) | 6) 629*f5d2cbe5SCathy Xu #define PINMUX_GPIO105__FUNC_DBG_MON_B27 (MTK_PIN_NO(105) | 7) 630*f5d2cbe5SCathy Xu 631*f5d2cbe5SCathy Xu #define PINMUX_GPIO106__FUNC_GPIO106 (MTK_PIN_NO(106) | 0) 632*f5d2cbe5SCathy Xu #define PINMUX_GPIO106__FUNC_SCP_SPI3_CK (MTK_PIN_NO(106) | 1) 633*f5d2cbe5SCathy Xu #define PINMUX_GPIO106__FUNC_SPI3_B_CLK (MTK_PIN_NO(106) | 2) 634*f5d2cbe5SCathy Xu #define PINMUX_GPIO106__FUNC_MD_UTXD0 (MTK_PIN_NO(106) | 3) 635*f5d2cbe5SCathy Xu #define PINMUX_GPIO106__FUNC_TP_UTXD1_VLP (MTK_PIN_NO(106) | 4) 636*f5d2cbe5SCathy Xu #define PINMUX_GPIO106__FUNC_CONN_BG_GPS_MCU_UART0_TXD (MTK_PIN_NO(106) | 5) 637*f5d2cbe5SCathy Xu #define PINMUX_GPIO106__FUNC_TP_GPIO6_AO (MTK_PIN_NO(106) | 6) 638*f5d2cbe5SCathy Xu #define PINMUX_GPIO106__FUNC_DBG_MON_B0 (MTK_PIN_NO(106) | 7) 639*f5d2cbe5SCathy Xu 640*f5d2cbe5SCathy Xu #define PINMUX_GPIO107__FUNC_GPIO107 (MTK_PIN_NO(107) | 0) 641*f5d2cbe5SCathy Xu #define PINMUX_GPIO107__FUNC_SCP_SPI3_CS (MTK_PIN_NO(107) | 1) 642*f5d2cbe5SCathy Xu #define PINMUX_GPIO107__FUNC_SPI3_B_CSB (MTK_PIN_NO(107) | 2) 643*f5d2cbe5SCathy Xu #define PINMUX_GPIO107__FUNC_MD_URXD0 (MTK_PIN_NO(107) | 3) 644*f5d2cbe5SCathy Xu #define PINMUX_GPIO107__FUNC_TP_URXD1_VLP (MTK_PIN_NO(107) | 4) 645*f5d2cbe5SCathy Xu #define PINMUX_GPIO107__FUNC_CONN_BG_GPS_MCU_UART0_RXD (MTK_PIN_NO(107) | 5) 646*f5d2cbe5SCathy Xu #define PINMUX_GPIO107__FUNC_TP_GPIO7_AO (MTK_PIN_NO(107) | 6) 647*f5d2cbe5SCathy Xu #define PINMUX_GPIO107__FUNC_DBG_MON_B1 (MTK_PIN_NO(107) | 7) 648*f5d2cbe5SCathy Xu 649*f5d2cbe5SCathy Xu #define PINMUX_GPIO108__FUNC_GPIO108 (MTK_PIN_NO(108) | 0) 650*f5d2cbe5SCathy Xu #define PINMUX_GPIO108__FUNC_SCP_SPI3_MO (MTK_PIN_NO(108) | 1) 651*f5d2cbe5SCathy Xu #define PINMUX_GPIO108__FUNC_SPI3_B_MO (MTK_PIN_NO(108) | 2) 652*f5d2cbe5SCathy Xu #define PINMUX_GPIO108__FUNC_MD_UTXD1 (MTK_PIN_NO(108) | 3) 653*f5d2cbe5SCathy Xu #define PINMUX_GPIO108__FUNC_MD32PCM_UTXD_AO_VLP (MTK_PIN_NO(108) | 4) 654*f5d2cbe5SCathy Xu #define PINMUX_GPIO108__FUNC_CONN_BG_GPS_MCU_UART1_TXD (MTK_PIN_NO(108) | 5) 655*f5d2cbe5SCathy Xu #define PINMUX_GPIO108__FUNC_TP_GPIO8_AO (MTK_PIN_NO(108) | 6) 656*f5d2cbe5SCathy Xu #define PINMUX_GPIO108__FUNC_DBG_MON_B2 (MTK_PIN_NO(108) | 7) 657*f5d2cbe5SCathy Xu 658*f5d2cbe5SCathy Xu #define PINMUX_GPIO109__FUNC_GPIO109 (MTK_PIN_NO(109) | 0) 659*f5d2cbe5SCathy Xu #define PINMUX_GPIO109__FUNC_SCP_SPI3_MI (MTK_PIN_NO(109) | 1) 660*f5d2cbe5SCathy Xu #define PINMUX_GPIO109__FUNC_SPI3_B_MI (MTK_PIN_NO(109) | 2) 661*f5d2cbe5SCathy Xu #define PINMUX_GPIO109__FUNC_MD_URXD1 (MTK_PIN_NO(109) | 3) 662*f5d2cbe5SCathy Xu #define PINMUX_GPIO109__FUNC_MD32PCM_URXD_AO_VLP (MTK_PIN_NO(109) | 4) 663*f5d2cbe5SCathy Xu #define PINMUX_GPIO109__FUNC_CONN_BG_GPS_MCU_UART1_RXD (MTK_PIN_NO(109) | 5) 664*f5d2cbe5SCathy Xu #define PINMUX_GPIO109__FUNC_TP_GPIO9_AO (MTK_PIN_NO(109) | 6) 665*f5d2cbe5SCathy Xu #define PINMUX_GPIO109__FUNC_DBG_MON_B3 (MTK_PIN_NO(109) | 7) 666*f5d2cbe5SCathy Xu 667*f5d2cbe5SCathy Xu #define PINMUX_GPIO110__FUNC_GPIO110 (MTK_PIN_NO(110) | 0) 668*f5d2cbe5SCathy Xu #define PINMUX_GPIO110__FUNC_SPI1_CLK (MTK_PIN_NO(110) | 1) 669*f5d2cbe5SCathy Xu #define PINMUX_GPIO110__FUNC_PWM_0 (MTK_PIN_NO(110) | 2) 670*f5d2cbe5SCathy Xu #define PINMUX_GPIO110__FUNC_MD_UCTS0 (MTK_PIN_NO(110) | 3) 671*f5d2cbe5SCathy Xu #define PINMUX_GPIO110__FUNC_TP_UCTS1_VLP (MTK_PIN_NO(110) | 4) 672*f5d2cbe5SCathy Xu #define PINMUX_GPIO110__FUNC_SPU0_GPIO_O (MTK_PIN_NO(110) | 6) 673*f5d2cbe5SCathy Xu #define PINMUX_GPIO110__FUNC_DBG_MON_B4 (MTK_PIN_NO(110) | 7) 674*f5d2cbe5SCathy Xu 675*f5d2cbe5SCathy Xu #define PINMUX_GPIO111__FUNC_GPIO111 (MTK_PIN_NO(111) | 0) 676*f5d2cbe5SCathy Xu #define PINMUX_GPIO111__FUNC_SPI1_CSB (MTK_PIN_NO(111) | 1) 677*f5d2cbe5SCathy Xu #define PINMUX_GPIO111__FUNC_PWM_1 (MTK_PIN_NO(111) | 2) 678*f5d2cbe5SCathy Xu #define PINMUX_GPIO111__FUNC_MD_URTS0 (MTK_PIN_NO(111) | 3) 679*f5d2cbe5SCathy Xu #define PINMUX_GPIO111__FUNC_TP_URTS1_VLP (MTK_PIN_NO(111) | 4) 680*f5d2cbe5SCathy Xu #define PINMUX_GPIO111__FUNC_SPU0_GPIO_I (MTK_PIN_NO(111) | 6) 681*f5d2cbe5SCathy Xu #define PINMUX_GPIO111__FUNC_DBG_MON_B5 (MTK_PIN_NO(111) | 7) 682*f5d2cbe5SCathy Xu 683*f5d2cbe5SCathy Xu #define PINMUX_GPIO112__FUNC_GPIO112 (MTK_PIN_NO(112) | 0) 684*f5d2cbe5SCathy Xu #define PINMUX_GPIO112__FUNC_SPI1_MO (MTK_PIN_NO(112) | 1) 685*f5d2cbe5SCathy Xu #define PINMUX_GPIO112__FUNC_PWM_2 (MTK_PIN_NO(112) | 2) 686*f5d2cbe5SCathy Xu #define PINMUX_GPIO112__FUNC_MD_UCTS1 (MTK_PIN_NO(112) | 3) 687*f5d2cbe5SCathy Xu #define PINMUX_GPIO112__FUNC_SPU1_GPIO_O (MTK_PIN_NO(112) | 6) 688*f5d2cbe5SCathy Xu #define PINMUX_GPIO112__FUNC_DBG_MON_B6 (MTK_PIN_NO(112) | 7) 689*f5d2cbe5SCathy Xu 690*f5d2cbe5SCathy Xu #define PINMUX_GPIO113__FUNC_GPIO113 (MTK_PIN_NO(113) | 0) 691*f5d2cbe5SCathy Xu #define PINMUX_GPIO113__FUNC_SPI1_MI (MTK_PIN_NO(113) | 1) 692*f5d2cbe5SCathy Xu #define PINMUX_GPIO113__FUNC_PWM_3 (MTK_PIN_NO(113) | 2) 693*f5d2cbe5SCathy Xu #define PINMUX_GPIO113__FUNC_MD_URTS1 (MTK_PIN_NO(113) | 3) 694*f5d2cbe5SCathy Xu #define PINMUX_GPIO113__FUNC_SPU1_GPIO_I (MTK_PIN_NO(113) | 6) 695*f5d2cbe5SCathy Xu #define PINMUX_GPIO113__FUNC_DBG_MON_B7 (MTK_PIN_NO(113) | 7) 696*f5d2cbe5SCathy Xu 697*f5d2cbe5SCathy Xu #define PINMUX_GPIO114__FUNC_GPIO114 (MTK_PIN_NO(114) | 0) 698*f5d2cbe5SCathy Xu #define PINMUX_GPIO114__FUNC_SPI0_SPU_CLK (MTK_PIN_NO(114) | 1) 699*f5d2cbe5SCathy Xu #define PINMUX_GPIO114__FUNC_SPI4_A_CLK (MTK_PIN_NO(114) | 2) 700*f5d2cbe5SCathy Xu #define PINMUX_GPIO114__FUNC_CONN_BG_GPS_MCU_DBG_UART_TXD (MTK_PIN_NO(114) | 5) 701*f5d2cbe5SCathy Xu #define PINMUX_GPIO114__FUNC_DBG_MON_B8 (MTK_PIN_NO(114) | 7) 702*f5d2cbe5SCathy Xu 703*f5d2cbe5SCathy Xu #define PINMUX_GPIO115__FUNC_GPIO115 (MTK_PIN_NO(115) | 0) 704*f5d2cbe5SCathy Xu #define PINMUX_GPIO115__FUNC_SPI0_SPU_CSB (MTK_PIN_NO(115) | 1) 705*f5d2cbe5SCathy Xu #define PINMUX_GPIO115__FUNC_SPI4_A_CSB (MTK_PIN_NO(115) | 2) 706*f5d2cbe5SCathy Xu #define PINMUX_GPIO115__FUNC_DBG_MON_B9 (MTK_PIN_NO(115) | 7) 707*f5d2cbe5SCathy Xu 708*f5d2cbe5SCathy Xu #define PINMUX_GPIO116__FUNC_GPIO116 (MTK_PIN_NO(116) | 0) 709*f5d2cbe5SCathy Xu #define PINMUX_GPIO116__FUNC_SPI0_SPU_MO (MTK_PIN_NO(116) | 1) 710*f5d2cbe5SCathy Xu #define PINMUX_GPIO116__FUNC_SPI4_A_MO (MTK_PIN_NO(116) | 2) 711*f5d2cbe5SCathy Xu #define PINMUX_GPIO116__FUNC_LCM1_RST (MTK_PIN_NO(116) | 3) 712*f5d2cbe5SCathy Xu #define PINMUX_GPIO116__FUNC_DBG_MON_B10 (MTK_PIN_NO(116) | 7) 713*f5d2cbe5SCathy Xu 714*f5d2cbe5SCathy Xu #define PINMUX_GPIO117__FUNC_GPIO117 (MTK_PIN_NO(117) | 0) 715*f5d2cbe5SCathy Xu #define PINMUX_GPIO117__FUNC_SPI0_SPU_MI (MTK_PIN_NO(117) | 1) 716*f5d2cbe5SCathy Xu #define PINMUX_GPIO117__FUNC_SPI4_A_MI (MTK_PIN_NO(117) | 2) 717*f5d2cbe5SCathy Xu #define PINMUX_GPIO117__FUNC_DSI1_TE (MTK_PIN_NO(117) | 3) 718*f5d2cbe5SCathy Xu #define PINMUX_GPIO117__FUNC_DBG_MON_B11 (MTK_PIN_NO(117) | 7) 719*f5d2cbe5SCathy Xu 720*f5d2cbe5SCathy Xu #define PINMUX_GPIO118__FUNC_GPIO118 (MTK_PIN_NO(118) | 0) 721*f5d2cbe5SCathy Xu #define PINMUX_GPIO118__FUNC_SPI5_CLK (MTK_PIN_NO(118) | 1) 722*f5d2cbe5SCathy Xu #define PINMUX_GPIO118__FUNC_USB_DRVVBUS (MTK_PIN_NO(118) | 2) 723*f5d2cbe5SCathy Xu #define PINMUX_GPIO118__FUNC_DP_TX_HPD (MTK_PIN_NO(118) | 3) 724*f5d2cbe5SCathy Xu #define PINMUX_GPIO118__FUNC_AD_ILDO_DTEST0 (MTK_PIN_NO(118) | 4) 725*f5d2cbe5SCathy Xu 726*f5d2cbe5SCathy Xu #define PINMUX_GPIO119__FUNC_GPIO119 (MTK_PIN_NO(119) | 0) 727*f5d2cbe5SCathy Xu #define PINMUX_GPIO119__FUNC_SPI5_CSB (MTK_PIN_NO(119) | 1) 728*f5d2cbe5SCathy Xu #define PINMUX_GPIO119__FUNC_VBUSVALID (MTK_PIN_NO(119) | 2) 729*f5d2cbe5SCathy Xu #define PINMUX_GPIO119__FUNC_DP_OC_EN (MTK_PIN_NO(119) | 3) 730*f5d2cbe5SCathy Xu #define PINMUX_GPIO119__FUNC_AD_ILDO_DTEST1 (MTK_PIN_NO(119) | 4) 731*f5d2cbe5SCathy Xu 732*f5d2cbe5SCathy Xu #define PINMUX_GPIO120__FUNC_GPIO120 (MTK_PIN_NO(120) | 0) 733*f5d2cbe5SCathy Xu #define PINMUX_GPIO120__FUNC_SPI5_MO (MTK_PIN_NO(120) | 1) 734*f5d2cbe5SCathy Xu #define PINMUX_GPIO120__FUNC_LCM2_RST (MTK_PIN_NO(120) | 2) 735*f5d2cbe5SCathy Xu #define PINMUX_GPIO120__FUNC_DP_RAUX_SBU1 (MTK_PIN_NO(120) | 3) 736*f5d2cbe5SCathy Xu #define PINMUX_GPIO120__FUNC_AD_ILDO_DTEST2 (MTK_PIN_NO(120) | 4) 737*f5d2cbe5SCathy Xu #define PINMUX_GPIO120__FUNC_IDDIG_3P (MTK_PIN_NO(120) | 6) 738*f5d2cbe5SCathy Xu 739*f5d2cbe5SCathy Xu #define PINMUX_GPIO121__FUNC_GPIO121 (MTK_PIN_NO(121) | 0) 740*f5d2cbe5SCathy Xu #define PINMUX_GPIO121__FUNC_SPI5_MI (MTK_PIN_NO(121) | 1) 741*f5d2cbe5SCathy Xu #define PINMUX_GPIO121__FUNC_DSI2_TE (MTK_PIN_NO(121) | 2) 742*f5d2cbe5SCathy Xu #define PINMUX_GPIO121__FUNC_DP_RAUX_SBU2 (MTK_PIN_NO(121) | 3) 743*f5d2cbe5SCathy Xu #define PINMUX_GPIO121__FUNC_AD_ILDO_DTEST3 (MTK_PIN_NO(121) | 4) 744*f5d2cbe5SCathy Xu #define PINMUX_GPIO121__FUNC_USB_DRVVBUS_3P (MTK_PIN_NO(121) | 6) 745*f5d2cbe5SCathy Xu #define PINMUX_GPIO121__FUNC_DBG_MON_B17 (MTK_PIN_NO(121) | 7) 746*f5d2cbe5SCathy Xu 747*f5d2cbe5SCathy Xu #define PINMUX_GPIO122__FUNC_GPIO122 (MTK_PIN_NO(122) | 0) 748*f5d2cbe5SCathy Xu #define PINMUX_GPIO122__FUNC_AP_GOOD (MTK_PIN_NO(122) | 1) 749*f5d2cbe5SCathy Xu #define PINMUX_GPIO122__FUNC_CONN_TCXOENA_REQ (MTK_PIN_NO(122) | 2) 750*f5d2cbe5SCathy Xu 751*f5d2cbe5SCathy Xu #define PINMUX_GPIO123__FUNC_GPIO123 (MTK_PIN_NO(123) | 0) 752*f5d2cbe5SCathy Xu #define PINMUX_GPIO123__FUNC_SCL3 (MTK_PIN_NO(123) | 1) 753*f5d2cbe5SCathy Xu #define PINMUX_GPIO123__FUNC_I2SIN2_LRCK (MTK_PIN_NO(123) | 5) 754*f5d2cbe5SCathy Xu #define PINMUX_GPIO123__FUNC_TP_UTXD_MD_VCORE (MTK_PIN_NO(123) | 6) 755*f5d2cbe5SCathy Xu 756*f5d2cbe5SCathy Xu #define PINMUX_GPIO124__FUNC_GPIO124 (MTK_PIN_NO(124) | 0) 757*f5d2cbe5SCathy Xu #define PINMUX_GPIO124__FUNC_SDA3 (MTK_PIN_NO(124) | 1) 758*f5d2cbe5SCathy Xu #define PINMUX_GPIO124__FUNC_TP_URXD_MD_VCORE (MTK_PIN_NO(124) | 6) 759*f5d2cbe5SCathy Xu 760*f5d2cbe5SCathy Xu #define PINMUX_GPIO125__FUNC_GPIO125 (MTK_PIN_NO(125) | 0) 761*f5d2cbe5SCathy Xu #define PINMUX_GPIO125__FUNC_MSDC1_CLK (MTK_PIN_NO(125) | 1) 762*f5d2cbe5SCathy Xu #define PINMUX_GPIO125__FUNC_MD1_SIM2_SCLK (MTK_PIN_NO(125) | 2) 763*f5d2cbe5SCathy Xu #define PINMUX_GPIO125__FUNC_HFRP_JTAG0_TCK (MTK_PIN_NO(125) | 3) 764*f5d2cbe5SCathy Xu #define PINMUX_GPIO125__FUNC_UDI_TCK (MTK_PIN_NO(125) | 4) 765*f5d2cbe5SCathy Xu #define PINMUX_GPIO125__FUNC_CONN_BGF_DSP_L1_JCK (MTK_PIN_NO(125) | 5) 766*f5d2cbe5SCathy Xu #define PINMUX_GPIO125__FUNC_SCP_JTAG_LITTLE_TCK_VLP (MTK_PIN_NO(125) | 6) 767*f5d2cbe5SCathy Xu #define PINMUX_GPIO125__FUNC_JTCK2_SEL1 (MTK_PIN_NO(125) | 7) 768*f5d2cbe5SCathy Xu 769*f5d2cbe5SCathy Xu #define PINMUX_GPIO126__FUNC_GPIO126 (MTK_PIN_NO(126) | 0) 770*f5d2cbe5SCathy Xu #define PINMUX_GPIO126__FUNC_MSDC1_CMD (MTK_PIN_NO(126) | 1) 771*f5d2cbe5SCathy Xu #define PINMUX_GPIO126__FUNC_HFRP_JTAG0_TMS (MTK_PIN_NO(126) | 3) 772*f5d2cbe5SCathy Xu #define PINMUX_GPIO126__FUNC_UDI_TMS (MTK_PIN_NO(126) | 4) 773*f5d2cbe5SCathy Xu #define PINMUX_GPIO126__FUNC_CONN_BGF_DSP_L1_JMS (MTK_PIN_NO(126) | 5) 774*f5d2cbe5SCathy Xu #define PINMUX_GPIO126__FUNC_SCP_JTAG_LITTLE_TMS_VLP (MTK_PIN_NO(126) | 6) 775*f5d2cbe5SCathy Xu #define PINMUX_GPIO126__FUNC_JTMS2_SEL1 (MTK_PIN_NO(126) | 7) 776*f5d2cbe5SCathy Xu 777*f5d2cbe5SCathy Xu #define PINMUX_GPIO127__FUNC_GPIO127 (MTK_PIN_NO(127) | 0) 778*f5d2cbe5SCathy Xu #define PINMUX_GPIO127__FUNC_MSDC1_DAT0 (MTK_PIN_NO(127) | 1) 779*f5d2cbe5SCathy Xu #define PINMUX_GPIO127__FUNC_MD1_SIM2_SRST (MTK_PIN_NO(127) | 2) 780*f5d2cbe5SCathy Xu #define PINMUX_GPIO127__FUNC_HFRP_JTAG0_TDI (MTK_PIN_NO(127) | 3) 781*f5d2cbe5SCathy Xu #define PINMUX_GPIO127__FUNC_UDI_TDI_0 (MTK_PIN_NO(127) | 4) 782*f5d2cbe5SCathy Xu #define PINMUX_GPIO127__FUNC_CONN_BGF_DSP_L1_JDI (MTK_PIN_NO(127) | 5) 783*f5d2cbe5SCathy Xu #define PINMUX_GPIO127__FUNC_SCP_JTAG_LITTLE_TDI_VLP (MTK_PIN_NO(127) | 6) 784*f5d2cbe5SCathy Xu #define PINMUX_GPIO127__FUNC_JTDI2_SEL1 (MTK_PIN_NO(127) | 7) 785*f5d2cbe5SCathy Xu 786*f5d2cbe5SCathy Xu #define PINMUX_GPIO128__FUNC_GPIO128 (MTK_PIN_NO(128) | 0) 787*f5d2cbe5SCathy Xu #define PINMUX_GPIO128__FUNC_MSDC1_DAT1 (MTK_PIN_NO(128) | 1) 788*f5d2cbe5SCathy Xu #define PINMUX_GPIO128__FUNC_MD1_SIM2_SIO (MTK_PIN_NO(128) | 2) 789*f5d2cbe5SCathy Xu #define PINMUX_GPIO128__FUNC_HFRP_JTAG0_TDO (MTK_PIN_NO(128) | 3) 790*f5d2cbe5SCathy Xu #define PINMUX_GPIO128__FUNC_UDI_TDO_0 (MTK_PIN_NO(128) | 4) 791*f5d2cbe5SCathy Xu #define PINMUX_GPIO128__FUNC_CONN_BGF_DSP_L1_JDO (MTK_PIN_NO(128) | 5) 792*f5d2cbe5SCathy Xu #define PINMUX_GPIO128__FUNC_SCP_JTAG_LITTLE_TDO_VLP (MTK_PIN_NO(128) | 6) 793*f5d2cbe5SCathy Xu #define PINMUX_GPIO128__FUNC_JTDO2_SEL1 (MTK_PIN_NO(128) | 7) 794*f5d2cbe5SCathy Xu 795*f5d2cbe5SCathy Xu #define PINMUX_GPIO129__FUNC_GPIO129 (MTK_PIN_NO(129) | 0) 796*f5d2cbe5SCathy Xu #define PINMUX_GPIO129__FUNC_MSDC1_DAT2 (MTK_PIN_NO(129) | 1) 797*f5d2cbe5SCathy Xu #define PINMUX_GPIO129__FUNC_DSI2_HSYNC (MTK_PIN_NO(129) | 2) 798*f5d2cbe5SCathy Xu #define PINMUX_GPIO129__FUNC_HFRP_JTAG0_TRSTN (MTK_PIN_NO(129) | 3) 799*f5d2cbe5SCathy Xu #define PINMUX_GPIO129__FUNC_UDI_NTRST (MTK_PIN_NO(129) | 4) 800*f5d2cbe5SCathy Xu #define PINMUX_GPIO129__FUNC_SCP_JTAG_LITTLE_TRSTN_VLP (MTK_PIN_NO(129) | 6) 801*f5d2cbe5SCathy Xu #define PINMUX_GPIO129__FUNC_JTRSTN2_SEL1 (MTK_PIN_NO(129) | 7) 802*f5d2cbe5SCathy Xu 803*f5d2cbe5SCathy Xu #define PINMUX_GPIO130__FUNC_GPIO130 (MTK_PIN_NO(130) | 0) 804*f5d2cbe5SCathy Xu #define PINMUX_GPIO130__FUNC_MSDC1_DAT3 (MTK_PIN_NO(130) | 1) 805*f5d2cbe5SCathy Xu #define PINMUX_GPIO130__FUNC_DSI3_HSYNC (MTK_PIN_NO(130) | 2) 806*f5d2cbe5SCathy Xu #define PINMUX_GPIO130__FUNC_CONN_BGF_DSP_L1_JINTP (MTK_PIN_NO(130) | 5) 807*f5d2cbe5SCathy Xu 808*f5d2cbe5SCathy Xu #define PINMUX_GPIO131__FUNC_GPIO131 (MTK_PIN_NO(131) | 0) 809*f5d2cbe5SCathy Xu #define PINMUX_GPIO131__FUNC_MD1_SIM2_SCLK (MTK_PIN_NO(131) | 1) 810*f5d2cbe5SCathy Xu #define PINMUX_GPIO131__FUNC_MD1_SIM1_SCLK (MTK_PIN_NO(131) | 2) 811*f5d2cbe5SCathy Xu #define PINMUX_GPIO131__FUNC_MCUPM_JTAG_TDI (MTK_PIN_NO(131) | 3) 812*f5d2cbe5SCathy Xu #define PINMUX_GPIO131__FUNC_CLKM0_A (MTK_PIN_NO(131) | 4) 813*f5d2cbe5SCathy Xu #define PINMUX_GPIO131__FUNC_CONN_BGF_DSP_L5_JDI (MTK_PIN_NO(131) | 5) 814*f5d2cbe5SCathy Xu #define PINMUX_GPIO131__FUNC_TSFDC_SCK (MTK_PIN_NO(131) | 6) 815*f5d2cbe5SCathy Xu #define PINMUX_GPIO131__FUNC_SCP_JTAG0_TDI_VCORE (MTK_PIN_NO(131) | 7) 816*f5d2cbe5SCathy Xu 817*f5d2cbe5SCathy Xu #define PINMUX_GPIO132__FUNC_GPIO132 (MTK_PIN_NO(132) | 0) 818*f5d2cbe5SCathy Xu #define PINMUX_GPIO132__FUNC_MD1_SIM2_SRST (MTK_PIN_NO(132) | 1) 819*f5d2cbe5SCathy Xu #define PINMUX_GPIO132__FUNC_MD1_SIM1_SRST (MTK_PIN_NO(132) | 2) 820*f5d2cbe5SCathy Xu #define PINMUX_GPIO132__FUNC_MCUPM_JTAG_TMS (MTK_PIN_NO(132) | 3) 821*f5d2cbe5SCathy Xu #define PINMUX_GPIO132__FUNC_CLKM1_B (MTK_PIN_NO(132) | 4) 822*f5d2cbe5SCathy Xu #define PINMUX_GPIO132__FUNC_CONN_BGF_DSP_L5_JMS (MTK_PIN_NO(132) | 5) 823*f5d2cbe5SCathy Xu #define PINMUX_GPIO132__FUNC_TSFDC_SDI (MTK_PIN_NO(132) | 6) 824*f5d2cbe5SCathy Xu #define PINMUX_GPIO132__FUNC_SCP_JTAG0_TMS_VCORE (MTK_PIN_NO(132) | 7) 825*f5d2cbe5SCathy Xu 826*f5d2cbe5SCathy Xu #define PINMUX_GPIO133__FUNC_GPIO133 (MTK_PIN_NO(133) | 0) 827*f5d2cbe5SCathy Xu #define PINMUX_GPIO133__FUNC_MD1_SIM2_SIO (MTK_PIN_NO(133) | 1) 828*f5d2cbe5SCathy Xu #define PINMUX_GPIO133__FUNC_MD1_SIM1_SIO (MTK_PIN_NO(133) | 2) 829*f5d2cbe5SCathy Xu #define PINMUX_GPIO133__FUNC_MCUPM_JTAG_TDO (MTK_PIN_NO(133) | 3) 830*f5d2cbe5SCathy Xu #define PINMUX_GPIO133__FUNC_CONN_BGF_DSP_L5_JDO (MTK_PIN_NO(133) | 5) 831*f5d2cbe5SCathy Xu #define PINMUX_GPIO133__FUNC_TSFDC_SCF (MTK_PIN_NO(133) | 6) 832*f5d2cbe5SCathy Xu #define PINMUX_GPIO133__FUNC_SCP_JTAG0_TDO_VCORE (MTK_PIN_NO(133) | 7) 833*f5d2cbe5SCathy Xu 834*f5d2cbe5SCathy Xu #define PINMUX_GPIO134__FUNC_GPIO134 (MTK_PIN_NO(134) | 0) 835*f5d2cbe5SCathy Xu #define PINMUX_GPIO134__FUNC_MD1_SIM1_SCLK (MTK_PIN_NO(134) | 1) 836*f5d2cbe5SCathy Xu #define PINMUX_GPIO134__FUNC_MD1_SIM2_SCLK (MTK_PIN_NO(134) | 2) 837*f5d2cbe5SCathy Xu #define PINMUX_GPIO134__FUNC_TSFDC_26M (MTK_PIN_NO(134) | 6) 838*f5d2cbe5SCathy Xu 839*f5d2cbe5SCathy Xu #define PINMUX_GPIO135__FUNC_GPIO135 (MTK_PIN_NO(135) | 0) 840*f5d2cbe5SCathy Xu #define PINMUX_GPIO135__FUNC_MD1_SIM1_SRST (MTK_PIN_NO(135) | 1) 841*f5d2cbe5SCathy Xu #define PINMUX_GPIO135__FUNC_MD1_SIM2_SRST (MTK_PIN_NO(135) | 2) 842*f5d2cbe5SCathy Xu #define PINMUX_GPIO135__FUNC_MCUPM_JTAG_TCK (MTK_PIN_NO(135) | 3) 843*f5d2cbe5SCathy Xu #define PINMUX_GPIO135__FUNC_CONN_BGF_DSP_L5_JCK (MTK_PIN_NO(135) | 5) 844*f5d2cbe5SCathy Xu #define PINMUX_GPIO135__FUNC_TSFDC_SDO (MTK_PIN_NO(135) | 6) 845*f5d2cbe5SCathy Xu #define PINMUX_GPIO135__FUNC_SCP_JTAG0_TCK_VCORE (MTK_PIN_NO(135) | 7) 846*f5d2cbe5SCathy Xu 847*f5d2cbe5SCathy Xu #define PINMUX_GPIO136__FUNC_GPIO136 (MTK_PIN_NO(136) | 0) 848*f5d2cbe5SCathy Xu #define PINMUX_GPIO136__FUNC_MD1_SIM1_SIO (MTK_PIN_NO(136) | 1) 849*f5d2cbe5SCathy Xu #define PINMUX_GPIO136__FUNC_MD1_SIM2_SIO (MTK_PIN_NO(136) | 2) 850*f5d2cbe5SCathy Xu #define PINMUX_GPIO136__FUNC_MCUPM_JTAG_TRSTN (MTK_PIN_NO(136) | 3) 851*f5d2cbe5SCathy Xu #define PINMUX_GPIO136__FUNC_CONN_BGF_DSP_L5_JINTP (MTK_PIN_NO(136) | 5) 852*f5d2cbe5SCathy Xu #define PINMUX_GPIO136__FUNC_TSFDC_FOUT (MTK_PIN_NO(136) | 6) 853*f5d2cbe5SCathy Xu #define PINMUX_GPIO136__FUNC_SCP_JTAG0_TRSTN_VCORE (MTK_PIN_NO(136) | 7) 854*f5d2cbe5SCathy Xu 855*f5d2cbe5SCathy Xu #define PINMUX_GPIO137__FUNC_GPIO137 (MTK_PIN_NO(137) | 0) 856*f5d2cbe5SCathy Xu #define PINMUX_GPIO137__FUNC_MIPI0_D_SCLK (MTK_PIN_NO(137) | 1) 857*f5d2cbe5SCathy Xu #define PINMUX_GPIO137__FUNC_BPI_BUS16 (MTK_PIN_NO(137) | 2) 858*f5d2cbe5SCathy Xu #define PINMUX_GPIO137__FUNC_EXT_FRAME_SYNC (MTK_PIN_NO(137) | 4) 859*f5d2cbe5SCathy Xu #define PINMUX_GPIO137__FUNC_SPM_JTAG_TRSTN_VCORE (MTK_PIN_NO(137) | 6) 860*f5d2cbe5SCathy Xu #define PINMUX_GPIO137__FUNC_DBG_MON_A0 (MTK_PIN_NO(137) | 7) 861*f5d2cbe5SCathy Xu 862*f5d2cbe5SCathy Xu #define PINMUX_GPIO138__FUNC_GPIO138 (MTK_PIN_NO(138) | 0) 863*f5d2cbe5SCathy Xu #define PINMUX_GPIO138__FUNC_MIPI0_D_SDATA (MTK_PIN_NO(138) | 1) 864*f5d2cbe5SCathy Xu #define PINMUX_GPIO138__FUNC_BPI_BUS17 (MTK_PIN_NO(138) | 2) 865*f5d2cbe5SCathy Xu #define PINMUX_GPIO138__FUNC_PCM0_LRCK (MTK_PIN_NO(138) | 4) 866*f5d2cbe5SCathy Xu #define PINMUX_GPIO138__FUNC_SPM_JTAG_TCK_VCORE (MTK_PIN_NO(138) | 6) 867*f5d2cbe5SCathy Xu #define PINMUX_GPIO138__FUNC_DBG_MON_A1 (MTK_PIN_NO(138) | 7) 868*f5d2cbe5SCathy Xu 869*f5d2cbe5SCathy Xu #define PINMUX_GPIO139__FUNC_GPIO139 (MTK_PIN_NO(139) | 0) 870*f5d2cbe5SCathy Xu #define PINMUX_GPIO139__FUNC_MIPI1_D_SCLK (MTK_PIN_NO(139) | 1) 871*f5d2cbe5SCathy Xu #define PINMUX_GPIO139__FUNC_BPI_BUS18 (MTK_PIN_NO(139) | 2) 872*f5d2cbe5SCathy Xu #define PINMUX_GPIO139__FUNC_MD_GPS_BLANK (MTK_PIN_NO(139) | 4) 873*f5d2cbe5SCathy Xu #define PINMUX_GPIO139__FUNC_SPM_JTAG_TMS_VCORE (MTK_PIN_NO(139) | 6) 874*f5d2cbe5SCathy Xu #define PINMUX_GPIO139__FUNC_DBG_MON_A2 (MTK_PIN_NO(139) | 7) 875*f5d2cbe5SCathy Xu 876*f5d2cbe5SCathy Xu #define PINMUX_GPIO140__FUNC_GPIO140 (MTK_PIN_NO(140) | 0) 877*f5d2cbe5SCathy Xu #define PINMUX_GPIO140__FUNC_MIPI1_D_SDATA (MTK_PIN_NO(140) | 1) 878*f5d2cbe5SCathy Xu #define PINMUX_GPIO140__FUNC_BPI_BUS19 (MTK_PIN_NO(140) | 2) 879*f5d2cbe5SCathy Xu #define PINMUX_GPIO140__FUNC_MD_URXD1_CONN (MTK_PIN_NO(140) | 4) 880*f5d2cbe5SCathy Xu #define PINMUX_GPIO140__FUNC_SPM_JTAG_TDO_VCORE (MTK_PIN_NO(140) | 6) 881*f5d2cbe5SCathy Xu #define PINMUX_GPIO140__FUNC_DBG_MON_A3 (MTK_PIN_NO(140) | 7) 882*f5d2cbe5SCathy Xu 883*f5d2cbe5SCathy Xu #define PINMUX_GPIO141__FUNC_GPIO141 (MTK_PIN_NO(141) | 0) 884*f5d2cbe5SCathy Xu #define PINMUX_GPIO141__FUNC_MIPI2_D_SCLK (MTK_PIN_NO(141) | 1) 885*f5d2cbe5SCathy Xu #define PINMUX_GPIO141__FUNC_BPI_BUS20 (MTK_PIN_NO(141) | 2) 886*f5d2cbe5SCathy Xu #define PINMUX_GPIO141__FUNC_MD_UTXD1_CONN (MTK_PIN_NO(141) | 4) 887*f5d2cbe5SCathy Xu #define PINMUX_GPIO141__FUNC_SPM_JTAG_TDI_VCORE (MTK_PIN_NO(141) | 6) 888*f5d2cbe5SCathy Xu #define PINMUX_GPIO141__FUNC_DBG_MON_A4 (MTK_PIN_NO(141) | 7) 889*f5d2cbe5SCathy Xu 890*f5d2cbe5SCathy Xu #define PINMUX_GPIO142__FUNC_GPIO142 (MTK_PIN_NO(142) | 0) 891*f5d2cbe5SCathy Xu #define PINMUX_GPIO142__FUNC_MIPI2_D_SDATA (MTK_PIN_NO(142) | 1) 892*f5d2cbe5SCathy Xu #define PINMUX_GPIO142__FUNC_BPI_BUS21 (MTK_PIN_NO(142) | 2) 893*f5d2cbe5SCathy Xu #define PINMUX_GPIO142__FUNC_SSPM_JTAG_TRSTN_VCORE (MTK_PIN_NO(142) | 6) 894*f5d2cbe5SCathy Xu #define PINMUX_GPIO142__FUNC_DBG_MON_A5 (MTK_PIN_NO(142) | 7) 895*f5d2cbe5SCathy Xu 896*f5d2cbe5SCathy Xu #define PINMUX_GPIO143__FUNC_GPIO143 (MTK_PIN_NO(143) | 0) 897*f5d2cbe5SCathy Xu #define PINMUX_GPIO143__FUNC_MIPI3_D_SCLK (MTK_PIN_NO(143) | 1) 898*f5d2cbe5SCathy Xu #define PINMUX_GPIO143__FUNC_BPI_BUS22 (MTK_PIN_NO(143) | 2) 899*f5d2cbe5SCathy Xu #define PINMUX_GPIO143__FUNC_TP_UTXD_GNSS_VLP (MTK_PIN_NO(143) | 4) 900*f5d2cbe5SCathy Xu #define PINMUX_GPIO143__FUNC_MD_UTXD1_CONN (MTK_PIN_NO(143) | 5) 901*f5d2cbe5SCathy Xu #define PINMUX_GPIO143__FUNC_SSPM_JTAG_TCK_VCORE (MTK_PIN_NO(143) | 6) 902*f5d2cbe5SCathy Xu 903*f5d2cbe5SCathy Xu #define PINMUX_GPIO144__FUNC_GPIO144 (MTK_PIN_NO(144) | 0) 904*f5d2cbe5SCathy Xu #define PINMUX_GPIO144__FUNC_MIPI3_D_SDATA (MTK_PIN_NO(144) | 1) 905*f5d2cbe5SCathy Xu #define PINMUX_GPIO144__FUNC_BPI_BUS23 (MTK_PIN_NO(144) | 2) 906*f5d2cbe5SCathy Xu #define PINMUX_GPIO144__FUNC_TP_URXD_GNSS_VLP (MTK_PIN_NO(144) | 4) 907*f5d2cbe5SCathy Xu #define PINMUX_GPIO144__FUNC_MD_URXD1_CONN (MTK_PIN_NO(144) | 5) 908*f5d2cbe5SCathy Xu #define PINMUX_GPIO144__FUNC_SSPM_JTAG_TMS_VCORE (MTK_PIN_NO(144) | 6) 909*f5d2cbe5SCathy Xu 910*f5d2cbe5SCathy Xu #define PINMUX_GPIO145__FUNC_GPIO145 (MTK_PIN_NO(145) | 0) 911*f5d2cbe5SCathy Xu #define PINMUX_GPIO145__FUNC_BPI_BUS0 (MTK_PIN_NO(145) | 1) 912*f5d2cbe5SCathy Xu #define PINMUX_GPIO145__FUNC_PCIE_WAKEN_1P (MTK_PIN_NO(145) | 4) 913*f5d2cbe5SCathy Xu #define PINMUX_GPIO145__FUNC_SSPM_JTAG_TDO_VCORE (MTK_PIN_NO(145) | 6) 914*f5d2cbe5SCathy Xu #define PINMUX_GPIO145__FUNC_DBG_MON_A10 (MTK_PIN_NO(145) | 7) 915*f5d2cbe5SCathy Xu 916*f5d2cbe5SCathy Xu #define PINMUX_GPIO146__FUNC_GPIO146 (MTK_PIN_NO(146) | 0) 917*f5d2cbe5SCathy Xu #define PINMUX_GPIO146__FUNC_BPI_BUS1 (MTK_PIN_NO(146) | 1) 918*f5d2cbe5SCathy Xu #define PINMUX_GPIO146__FUNC_PCIE_PERSTN_1P (MTK_PIN_NO(146) | 4) 919*f5d2cbe5SCathy Xu #define PINMUX_GPIO146__FUNC_SSPM_JTAG_TDI_VCORE (MTK_PIN_NO(146) | 6) 920*f5d2cbe5SCathy Xu #define PINMUX_GPIO146__FUNC_DBG_MON_A11 (MTK_PIN_NO(146) | 7) 921*f5d2cbe5SCathy Xu 922*f5d2cbe5SCathy Xu #define PINMUX_GPIO147__FUNC_GPIO147 (MTK_PIN_NO(147) | 0) 923*f5d2cbe5SCathy Xu #define PINMUX_GPIO147__FUNC_BPI_BUS2 (MTK_PIN_NO(147) | 1) 924*f5d2cbe5SCathy Xu #define PINMUX_GPIO147__FUNC_AUD_DAC_26M_CLK (MTK_PIN_NO(147) | 2) 925*f5d2cbe5SCathy Xu #define PINMUX_GPIO147__FUNC_PCIE_CLKREQN_1P (MTK_PIN_NO(147) | 4) 926*f5d2cbe5SCathy Xu #define PINMUX_GPIO147__FUNC_SCP_JTAG_LITTLE_TRSTN_VCORE (MTK_PIN_NO(147) | 6) 927*f5d2cbe5SCathy Xu #define PINMUX_GPIO147__FUNC_DBG_MON_A12 (MTK_PIN_NO(147) | 7) 928*f5d2cbe5SCathy Xu 929*f5d2cbe5SCathy Xu #define PINMUX_GPIO148__FUNC_GPIO148 (MTK_PIN_NO(148) | 0) 930*f5d2cbe5SCathy Xu #define PINMUX_GPIO148__FUNC_BPI_BUS3 (MTK_PIN_NO(148) | 1) 931*f5d2cbe5SCathy Xu #define PINMUX_GPIO148__FUNC_AUD_DAC_26M_CLK (MTK_PIN_NO(148) | 2) 932*f5d2cbe5SCathy Xu #define PINMUX_GPIO148__FUNC_TP_UTXD_MD_VLP (MTK_PIN_NO(148) | 4) 933*f5d2cbe5SCathy Xu #define PINMUX_GPIO148__FUNC_TP_GPIO0_AO (MTK_PIN_NO(148) | 5) 934*f5d2cbe5SCathy Xu #define PINMUX_GPIO148__FUNC_SCP_JTAG_LITTLE_TCK_VCORE (MTK_PIN_NO(148) | 6) 935*f5d2cbe5SCathy Xu #define PINMUX_GPIO148__FUNC_DBG_MON_A13 (MTK_PIN_NO(148) | 7) 936*f5d2cbe5SCathy Xu 937*f5d2cbe5SCathy Xu #define PINMUX_GPIO149__FUNC_GPIO149 (MTK_PIN_NO(149) | 0) 938*f5d2cbe5SCathy Xu #define PINMUX_GPIO149__FUNC_BPI_BUS4 (MTK_PIN_NO(149) | 1) 939*f5d2cbe5SCathy Xu #define PINMUX_GPIO149__FUNC_EXT_FRAME_SYNC (MTK_PIN_NO(149) | 2) 940*f5d2cbe5SCathy Xu #define PINMUX_GPIO149__FUNC_TP_URXD_MD_VLP (MTK_PIN_NO(149) | 4) 941*f5d2cbe5SCathy Xu #define PINMUX_GPIO149__FUNC_TP_GPIO1_AO (MTK_PIN_NO(149) | 5) 942*f5d2cbe5SCathy Xu #define PINMUX_GPIO149__FUNC_SCP_JTAG_LITTLE_TMS_VCORE (MTK_PIN_NO(149) | 6) 943*f5d2cbe5SCathy Xu #define PINMUX_GPIO149__FUNC_DBG_MON_A14 (MTK_PIN_NO(149) | 7) 944*f5d2cbe5SCathy Xu 945*f5d2cbe5SCathy Xu #define PINMUX_GPIO150__FUNC_GPIO150 (MTK_PIN_NO(150) | 0) 946*f5d2cbe5SCathy Xu #define PINMUX_GPIO150__FUNC_BPI_BUS5 (MTK_PIN_NO(150) | 1) 947*f5d2cbe5SCathy Xu #define PINMUX_GPIO150__FUNC_GPS_PPS0 (MTK_PIN_NO(150) | 2) 948*f5d2cbe5SCathy Xu #define PINMUX_GPIO150__FUNC_TP_GPIO2_AO (MTK_PIN_NO(150) | 5) 949*f5d2cbe5SCathy Xu #define PINMUX_GPIO150__FUNC_SCP_JTAG_LITTLE_TDO_VCORE (MTK_PIN_NO(150) | 6) 950*f5d2cbe5SCathy Xu #define PINMUX_GPIO150__FUNC_DBG_MON_A15 (MTK_PIN_NO(150) | 7) 951*f5d2cbe5SCathy Xu 952*f5d2cbe5SCathy Xu #define PINMUX_GPIO151__FUNC_GPIO151 (MTK_PIN_NO(151) | 0) 953*f5d2cbe5SCathy Xu #define PINMUX_GPIO151__FUNC_BPI_BUS6 (MTK_PIN_NO(151) | 1) 954*f5d2cbe5SCathy Xu #define PINMUX_GPIO151__FUNC_GPS_PPS1 (MTK_PIN_NO(151) | 2) 955*f5d2cbe5SCathy Xu #define PINMUX_GPIO151__FUNC_TP_GPIO3_AO (MTK_PIN_NO(151) | 5) 956*f5d2cbe5SCathy Xu #define PINMUX_GPIO151__FUNC_SCP_JTAG_LITTLE_TDI_VCORE (MTK_PIN_NO(151) | 6) 957*f5d2cbe5SCathy Xu 958*f5d2cbe5SCathy Xu #define PINMUX_GPIO152__FUNC_GPIO152 (MTK_PIN_NO(152) | 0) 959*f5d2cbe5SCathy Xu #define PINMUX_GPIO152__FUNC_BPI_BUS7 (MTK_PIN_NO(152) | 1) 960*f5d2cbe5SCathy Xu #define PINMUX_GPIO152__FUNC_EDP_TX_HPD (MTK_PIN_NO(152) | 2) 961*f5d2cbe5SCathy Xu #define PINMUX_GPIO152__FUNC_AGPS_SYNC (MTK_PIN_NO(152) | 5) 962*f5d2cbe5SCathy Xu #define PINMUX_GPIO152__FUNC_SSPM_UTXD_AO_VCORE (MTK_PIN_NO(152) | 6) 963*f5d2cbe5SCathy Xu 964*f5d2cbe5SCathy Xu #define PINMUX_GPIO153__FUNC_GPIO153 (MTK_PIN_NO(153) | 0) 965*f5d2cbe5SCathy Xu #define PINMUX_GPIO153__FUNC_MD_UCNT_A_TGL (MTK_PIN_NO(153) | 1) 966*f5d2cbe5SCathy Xu #define PINMUX_GPIO153__FUNC_TP_URTS1_VCORE (MTK_PIN_NO(153) | 6) 967*f5d2cbe5SCathy Xu #define PINMUX_GPIO153__FUNC_DBG_MON_A8 (MTK_PIN_NO(153) | 7) 968*f5d2cbe5SCathy Xu 969*f5d2cbe5SCathy Xu #define PINMUX_GPIO154__FUNC_GPIO154 (MTK_PIN_NO(154) | 0) 970*f5d2cbe5SCathy Xu #define PINMUX_GPIO154__FUNC_DIGRF_IRQ (MTK_PIN_NO(154) | 1) 971*f5d2cbe5SCathy Xu #define PINMUX_GPIO154__FUNC_TP_UCTS1_VCORE (MTK_PIN_NO(154) | 6) 972*f5d2cbe5SCathy Xu #define PINMUX_GPIO154__FUNC_DBG_MON_A9 (MTK_PIN_NO(154) | 7) 973*f5d2cbe5SCathy Xu 974*f5d2cbe5SCathy Xu #define PINMUX_GPIO155__FUNC_GPIO155 (MTK_PIN_NO(155) | 0) 975*f5d2cbe5SCathy Xu #define PINMUX_GPIO155__FUNC_MIPI_M_SCLK (MTK_PIN_NO(155) | 1) 976*f5d2cbe5SCathy Xu #define PINMUX_GPIO155__FUNC_UCTS2 (MTK_PIN_NO(155) | 4) 977*f5d2cbe5SCathy Xu #define PINMUX_GPIO155__FUNC_TP_UTXD_CONSYS_VCORE (MTK_PIN_NO(155) | 6) 978*f5d2cbe5SCathy Xu #define PINMUX_GPIO155__FUNC_DBG_MON_A6 (MTK_PIN_NO(155) | 7) 979*f5d2cbe5SCathy Xu 980*f5d2cbe5SCathy Xu #define PINMUX_GPIO156__FUNC_GPIO156 (MTK_PIN_NO(156) | 0) 981*f5d2cbe5SCathy Xu #define PINMUX_GPIO156__FUNC_MIPI_M_SDATA (MTK_PIN_NO(156) | 1) 982*f5d2cbe5SCathy Xu #define PINMUX_GPIO156__FUNC_URTS2 (MTK_PIN_NO(156) | 4) 983*f5d2cbe5SCathy Xu #define PINMUX_GPIO156__FUNC_TP_URXD_CONSYS_VCORE (MTK_PIN_NO(156) | 6) 984*f5d2cbe5SCathy Xu #define PINMUX_GPIO156__FUNC_DBG_MON_A7 (MTK_PIN_NO(156) | 7) 985*f5d2cbe5SCathy Xu 986*f5d2cbe5SCathy Xu #define PINMUX_GPIO157__FUNC_GPIO157 (MTK_PIN_NO(157) | 0) 987*f5d2cbe5SCathy Xu #define PINMUX_GPIO157__FUNC_BPI_BUS8 (MTK_PIN_NO(157) | 1) 988*f5d2cbe5SCathy Xu #define PINMUX_GPIO157__FUNC_UTXD2 (MTK_PIN_NO(157) | 4) 989*f5d2cbe5SCathy Xu #define PINMUX_GPIO157__FUNC_CLKM0_A (MTK_PIN_NO(157) | 5) 990*f5d2cbe5SCathy Xu #define PINMUX_GPIO157__FUNC_SSPM_URXD_AO_VCORE (MTK_PIN_NO(157) | 6) 991*f5d2cbe5SCathy Xu #define PINMUX_GPIO157__FUNC_DBG_MON_A16 (MTK_PIN_NO(157) | 7) 992*f5d2cbe5SCathy Xu 993*f5d2cbe5SCathy Xu #define PINMUX_GPIO158__FUNC_GPIO158 (MTK_PIN_NO(158) | 0) 994*f5d2cbe5SCathy Xu #define PINMUX_GPIO158__FUNC_BPI_BUS9 (MTK_PIN_NO(158) | 1) 995*f5d2cbe5SCathy Xu #define PINMUX_GPIO158__FUNC_URXD2 (MTK_PIN_NO(158) | 4) 996*f5d2cbe5SCathy Xu #define PINMUX_GPIO158__FUNC_CLKM1_A (MTK_PIN_NO(158) | 5) 997*f5d2cbe5SCathy Xu #define PINMUX_GPIO158__FUNC_TP_UTXD1_VCORE (MTK_PIN_NO(158) | 6) 998*f5d2cbe5SCathy Xu 999*f5d2cbe5SCathy Xu #define PINMUX_GPIO159__FUNC_GPIO159 (MTK_PIN_NO(159) | 0) 1000*f5d2cbe5SCathy Xu #define PINMUX_GPIO159__FUNC_BPI_BUS10 (MTK_PIN_NO(159) | 1) 1001*f5d2cbe5SCathy Xu #define PINMUX_GPIO159__FUNC_MD_INT0 (MTK_PIN_NO(159) | 2) 1002*f5d2cbe5SCathy Xu #define PINMUX_GPIO159__FUNC_SRCLKENAI1 (MTK_PIN_NO(159) | 3) 1003*f5d2cbe5SCathy Xu #define PINMUX_GPIO159__FUNC_CLKM2_A (MTK_PIN_NO(159) | 5) 1004*f5d2cbe5SCathy Xu #define PINMUX_GPIO159__FUNC_TP_URXD1_VCORE (MTK_PIN_NO(159) | 6) 1005*f5d2cbe5SCathy Xu 1006*f5d2cbe5SCathy Xu #define PINMUX_GPIO160__FUNC_GPIO160 (MTK_PIN_NO(160) | 0) 1007*f5d2cbe5SCathy Xu #define PINMUX_GPIO160__FUNC_UTXD0 (MTK_PIN_NO(160) | 1) 1008*f5d2cbe5SCathy Xu #define PINMUX_GPIO160__FUNC_MD_UTXD1 (MTK_PIN_NO(160) | 2) 1009*f5d2cbe5SCathy Xu #define PINMUX_GPIO160__FUNC_MBISTREADEN_TRIGGER (MTK_PIN_NO(160) | 5) 1010*f5d2cbe5SCathy Xu #define PINMUX_GPIO160__FUNC_CONN_BG_GPS_MCU_DBG_UART_TXD (MTK_PIN_NO(160) | 6) 1011*f5d2cbe5SCathy Xu 1012*f5d2cbe5SCathy Xu #define PINMUX_GPIO161__FUNC_GPIO161 (MTK_PIN_NO(161) | 0) 1013*f5d2cbe5SCathy Xu #define PINMUX_GPIO161__FUNC_URXD0 (MTK_PIN_NO(161) | 1) 1014*f5d2cbe5SCathy Xu #define PINMUX_GPIO161__FUNC_MD_URXD1 (MTK_PIN_NO(161) | 2) 1015*f5d2cbe5SCathy Xu #define PINMUX_GPIO161__FUNC_MBISTWRITEEN_TRIGGER (MTK_PIN_NO(161) | 5) 1016*f5d2cbe5SCathy Xu 1017*f5d2cbe5SCathy Xu #define PINMUX_GPIO162__FUNC_GPIO162 (MTK_PIN_NO(162) | 0) 1018*f5d2cbe5SCathy Xu #define PINMUX_GPIO162__FUNC_UTXD1 (MTK_PIN_NO(162) | 1) 1019*f5d2cbe5SCathy Xu #define PINMUX_GPIO162__FUNC_MD_UTXD0 (MTK_PIN_NO(162) | 2) 1020*f5d2cbe5SCathy Xu #define PINMUX_GPIO162__FUNC_TP_UTXD1_VLP (MTK_PIN_NO(162) | 3) 1021*f5d2cbe5SCathy Xu #define PINMUX_GPIO162__FUNC_ADSP_UTXD0 (MTK_PIN_NO(162) | 4) 1022*f5d2cbe5SCathy Xu #define PINMUX_GPIO162__FUNC_SSPM_UTXD_AO_VLP (MTK_PIN_NO(162) | 5) 1023*f5d2cbe5SCathy Xu #define PINMUX_GPIO162__FUNC_HFRP_UTXD1 (MTK_PIN_NO(162) | 6) 1024*f5d2cbe5SCathy Xu 1025*f5d2cbe5SCathy Xu #define PINMUX_GPIO163__FUNC_GPIO163 (MTK_PIN_NO(163) | 0) 1026*f5d2cbe5SCathy Xu #define PINMUX_GPIO163__FUNC_URXD1 (MTK_PIN_NO(163) | 1) 1027*f5d2cbe5SCathy Xu #define PINMUX_GPIO163__FUNC_MD_URXD0 (MTK_PIN_NO(163) | 2) 1028*f5d2cbe5SCathy Xu #define PINMUX_GPIO163__FUNC_TP_URXD1_VLP (MTK_PIN_NO(163) | 3) 1029*f5d2cbe5SCathy Xu #define PINMUX_GPIO163__FUNC_ADSP_URXD0 (MTK_PIN_NO(163) | 4) 1030*f5d2cbe5SCathy Xu #define PINMUX_GPIO163__FUNC_SSPM_URXD_AO_VLP (MTK_PIN_NO(163) | 5) 1031*f5d2cbe5SCathy Xu #define PINMUX_GPIO163__FUNC_HFRP_URXD1 (MTK_PIN_NO(163) | 6) 1032*f5d2cbe5SCathy Xu 1033*f5d2cbe5SCathy Xu #define PINMUX_GPIO164__FUNC_GPIO164 (MTK_PIN_NO(164) | 0) 1034*f5d2cbe5SCathy Xu #define PINMUX_GPIO164__FUNC_SCP_SCL0 (MTK_PIN_NO(164) | 1) 1035*f5d2cbe5SCathy Xu #define PINMUX_GPIO164__FUNC_TP_GPIO0_AO (MTK_PIN_NO(164) | 6) 1036*f5d2cbe5SCathy Xu #define PINMUX_GPIO164__FUNC_DBG_MON_A22 (MTK_PIN_NO(164) | 7) 1037*f5d2cbe5SCathy Xu 1038*f5d2cbe5SCathy Xu #define PINMUX_GPIO165__FUNC_GPIO165 (MTK_PIN_NO(165) | 0) 1039*f5d2cbe5SCathy Xu #define PINMUX_GPIO165__FUNC_SCP_SDA0 (MTK_PIN_NO(165) | 1) 1040*f5d2cbe5SCathy Xu #define PINMUX_GPIO165__FUNC_TP_GPIO1_AO (MTK_PIN_NO(165) | 6) 1041*f5d2cbe5SCathy Xu #define PINMUX_GPIO165__FUNC_DBG_MON_A23 (MTK_PIN_NO(165) | 7) 1042*f5d2cbe5SCathy Xu 1043*f5d2cbe5SCathy Xu #define PINMUX_GPIO166__FUNC_GPIO166 (MTK_PIN_NO(166) | 0) 1044*f5d2cbe5SCathy Xu #define PINMUX_GPIO166__FUNC_SCP_SCL2 (MTK_PIN_NO(166) | 1) 1045*f5d2cbe5SCathy Xu #define PINMUX_GPIO166__FUNC_TP_GPIO2_AO (MTK_PIN_NO(166) | 6) 1046*f5d2cbe5SCathy Xu #define PINMUX_GPIO166__FUNC_DBG_MON_A24 (MTK_PIN_NO(166) | 7) 1047*f5d2cbe5SCathy Xu 1048*f5d2cbe5SCathy Xu #define PINMUX_GPIO167__FUNC_GPIO167 (MTK_PIN_NO(167) | 0) 1049*f5d2cbe5SCathy Xu #define PINMUX_GPIO167__FUNC_SCP_SDA2 (MTK_PIN_NO(167) | 1) 1050*f5d2cbe5SCathy Xu #define PINMUX_GPIO167__FUNC_TP_GPIO3_AO (MTK_PIN_NO(167) | 6) 1051*f5d2cbe5SCathy Xu #define PINMUX_GPIO167__FUNC_DBG_MON_A25 (MTK_PIN_NO(167) | 7) 1052*f5d2cbe5SCathy Xu 1053*f5d2cbe5SCathy Xu #define PINMUX_GPIO168__FUNC_GPIO168 (MTK_PIN_NO(168) | 0) 1054*f5d2cbe5SCathy Xu #define PINMUX_GPIO168__FUNC_SCP_SPI2_CK (MTK_PIN_NO(168) | 1) 1055*f5d2cbe5SCathy Xu #define PINMUX_GPIO168__FUNC_SPI2_B_CLK (MTK_PIN_NO(168) | 2) 1056*f5d2cbe5SCathy Xu #define PINMUX_GPIO168__FUNC_PWM_VLP (MTK_PIN_NO(168) | 3) 1057*f5d2cbe5SCathy Xu #define PINMUX_GPIO168__FUNC_SCP_SCL2 (MTK_PIN_NO(168) | 4) 1058*f5d2cbe5SCathy Xu #define PINMUX_GPIO168__FUNC_DBG_MON_A26 (MTK_PIN_NO(168) | 7) 1059*f5d2cbe5SCathy Xu 1060*f5d2cbe5SCathy Xu #define PINMUX_GPIO169__FUNC_GPIO169 (MTK_PIN_NO(169) | 0) 1061*f5d2cbe5SCathy Xu #define PINMUX_GPIO169__FUNC_SCP_SPI2_CS (MTK_PIN_NO(169) | 1) 1062*f5d2cbe5SCathy Xu #define PINMUX_GPIO169__FUNC_SPI2_B_CSB (MTK_PIN_NO(169) | 2) 1063*f5d2cbe5SCathy Xu #define PINMUX_GPIO169__FUNC_DBG_MON_A27 (MTK_PIN_NO(169) | 7) 1064*f5d2cbe5SCathy Xu 1065*f5d2cbe5SCathy Xu #define PINMUX_GPIO170__FUNC_GPIO170 (MTK_PIN_NO(170) | 0) 1066*f5d2cbe5SCathy Xu #define PINMUX_GPIO170__FUNC_SCP_SPI2_MO (MTK_PIN_NO(170) | 1) 1067*f5d2cbe5SCathy Xu #define PINMUX_GPIO170__FUNC_SPI2_B_MO (MTK_PIN_NO(170) | 2) 1068*f5d2cbe5SCathy Xu #define PINMUX_GPIO170__FUNC_SCP_SDA2 (MTK_PIN_NO(170) | 4) 1069*f5d2cbe5SCathy Xu #define PINMUX_GPIO170__FUNC_DBG_MON_A28 (MTK_PIN_NO(170) | 7) 1070*f5d2cbe5SCathy Xu 1071*f5d2cbe5SCathy Xu #define PINMUX_GPIO171__FUNC_GPIO171 (MTK_PIN_NO(171) | 0) 1072*f5d2cbe5SCathy Xu #define PINMUX_GPIO171__FUNC_SCP_SPI2_MI (MTK_PIN_NO(171) | 1) 1073*f5d2cbe5SCathy Xu #define PINMUX_GPIO171__FUNC_SPI2_B_MI (MTK_PIN_NO(171) | 2) 1074*f5d2cbe5SCathy Xu #define PINMUX_GPIO171__FUNC_DBG_MON_A29 (MTK_PIN_NO(171) | 7) 1075*f5d2cbe5SCathy Xu 1076*f5d2cbe5SCathy Xu #define PINMUX_GPIO172__FUNC_GPIO172 (MTK_PIN_NO(172) | 0) 1077*f5d2cbe5SCathy Xu #define PINMUX_GPIO172__FUNC_CONN_TCXOENA_REQ (MTK_PIN_NO(172) | 1) 1078*f5d2cbe5SCathy Xu 1079*f5d2cbe5SCathy Xu #define PINMUX_GPIO173__FUNC_GPIO173 (MTK_PIN_NO(173) | 0) 1080*f5d2cbe5SCathy Xu #define PINMUX_GPIO173__FUNC_CMFLASH3 (MTK_PIN_NO(173) | 1) 1081*f5d2cbe5SCathy Xu #define PINMUX_GPIO173__FUNC_PWM_3 (MTK_PIN_NO(173) | 2) 1082*f5d2cbe5SCathy Xu #define PINMUX_GPIO173__FUNC_MD_GPS_L5_BLANK (MTK_PIN_NO(173) | 3) 1083*f5d2cbe5SCathy Xu #define PINMUX_GPIO173__FUNC_CLKM1_A (MTK_PIN_NO(173) | 4) 1084*f5d2cbe5SCathy Xu #define PINMUX_GPIO173__FUNC_DBG_MON_A31 (MTK_PIN_NO(173) | 7) 1085*f5d2cbe5SCathy Xu 1086*f5d2cbe5SCathy Xu #define PINMUX_GPIO174__FUNC_GPIO174 (MTK_PIN_NO(174) | 0) 1087*f5d2cbe5SCathy Xu #define PINMUX_GPIO174__FUNC_CMFLASH0 (MTK_PIN_NO(174) | 1) 1088*f5d2cbe5SCathy Xu #define PINMUX_GPIO174__FUNC_PWM_0 (MTK_PIN_NO(174) | 2) 1089*f5d2cbe5SCathy Xu #define PINMUX_GPIO174__FUNC_VBUSVALID_1P (MTK_PIN_NO(174) | 3) 1090*f5d2cbe5SCathy Xu #define PINMUX_GPIO174__FUNC_MD32_2_RXD (MTK_PIN_NO(174) | 4) 1091*f5d2cbe5SCathy Xu #define PINMUX_GPIO174__FUNC_DISP_PWM3 (MTK_PIN_NO(174) | 5) 1092*f5d2cbe5SCathy Xu 1093*f5d2cbe5SCathy Xu #define PINMUX_GPIO175__FUNC_GPIO175 (MTK_PIN_NO(175) | 0) 1094*f5d2cbe5SCathy Xu #define PINMUX_GPIO175__FUNC_CMFLASH1 (MTK_PIN_NO(175) | 1) 1095*f5d2cbe5SCathy Xu #define PINMUX_GPIO175__FUNC_PWM_1 (MTK_PIN_NO(175) | 2) 1096*f5d2cbe5SCathy Xu #define PINMUX_GPIO175__FUNC_EDP_TX_HPD (MTK_PIN_NO(175) | 3) 1097*f5d2cbe5SCathy Xu #define PINMUX_GPIO175__FUNC_MD32_2_TXD (MTK_PIN_NO(175) | 4) 1098*f5d2cbe5SCathy Xu #define PINMUX_GPIO175__FUNC_DISP_PWM4 (MTK_PIN_NO(175) | 5) 1099*f5d2cbe5SCathy Xu 1100*f5d2cbe5SCathy Xu #define PINMUX_GPIO176__FUNC_GPIO176 (MTK_PIN_NO(176) | 0) 1101*f5d2cbe5SCathy Xu #define PINMUX_GPIO176__FUNC_SCL5 (MTK_PIN_NO(176) | 1) 1102*f5d2cbe5SCathy Xu #define PINMUX_GPIO176__FUNC_LCM3_RST (MTK_PIN_NO(176) | 2) 1103*f5d2cbe5SCathy Xu #define PINMUX_GPIO176__FUNC_MD_URXD1_CONN (MTK_PIN_NO(176) | 4) 1104*f5d2cbe5SCathy Xu #define PINMUX_GPIO176__FUNC_TP_UTXD_GNSS_VCORE (MTK_PIN_NO(176) | 6) 1105*f5d2cbe5SCathy Xu 1106*f5d2cbe5SCathy Xu #define PINMUX_GPIO177__FUNC_GPIO177 (MTK_PIN_NO(177) | 0) 1107*f5d2cbe5SCathy Xu #define PINMUX_GPIO177__FUNC_SDA5 (MTK_PIN_NO(177) | 1) 1108*f5d2cbe5SCathy Xu #define PINMUX_GPIO177__FUNC_DSI3_TE (MTK_PIN_NO(177) | 2) 1109*f5d2cbe5SCathy Xu #define PINMUX_GPIO177__FUNC_MD_UTXD1_CONN (MTK_PIN_NO(177) | 4) 1110*f5d2cbe5SCathy Xu #define PINMUX_GPIO177__FUNC_TP_URXD_GNSS_VCORE (MTK_PIN_NO(177) | 6) 1111*f5d2cbe5SCathy Xu 1112*f5d2cbe5SCathy Xu #define PINMUX_GPIO178__FUNC_GPIO178 (MTK_PIN_NO(178) | 0) 1113*f5d2cbe5SCathy Xu #define PINMUX_GPIO178__FUNC_DMIC_CLK (MTK_PIN_NO(178) | 1) 1114*f5d2cbe5SCathy Xu #define PINMUX_GPIO178__FUNC_SCP_DMIC_CLK (MTK_PIN_NO(178) | 2) 1115*f5d2cbe5SCathy Xu #define PINMUX_GPIO178__FUNC_SRCLKENAI0 (MTK_PIN_NO(178) | 3) 1116*f5d2cbe5SCathy Xu #define PINMUX_GPIO178__FUNC_CLKM2_B (MTK_PIN_NO(178) | 4) 1117*f5d2cbe5SCathy Xu #define PINMUX_GPIO178__FUNC_TP_GPIO7_AO (MTK_PIN_NO(178) | 5) 1118*f5d2cbe5SCathy Xu #define PINMUX_GPIO178__FUNC_SPU1_UTX (MTK_PIN_NO(178) | 6) 1119*f5d2cbe5SCathy Xu #define PINMUX_GPIO178__FUNC_DAP_SONIC_SWCK (MTK_PIN_NO(178) | 7) 1120*f5d2cbe5SCathy Xu 1121*f5d2cbe5SCathy Xu #define PINMUX_GPIO179__FUNC_GPIO179 (MTK_PIN_NO(179) | 0) 1122*f5d2cbe5SCathy Xu #define PINMUX_GPIO179__FUNC_DMIC_DAT (MTK_PIN_NO(179) | 1) 1123*f5d2cbe5SCathy Xu #define PINMUX_GPIO179__FUNC_SCP_DMIC_DAT (MTK_PIN_NO(179) | 2) 1124*f5d2cbe5SCathy Xu #define PINMUX_GPIO179__FUNC_SRCLKENAI1 (MTK_PIN_NO(179) | 3) 1125*f5d2cbe5SCathy Xu #define PINMUX_GPIO179__FUNC_CLKM3_B (MTK_PIN_NO(179) | 4) 1126*f5d2cbe5SCathy Xu #define PINMUX_GPIO179__FUNC_TP_GPIO8_AO (MTK_PIN_NO(179) | 5) 1127*f5d2cbe5SCathy Xu #define PINMUX_GPIO179__FUNC_SPU1_URX (MTK_PIN_NO(179) | 6) 1128*f5d2cbe5SCathy Xu #define PINMUX_GPIO179__FUNC_DAP_SONIC_SWD (MTK_PIN_NO(179) | 7) 1129*f5d2cbe5SCathy Xu 1130*f5d2cbe5SCathy Xu #define PINMUX_GPIO180__FUNC_GPIO180 (MTK_PIN_NO(180) | 0) 1131*f5d2cbe5SCathy Xu #define PINMUX_GPIO180__FUNC_IDDIG_1P (MTK_PIN_NO(180) | 1) 1132*f5d2cbe5SCathy Xu #define PINMUX_GPIO180__FUNC_CMVREF0 (MTK_PIN_NO(180) | 2) 1133*f5d2cbe5SCathy Xu #define PINMUX_GPIO180__FUNC_GPS_PPS1 (MTK_PIN_NO(180) | 3) 1134*f5d2cbe5SCathy Xu #define PINMUX_GPIO180__FUNC_GPS_L5_ELNA_EN (MTK_PIN_NO(180) | 4) 1135*f5d2cbe5SCathy Xu #define PINMUX_GPIO180__FUNC_DISP_PWM1 (MTK_PIN_NO(180) | 5) 1136*f5d2cbe5SCathy Xu 1137*f5d2cbe5SCathy Xu #define PINMUX_GPIO181__FUNC_GPIO181 (MTK_PIN_NO(181) | 0) 1138*f5d2cbe5SCathy Xu #define PINMUX_GPIO181__FUNC_USB_DRVVBUS_1P (MTK_PIN_NO(181) | 1) 1139*f5d2cbe5SCathy Xu #define PINMUX_GPIO181__FUNC_CMVREF1 (MTK_PIN_NO(181) | 2) 1140*f5d2cbe5SCathy Xu #define PINMUX_GPIO181__FUNC_MFG_EB_JTAG_TRSTN (MTK_PIN_NO(181) | 3) 1141*f5d2cbe5SCathy Xu #define PINMUX_GPIO181__FUNC_ADSP_JTAG1_TRSTN (MTK_PIN_NO(181) | 4) 1142*f5d2cbe5SCathy Xu #define PINMUX_GPIO181__FUNC_HFRP_JTAG1_TRSTN (MTK_PIN_NO(181) | 5) 1143*f5d2cbe5SCathy Xu #define PINMUX_GPIO181__FUNC_SPU1_NTRST (MTK_PIN_NO(181) | 6) 1144*f5d2cbe5SCathy Xu #define PINMUX_GPIO181__FUNC_CONN_BG_GPS_MCU_TRST_B (MTK_PIN_NO(181) | 7) 1145*f5d2cbe5SCathy Xu 1146*f5d2cbe5SCathy Xu #define PINMUX_GPIO182__FUNC_GPIO182 (MTK_PIN_NO(182) | 0) 1147*f5d2cbe5SCathy Xu #define PINMUX_GPIO182__FUNC_SCL11 (MTK_PIN_NO(182) | 1) 1148*f5d2cbe5SCathy Xu #define PINMUX_GPIO182__FUNC_CMVREF2 (MTK_PIN_NO(182) | 2) 1149*f5d2cbe5SCathy Xu #define PINMUX_GPIO182__FUNC_MFG_EB_JTAG_TCK (MTK_PIN_NO(182) | 3) 1150*f5d2cbe5SCathy Xu #define PINMUX_GPIO182__FUNC_ADSP_JTAG1_TCK (MTK_PIN_NO(182) | 4) 1151*f5d2cbe5SCathy Xu #define PINMUX_GPIO182__FUNC_HFRP_JTAG1_TCK (MTK_PIN_NO(182) | 5) 1152*f5d2cbe5SCathy Xu #define PINMUX_GPIO182__FUNC_SPU1_TCK (MTK_PIN_NO(182) | 6) 1153*f5d2cbe5SCathy Xu #define PINMUX_GPIO182__FUNC_CONN_BG_GPS_MCU_TCK (MTK_PIN_NO(182) | 7) 1154*f5d2cbe5SCathy Xu 1155*f5d2cbe5SCathy Xu #define PINMUX_GPIO183__FUNC_GPIO183 (MTK_PIN_NO(183) | 0) 1156*f5d2cbe5SCathy Xu #define PINMUX_GPIO183__FUNC_SDA11 (MTK_PIN_NO(183) | 1) 1157*f5d2cbe5SCathy Xu #define PINMUX_GPIO183__FUNC_CMVREF3 (MTK_PIN_NO(183) | 2) 1158*f5d2cbe5SCathy Xu #define PINMUX_GPIO183__FUNC_MFG_EB_JTAG_TMS (MTK_PIN_NO(183) | 3) 1159*f5d2cbe5SCathy Xu #define PINMUX_GPIO183__FUNC_ADSP_JTAG1_TMS (MTK_PIN_NO(183) | 4) 1160*f5d2cbe5SCathy Xu #define PINMUX_GPIO183__FUNC_HFRP_JTAG1_TMS (MTK_PIN_NO(183) | 5) 1161*f5d2cbe5SCathy Xu #define PINMUX_GPIO183__FUNC_SPU1_TMS (MTK_PIN_NO(183) | 6) 1162*f5d2cbe5SCathy Xu #define PINMUX_GPIO183__FUNC_CONN_BG_GPS_MCU_TMS (MTK_PIN_NO(183) | 7) 1163*f5d2cbe5SCathy Xu 1164*f5d2cbe5SCathy Xu #define PINMUX_GPIO184__FUNC_GPIO184 (MTK_PIN_NO(184) | 0) 1165*f5d2cbe5SCathy Xu #define PINMUX_GPIO184__FUNC_SCL12 (MTK_PIN_NO(184) | 1) 1166*f5d2cbe5SCathy Xu #define PINMUX_GPIO184__FUNC_CMVREF4 (MTK_PIN_NO(184) | 2) 1167*f5d2cbe5SCathy Xu #define PINMUX_GPIO184__FUNC_MFG_EB_JTAG_TDO (MTK_PIN_NO(184) | 3) 1168*f5d2cbe5SCathy Xu #define PINMUX_GPIO184__FUNC_ADSP_JTAG1_TDO (MTK_PIN_NO(184) | 4) 1169*f5d2cbe5SCathy Xu #define PINMUX_GPIO184__FUNC_HFRP_JTAG1_TDO (MTK_PIN_NO(184) | 5) 1170*f5d2cbe5SCathy Xu #define PINMUX_GPIO184__FUNC_SPU1_TDO (MTK_PIN_NO(184) | 6) 1171*f5d2cbe5SCathy Xu #define PINMUX_GPIO184__FUNC_CONN_BG_GPS_MCU_TDO (MTK_PIN_NO(184) | 7) 1172*f5d2cbe5SCathy Xu 1173*f5d2cbe5SCathy Xu #define PINMUX_GPIO185__FUNC_GPIO185 (MTK_PIN_NO(185) | 0) 1174*f5d2cbe5SCathy Xu #define PINMUX_GPIO185__FUNC_SDA12 (MTK_PIN_NO(185) | 1) 1175*f5d2cbe5SCathy Xu #define PINMUX_GPIO185__FUNC_CMVREF5 (MTK_PIN_NO(185) | 2) 1176*f5d2cbe5SCathy Xu #define PINMUX_GPIO185__FUNC_MFG_EB_JTAG_TDI (MTK_PIN_NO(185) | 3) 1177*f5d2cbe5SCathy Xu #define PINMUX_GPIO185__FUNC_ADSP_JTAG1_TDI (MTK_PIN_NO(185) | 4) 1178*f5d2cbe5SCathy Xu #define PINMUX_GPIO185__FUNC_HFRP_JTAG1_TDI (MTK_PIN_NO(185) | 5) 1179*f5d2cbe5SCathy Xu #define PINMUX_GPIO185__FUNC_SPU1_TDI (MTK_PIN_NO(185) | 6) 1180*f5d2cbe5SCathy Xu #define PINMUX_GPIO185__FUNC_CONN_BG_GPS_MCU_TDI (MTK_PIN_NO(185) | 7) 1181*f5d2cbe5SCathy Xu 1182*f5d2cbe5SCathy Xu #define PINMUX_GPIO186__FUNC_GPIO186 (MTK_PIN_NO(186) | 0) 1183*f5d2cbe5SCathy Xu #define PINMUX_GPIO186__FUNC_MD_GPS_L1_BLANK (MTK_PIN_NO(186) | 1) 1184*f5d2cbe5SCathy Xu #define PINMUX_GPIO186__FUNC_PMSR_SMAP (MTK_PIN_NO(186) | 2) 1185*f5d2cbe5SCathy Xu #define PINMUX_GPIO186__FUNC_TP_GPIO2_AO (MTK_PIN_NO(186) | 3) 1186*f5d2cbe5SCathy Xu 1187*f5d2cbe5SCathy Xu #define PINMUX_GPIO187__FUNC_GPIO187 (MTK_PIN_NO(187) | 0) 1188*f5d2cbe5SCathy Xu #define PINMUX_GPIO187__FUNC_MD_GPS_L5_BLANK (MTK_PIN_NO(187) | 1) 1189*f5d2cbe5SCathy Xu #define PINMUX_GPIO187__FUNC_TP_GPIO4_AO (MTK_PIN_NO(187) | 3) 1190*f5d2cbe5SCathy Xu 1191*f5d2cbe5SCathy Xu #define PINMUX_GPIO188__FUNC_GPIO188 (MTK_PIN_NO(188) | 0) 1192*f5d2cbe5SCathy Xu #define PINMUX_GPIO188__FUNC_SCL2 (MTK_PIN_NO(188) | 1) 1193*f5d2cbe5SCathy Xu #define PINMUX_GPIO188__FUNC_SCP_SCL8 (MTK_PIN_NO(188) | 2) 1194*f5d2cbe5SCathy Xu 1195*f5d2cbe5SCathy Xu #define PINMUX_GPIO189__FUNC_GPIO189 (MTK_PIN_NO(189) | 0) 1196*f5d2cbe5SCathy Xu #define PINMUX_GPIO189__FUNC_SDA2 (MTK_PIN_NO(189) | 1) 1197*f5d2cbe5SCathy Xu #define PINMUX_GPIO189__FUNC_SCP_SDA8 (MTK_PIN_NO(189) | 2) 1198*f5d2cbe5SCathy Xu 1199*f5d2cbe5SCathy Xu #define PINMUX_GPIO190__FUNC_GPIO190 (MTK_PIN_NO(190) | 0) 1200*f5d2cbe5SCathy Xu #define PINMUX_GPIO190__FUNC_SCL4 (MTK_PIN_NO(190) | 1) 1201*f5d2cbe5SCathy Xu #define PINMUX_GPIO190__FUNC_SCP_SCL9 (MTK_PIN_NO(190) | 2) 1202*f5d2cbe5SCathy Xu #define PINMUX_GPIO190__FUNC_UDI_TDI_6 (MTK_PIN_NO(190) | 6) 1203*f5d2cbe5SCathy Xu 1204*f5d2cbe5SCathy Xu #define PINMUX_GPIO191__FUNC_GPIO191 (MTK_PIN_NO(191) | 0) 1205*f5d2cbe5SCathy Xu #define PINMUX_GPIO191__FUNC_SDA4 (MTK_PIN_NO(191) | 1) 1206*f5d2cbe5SCathy Xu #define PINMUX_GPIO191__FUNC_SCP_SDA9 (MTK_PIN_NO(191) | 2) 1207*f5d2cbe5SCathy Xu #define PINMUX_GPIO191__FUNC_UDI_TDI_7 (MTK_PIN_NO(191) | 6) 1208*f5d2cbe5SCathy Xu 1209*f5d2cbe5SCathy Xu #define PINMUX_GPIO192__FUNC_GPIO192 (MTK_PIN_NO(192) | 0) 1210*f5d2cbe5SCathy Xu #define PINMUX_GPIO192__FUNC_CMMCLK2 (MTK_PIN_NO(192) | 1) 1211*f5d2cbe5SCathy Xu #define PINMUX_GPIO192__FUNC_MD32_3_RXD (MTK_PIN_NO(192) | 4) 1212*f5d2cbe5SCathy Xu 1213*f5d2cbe5SCathy Xu #define PINMUX_GPIO193__FUNC_GPIO193 (MTK_PIN_NO(193) | 0) 1214*f5d2cbe5SCathy Xu #define PINMUX_GPIO193__FUNC_CLKM0_B (MTK_PIN_NO(193) | 3) 1215*f5d2cbe5SCathy Xu #define PINMUX_GPIO193__FUNC_MD32_3_TXD (MTK_PIN_NO(193) | 4) 1216*f5d2cbe5SCathy Xu #define PINMUX_GPIO193__FUNC_UDI_TDO_7 (MTK_PIN_NO(193) | 6) 1217*f5d2cbe5SCathy Xu 1218*f5d2cbe5SCathy Xu #define PINMUX_GPIO194__FUNC_GPIO194 (MTK_PIN_NO(194) | 0) 1219*f5d2cbe5SCathy Xu #define PINMUX_GPIO194__FUNC_SCL7 (MTK_PIN_NO(194) | 1) 1220*f5d2cbe5SCathy Xu #define PINMUX_GPIO194__FUNC_MD32_3_GPIO0 (MTK_PIN_NO(194) | 2) 1221*f5d2cbe5SCathy Xu #define PINMUX_GPIO194__FUNC_CLKM2_B (MTK_PIN_NO(194) | 3) 1222*f5d2cbe5SCathy Xu #define PINMUX_GPIO194__FUNC_UDI_TDI_2 (MTK_PIN_NO(194) | 6) 1223*f5d2cbe5SCathy Xu 1224*f5d2cbe5SCathy Xu #define PINMUX_GPIO195__FUNC_GPIO195 (MTK_PIN_NO(195) | 0) 1225*f5d2cbe5SCathy Xu #define PINMUX_GPIO195__FUNC_SDA7 (MTK_PIN_NO(195) | 1) 1226*f5d2cbe5SCathy Xu #define PINMUX_GPIO195__FUNC_CLKM3_B (MTK_PIN_NO(195) | 3) 1227*f5d2cbe5SCathy Xu #define PINMUX_GPIO195__FUNC_UDI_TDI_3 (MTK_PIN_NO(195) | 6) 1228*f5d2cbe5SCathy Xu 1229*f5d2cbe5SCathy Xu #define PINMUX_GPIO196__FUNC_GPIO196 (MTK_PIN_NO(196) | 0) 1230*f5d2cbe5SCathy Xu #define PINMUX_GPIO196__FUNC_CMMCLK3 (MTK_PIN_NO(196) | 1) 1231*f5d2cbe5SCathy Xu 1232*f5d2cbe5SCathy Xu #define PINMUX_GPIO197__FUNC_GPIO197 (MTK_PIN_NO(197) | 0) 1233*f5d2cbe5SCathy Xu #define PINMUX_GPIO197__FUNC_CLKM1_B (MTK_PIN_NO(197) | 3) 1234*f5d2cbe5SCathy Xu #define PINMUX_GPIO197__FUNC_UDI_TDI_1 (MTK_PIN_NO(197) | 6) 1235*f5d2cbe5SCathy Xu 1236*f5d2cbe5SCathy Xu #define PINMUX_GPIO198__FUNC_GPIO198 (MTK_PIN_NO(198) | 0) 1237*f5d2cbe5SCathy Xu #define PINMUX_GPIO198__FUNC_SCL8 (MTK_PIN_NO(198) | 1) 1238*f5d2cbe5SCathy Xu #define PINMUX_GPIO198__FUNC_UDI_TDI_4 (MTK_PIN_NO(198) | 6) 1239*f5d2cbe5SCathy Xu 1240*f5d2cbe5SCathy Xu #define PINMUX_GPIO199__FUNC_GPIO199 (MTK_PIN_NO(199) | 0) 1241*f5d2cbe5SCathy Xu #define PINMUX_GPIO199__FUNC_SDA8 (MTK_PIN_NO(199) | 1) 1242*f5d2cbe5SCathy Xu #define PINMUX_GPIO199__FUNC_UDI_TDI_5 (MTK_PIN_NO(199) | 6) 1243*f5d2cbe5SCathy Xu 1244*f5d2cbe5SCathy Xu #define PINMUX_GPIO200__FUNC_GPIO200 (MTK_PIN_NO(200) | 0) 1245*f5d2cbe5SCathy Xu #define PINMUX_GPIO200__FUNC_SCL1 (MTK_PIN_NO(200) | 1) 1246*f5d2cbe5SCathy Xu 1247*f5d2cbe5SCathy Xu #define PINMUX_GPIO201__FUNC_GPIO201 (MTK_PIN_NO(201) | 0) 1248*f5d2cbe5SCathy Xu #define PINMUX_GPIO201__FUNC_SDA1 (MTK_PIN_NO(201) | 1) 1249*f5d2cbe5SCathy Xu #define PINMUX_GPIO201__FUNC_TSFDC_BG_COMP (MTK_PIN_NO(201) | 7) 1250*f5d2cbe5SCathy Xu 1251*f5d2cbe5SCathy Xu #define PINMUX_GPIO202__FUNC_GPIO202 (MTK_PIN_NO(202) | 0) 1252*f5d2cbe5SCathy Xu #define PINMUX_GPIO202__FUNC_SCL9 (MTK_PIN_NO(202) | 1) 1253*f5d2cbe5SCathy Xu #define PINMUX_GPIO202__FUNC_SCP_SCL7 (MTK_PIN_NO(202) | 2) 1254*f5d2cbe5SCathy Xu #define PINMUX_GPIO202__FUNC_TP_GPIO15_AO (MTK_PIN_NO(202) | 6) 1255*f5d2cbe5SCathy Xu 1256*f5d2cbe5SCathy Xu #define PINMUX_GPIO203__FUNC_GPIO203 (MTK_PIN_NO(203) | 0) 1257*f5d2cbe5SCathy Xu #define PINMUX_GPIO203__FUNC_SDA9 (MTK_PIN_NO(203) | 1) 1258*f5d2cbe5SCathy Xu #define PINMUX_GPIO203__FUNC_SCP_SDA7 (MTK_PIN_NO(203) | 2) 1259*f5d2cbe5SCathy Xu #define PINMUX_GPIO203__FUNC_TP_GPIO9_AO (MTK_PIN_NO(203) | 6) 1260*f5d2cbe5SCathy Xu 1261*f5d2cbe5SCathy Xu #define PINMUX_GPIO204__FUNC_GPIO204 (MTK_PIN_NO(204) | 0) 1262*f5d2cbe5SCathy Xu #define PINMUX_GPIO204__FUNC_SCL13 (MTK_PIN_NO(204) | 1) 1263*f5d2cbe5SCathy Xu #define PINMUX_GPIO204__FUNC_CMVREF6 (MTK_PIN_NO(204) | 2) 1264*f5d2cbe5SCathy Xu #define PINMUX_GPIO204__FUNC_GPS_L1_ELNA_EN (MTK_PIN_NO(204) | 3) 1265*f5d2cbe5SCathy Xu #define PINMUX_GPIO204__FUNC_CLKM2_B (MTK_PIN_NO(204) | 5) 1266*f5d2cbe5SCathy Xu #define PINMUX_GPIO204__FUNC_TP_GPIO12_AO (MTK_PIN_NO(204) | 6) 1267*f5d2cbe5SCathy Xu 1268*f5d2cbe5SCathy Xu #define PINMUX_GPIO205__FUNC_GPIO205 (MTK_PIN_NO(205) | 0) 1269*f5d2cbe5SCathy Xu #define PINMUX_GPIO205__FUNC_SDA13 (MTK_PIN_NO(205) | 1) 1270*f5d2cbe5SCathy Xu #define PINMUX_GPIO205__FUNC_CMVREF7 (MTK_PIN_NO(205) | 2) 1271*f5d2cbe5SCathy Xu #define PINMUX_GPIO205__FUNC_GPS_L5_ELNA_EN (MTK_PIN_NO(205) | 3) 1272*f5d2cbe5SCathy Xu #define PINMUX_GPIO205__FUNC_CLKM3_B (MTK_PIN_NO(205) | 5) 1273*f5d2cbe5SCathy Xu #define PINMUX_GPIO205__FUNC_TP_GPIO13_AO (MTK_PIN_NO(205) | 6) 1274*f5d2cbe5SCathy Xu 1275*f5d2cbe5SCathy Xu #define PINMUX_GPIO206__FUNC_GPIO206 (MTK_PIN_NO(206) | 0) 1276*f5d2cbe5SCathy Xu #define PINMUX_GPIO206__FUNC_MD32_2_GPIO0 (MTK_PIN_NO(206) | 2) 1277*f5d2cbe5SCathy Xu #define PINMUX_GPIO206__FUNC_VBUSVALID (MTK_PIN_NO(206) | 5) 1278*f5d2cbe5SCathy Xu #define PINMUX_GPIO206__FUNC_UDI_TDO_3 (MTK_PIN_NO(206) | 6) 1279*f5d2cbe5SCathy Xu 1280*f5d2cbe5SCathy Xu #define PINMUX_GPIO207__FUNC_GPIO207 (MTK_PIN_NO(207) | 0) 1281*f5d2cbe5SCathy Xu #define PINMUX_GPIO207__FUNC_PCIE_WAKEN_2P (MTK_PIN_NO(207) | 1) 1282*f5d2cbe5SCathy Xu #define PINMUX_GPIO207__FUNC_PMSR_SMAP_MAX (MTK_PIN_NO(207) | 2) 1283*f5d2cbe5SCathy Xu #define PINMUX_GPIO207__FUNC_FMI2S_A_BCK (MTK_PIN_NO(207) | 4) 1284*f5d2cbe5SCathy Xu #define PINMUX_GPIO207__FUNC_UDI_TDO_4 (MTK_PIN_NO(207) | 6) 1285*f5d2cbe5SCathy Xu 1286*f5d2cbe5SCathy Xu #define PINMUX_GPIO208__FUNC_GPIO208 (MTK_PIN_NO(208) | 0) 1287*f5d2cbe5SCathy Xu #define PINMUX_GPIO208__FUNC_PCIE_CLKREQN_2P (MTK_PIN_NO(208) | 1) 1288*f5d2cbe5SCathy Xu #define PINMUX_GPIO208__FUNC_PMSR_SMAP_MAX_W (MTK_PIN_NO(208) | 2) 1289*f5d2cbe5SCathy Xu #define PINMUX_GPIO208__FUNC_FMI2S_A_LRCK (MTK_PIN_NO(208) | 4) 1290*f5d2cbe5SCathy Xu #define PINMUX_GPIO208__FUNC_CLKM0_B (MTK_PIN_NO(208) | 5) 1291*f5d2cbe5SCathy Xu #define PINMUX_GPIO208__FUNC_UDI_TDO_5 (MTK_PIN_NO(208) | 6) 1292*f5d2cbe5SCathy Xu 1293*f5d2cbe5SCathy Xu #define PINMUX_GPIO209__FUNC_GPIO209 (MTK_PIN_NO(209) | 0) 1294*f5d2cbe5SCathy Xu #define PINMUX_GPIO209__FUNC_PCIE_PERSTN_2P (MTK_PIN_NO(209) | 1) 1295*f5d2cbe5SCathy Xu #define PINMUX_GPIO209__FUNC_PMSR_SMAP (MTK_PIN_NO(209) | 2) 1296*f5d2cbe5SCathy Xu #define PINMUX_GPIO209__FUNC_FMI2S_A_DI (MTK_PIN_NO(209) | 4) 1297*f5d2cbe5SCathy Xu #define PINMUX_GPIO209__FUNC_CLKM1_B (MTK_PIN_NO(209) | 5) 1298*f5d2cbe5SCathy Xu #define PINMUX_GPIO209__FUNC_UDI_TDO_6 (MTK_PIN_NO(209) | 6) 1299*f5d2cbe5SCathy Xu 1300*f5d2cbe5SCathy Xu #define PINMUX_GPIO210__FUNC_GPIO210 (MTK_PIN_NO(210) | 0) 1301*f5d2cbe5SCathy Xu #define PINMUX_GPIO210__FUNC_CMMCLK4 (MTK_PIN_NO(210) | 1) 1302*f5d2cbe5SCathy Xu 1303*f5d2cbe5SCathy Xu #define PINMUX_GPIO211__FUNC_GPIO211 (MTK_PIN_NO(211) | 0) 1304*f5d2cbe5SCathy Xu #define PINMUX_GPIO211__FUNC_CMMCLK5 (MTK_PIN_NO(211) | 1) 1305*f5d2cbe5SCathy Xu #define PINMUX_GPIO211__FUNC_CONN_TCXOENA_REQ (MTK_PIN_NO(211) | 2) 1306*f5d2cbe5SCathy Xu 1307*f5d2cbe5SCathy Xu #define PINMUX_GPIO212__FUNC_GPIO212 (MTK_PIN_NO(212) | 0) 1308*f5d2cbe5SCathy Xu #define PINMUX_GPIO212__FUNC_CMMCLK6 (MTK_PIN_NO(212) | 1) 1309*f5d2cbe5SCathy Xu #define PINMUX_GPIO212__FUNC_TP_GPIO10_AO (MTK_PIN_NO(212) | 2) 1310*f5d2cbe5SCathy Xu #define PINMUX_GPIO212__FUNC_IDDIG (MTK_PIN_NO(212) | 5) 1311*f5d2cbe5SCathy Xu #define PINMUX_GPIO212__FUNC_UDI_TDO_1 (MTK_PIN_NO(212) | 6) 1312*f5d2cbe5SCathy Xu 1313*f5d2cbe5SCathy Xu #define PINMUX_GPIO213__FUNC_GPIO213 (MTK_PIN_NO(213) | 0) 1314*f5d2cbe5SCathy Xu #define PINMUX_GPIO213__FUNC_CMMCLK7 (MTK_PIN_NO(213) | 1) 1315*f5d2cbe5SCathy Xu #define PINMUX_GPIO213__FUNC_TP_GPIO11_AO (MTK_PIN_NO(213) | 2) 1316*f5d2cbe5SCathy Xu #define PINMUX_GPIO213__FUNC_USB_DRVVBUS (MTK_PIN_NO(213) | 5) 1317*f5d2cbe5SCathy Xu #define PINMUX_GPIO213__FUNC_UDI_TDO_2 (MTK_PIN_NO(213) | 6) 1318*f5d2cbe5SCathy Xu 1319*f5d2cbe5SCathy Xu #define PINMUX_GPIO214__FUNC_GPIO214 (MTK_PIN_NO(214) | 0) 1320*f5d2cbe5SCathy Xu #define PINMUX_GPIO214__FUNC_SCP_SCL3 (MTK_PIN_NO(214) | 1) 1321*f5d2cbe5SCathy Xu #define PINMUX_GPIO214__FUNC_SDA14_E1 (MTK_PIN_NO(214) | 2) 1322*f5d2cbe5SCathy Xu #define PINMUX_GPIO214__FUNC_SCL14_E2 (MTK_PIN_NO(214) | 2) 1323*f5d2cbe5SCathy Xu #define PINMUX_GPIO214__FUNC_GBE1_MDC (MTK_PIN_NO(214) | 6) 1324*f5d2cbe5SCathy Xu #define PINMUX_GPIO214__FUNC_GBE0_MDC (MTK_PIN_NO(214) | 7) 1325*f5d2cbe5SCathy Xu 1326*f5d2cbe5SCathy Xu #define PINMUX_GPIO215__FUNC_GPIO215 (MTK_PIN_NO(215) | 0) 1327*f5d2cbe5SCathy Xu #define PINMUX_GPIO215__FUNC_SCP_SDA3 (MTK_PIN_NO(215) | 1) 1328*f5d2cbe5SCathy Xu #define PINMUX_GPIO215__FUNC_SCL14_E1 (MTK_PIN_NO(215) | 2) 1329*f5d2cbe5SCathy Xu #define PINMUX_GPIO215__FUNC_SDA14_E2 (MTK_PIN_NO(215) | 2) 1330*f5d2cbe5SCathy Xu #define PINMUX_GPIO215__FUNC_GBE1_MDIO (MTK_PIN_NO(215) | 6) 1331*f5d2cbe5SCathy Xu #define PINMUX_GPIO215__FUNC_GBE0_MDIO (MTK_PIN_NO(215) | 7) 1332*f5d2cbe5SCathy Xu 1333*f5d2cbe5SCathy Xu #define PINMUX_GPIO216__FUNC_GPIO216 (MTK_PIN_NO(216) | 0) 1334*f5d2cbe5SCathy Xu #define PINMUX_GPIO216__FUNC_GPS_PPS0 (MTK_PIN_NO(216) | 1) 1335*f5d2cbe5SCathy Xu 1336*f5d2cbe5SCathy Xu #define PINMUX_GPIO217__FUNC_GPIO217 (MTK_PIN_NO(217) | 0) 1337*f5d2cbe5SCathy Xu #define PINMUX_GPIO217__FUNC_KPROW0 (MTK_PIN_NO(217) | 1) 1338*f5d2cbe5SCathy Xu #define PINMUX_GPIO217__FUNC_TP_GPIO12_AO (MTK_PIN_NO(217) | 6) 1339*f5d2cbe5SCathy Xu 1340*f5d2cbe5SCathy Xu #define PINMUX_GPIO218__FUNC_GPIO218 (MTK_PIN_NO(218) | 0) 1341*f5d2cbe5SCathy Xu #define PINMUX_GPIO218__FUNC_KPROW1 (MTK_PIN_NO(218) | 1) 1342*f5d2cbe5SCathy Xu #define PINMUX_GPIO218__FUNC_SPI0_WP (MTK_PIN_NO(218) | 2) 1343*f5d2cbe5SCathy Xu #define PINMUX_GPIO218__FUNC_MBISTREADEN_TRIGGER (MTK_PIN_NO(218) | 3) 1344*f5d2cbe5SCathy Xu #define PINMUX_GPIO218__FUNC_GPS_L5_ELNA_EN (MTK_PIN_NO(218) | 5) 1345*f5d2cbe5SCathy Xu #define PINMUX_GPIO218__FUNC_TP_GPIO14_AO (MTK_PIN_NO(218) | 6) 1346*f5d2cbe5SCathy Xu 1347*f5d2cbe5SCathy Xu #define PINMUX_GPIO219__FUNC_GPIO219 (MTK_PIN_NO(219) | 0) 1348*f5d2cbe5SCathy Xu #define PINMUX_GPIO219__FUNC_KPCOL1 (MTK_PIN_NO(219) | 1) 1349*f5d2cbe5SCathy Xu #define PINMUX_GPIO219__FUNC_SPI0_HOLD (MTK_PIN_NO(219) | 2) 1350*f5d2cbe5SCathy Xu #define PINMUX_GPIO219__FUNC_MBISTWRITEEN_TRIGGER (MTK_PIN_NO(219) | 3) 1351*f5d2cbe5SCathy Xu #define PINMUX_GPIO219__FUNC_SPMI_M_TRIG_FLAG (MTK_PIN_NO(219) | 4) 1352*f5d2cbe5SCathy Xu #define PINMUX_GPIO219__FUNC_GPS_L1_ELNA_EN (MTK_PIN_NO(219) | 5) 1353*f5d2cbe5SCathy Xu #define PINMUX_GPIO219__FUNC_SPM_JTAG_TRSTN_VLP (MTK_PIN_NO(219) | 6) 1354*f5d2cbe5SCathy Xu #define PINMUX_GPIO219__FUNC_JTRSTN_SEL1 (MTK_PIN_NO(219) | 7) 1355*f5d2cbe5SCathy Xu 1356*f5d2cbe5SCathy Xu #define PINMUX_GPIO220__FUNC_GPIO220 (MTK_PIN_NO(220) | 0) 1357*f5d2cbe5SCathy Xu #define PINMUX_GPIO220__FUNC_SPI0_CLK (MTK_PIN_NO(220) | 1) 1358*f5d2cbe5SCathy Xu #define PINMUX_GPIO220__FUNC_SPM_JTAG_TCK_VLP (MTK_PIN_NO(220) | 6) 1359*f5d2cbe5SCathy Xu #define PINMUX_GPIO220__FUNC_JTCK_SEL1 (MTK_PIN_NO(220) | 7) 1360*f5d2cbe5SCathy Xu 1361*f5d2cbe5SCathy Xu #define PINMUX_GPIO221__FUNC_GPIO221 (MTK_PIN_NO(221) | 0) 1362*f5d2cbe5SCathy Xu #define PINMUX_GPIO221__FUNC_SPI0_CSB (MTK_PIN_NO(221) | 1) 1363*f5d2cbe5SCathy Xu #define PINMUX_GPIO221__FUNC_SPM_JTAG_TMS_VLP (MTK_PIN_NO(221) | 6) 1364*f5d2cbe5SCathy Xu #define PINMUX_GPIO221__FUNC_JTMS_SEL1 (MTK_PIN_NO(221) | 7) 1365*f5d2cbe5SCathy Xu 1366*f5d2cbe5SCathy Xu #define PINMUX_GPIO222__FUNC_GPIO222 (MTK_PIN_NO(222) | 0) 1367*f5d2cbe5SCathy Xu #define PINMUX_GPIO222__FUNC_SPI0_MO (MTK_PIN_NO(222) | 1) 1368*f5d2cbe5SCathy Xu #define PINMUX_GPIO222__FUNC_SCP_SCL7 (MTK_PIN_NO(222) | 2) 1369*f5d2cbe5SCathy Xu #define PINMUX_GPIO222__FUNC_SPM_JTAG_TDO_VLP (MTK_PIN_NO(222) | 6) 1370*f5d2cbe5SCathy Xu #define PINMUX_GPIO222__FUNC_JTDO_SEL1 (MTK_PIN_NO(222) | 7) 1371*f5d2cbe5SCathy Xu 1372*f5d2cbe5SCathy Xu #define PINMUX_GPIO223__FUNC_GPIO223 (MTK_PIN_NO(223) | 0) 1373*f5d2cbe5SCathy Xu #define PINMUX_GPIO223__FUNC_SPI0_MI (MTK_PIN_NO(223) | 1) 1374*f5d2cbe5SCathy Xu #define PINMUX_GPIO223__FUNC_SCP_SDA7 (MTK_PIN_NO(223) | 2) 1375*f5d2cbe5SCathy Xu #define PINMUX_GPIO223__FUNC_SPM_JTAG_TDI_VLP (MTK_PIN_NO(223) | 6) 1376*f5d2cbe5SCathy Xu #define PINMUX_GPIO223__FUNC_JTDI_SEL1 (MTK_PIN_NO(223) | 7) 1377*f5d2cbe5SCathy Xu 1378*f5d2cbe5SCathy Xu #define PINMUX_GPIO224__FUNC_GPIO224 (MTK_PIN_NO(224) | 0) 1379*f5d2cbe5SCathy Xu #define PINMUX_GPIO224__FUNC_MSDC2_CLK (MTK_PIN_NO(224) | 1) 1380*f5d2cbe5SCathy Xu #define PINMUX_GPIO224__FUNC_DMIC2_CLK (MTK_PIN_NO(224) | 2) 1381*f5d2cbe5SCathy Xu #define PINMUX_GPIO224__FUNC_GBE0_AUX_PPS0 (MTK_PIN_NO(224) | 3) 1382*f5d2cbe5SCathy Xu #define PINMUX_GPIO224__FUNC_GBE0_TXER (MTK_PIN_NO(224) | 4) 1383*f5d2cbe5SCathy Xu #define PINMUX_GPIO224__FUNC_GBE1_TXER (MTK_PIN_NO(224) | 5) 1384*f5d2cbe5SCathy Xu #define PINMUX_GPIO224__FUNC_GBE1_AUX_PPS0 (MTK_PIN_NO(224) | 6) 1385*f5d2cbe5SCathy Xu #define PINMUX_GPIO224__FUNC_MD32_1_TXD (MTK_PIN_NO(224) | 7) 1386*f5d2cbe5SCathy Xu 1387*f5d2cbe5SCathy Xu #define PINMUX_GPIO225__FUNC_GPIO225 (MTK_PIN_NO(225) | 0) 1388*f5d2cbe5SCathy Xu #define PINMUX_GPIO225__FUNC_MSDC2_CMD (MTK_PIN_NO(225) | 1) 1389*f5d2cbe5SCathy Xu #define PINMUX_GPIO225__FUNC_DMIC2_DAT (MTK_PIN_NO(225) | 2) 1390*f5d2cbe5SCathy Xu #define PINMUX_GPIO225__FUNC_GBE0_AUX_PPS1 (MTK_PIN_NO(225) | 3) 1391*f5d2cbe5SCathy Xu #define PINMUX_GPIO225__FUNC_GBE0_RXER (MTK_PIN_NO(225) | 4) 1392*f5d2cbe5SCathy Xu #define PINMUX_GPIO225__FUNC_GBE1_RXER (MTK_PIN_NO(225) | 5) 1393*f5d2cbe5SCathy Xu #define PINMUX_GPIO225__FUNC_GBE1_AUX_PPS1 (MTK_PIN_NO(225) | 6) 1394*f5d2cbe5SCathy Xu #define PINMUX_GPIO225__FUNC_MD32_1_RXD (MTK_PIN_NO(225) | 7) 1395*f5d2cbe5SCathy Xu 1396*f5d2cbe5SCathy Xu #define PINMUX_GPIO226__FUNC_GPIO226 (MTK_PIN_NO(226) | 0) 1397*f5d2cbe5SCathy Xu #define PINMUX_GPIO226__FUNC_MSDC2_DAT0 (MTK_PIN_NO(226) | 1) 1398*f5d2cbe5SCathy Xu #define PINMUX_GPIO226__FUNC_I2SIN3_BCK (MTK_PIN_NO(226) | 2) 1399*f5d2cbe5SCathy Xu #define PINMUX_GPIO226__FUNC_GBE0_AUX_PPS2 (MTK_PIN_NO(226) | 3) 1400*f5d2cbe5SCathy Xu #define PINMUX_GPIO226__FUNC_GBE0_COL (MTK_PIN_NO(226) | 4) 1401*f5d2cbe5SCathy Xu #define PINMUX_GPIO226__FUNC_GBE1_COL (MTK_PIN_NO(226) | 5) 1402*f5d2cbe5SCathy Xu #define PINMUX_GPIO226__FUNC_GBE1_AUX_PPS2 (MTK_PIN_NO(226) | 6) 1403*f5d2cbe5SCathy Xu #define PINMUX_GPIO226__FUNC_GBE1_MDC (MTK_PIN_NO(226) | 7) 1404*f5d2cbe5SCathy Xu 1405*f5d2cbe5SCathy Xu #define PINMUX_GPIO227__FUNC_GPIO227 (MTK_PIN_NO(227) | 0) 1406*f5d2cbe5SCathy Xu #define PINMUX_GPIO227__FUNC_MSDC2_DAT1 (MTK_PIN_NO(227) | 1) 1407*f5d2cbe5SCathy Xu #define PINMUX_GPIO227__FUNC_I2SIN3_LRCK (MTK_PIN_NO(227) | 2) 1408*f5d2cbe5SCathy Xu #define PINMUX_GPIO227__FUNC_GBE0_AUX_PPS3 (MTK_PIN_NO(227) | 3) 1409*f5d2cbe5SCathy Xu #define PINMUX_GPIO227__FUNC_GBE0_INTR (MTK_PIN_NO(227) | 4) 1410*f5d2cbe5SCathy Xu #define PINMUX_GPIO227__FUNC_GBE1_INTR (MTK_PIN_NO(227) | 5) 1411*f5d2cbe5SCathy Xu #define PINMUX_GPIO227__FUNC_GBE1_AUX_PPS3 (MTK_PIN_NO(227) | 6) 1412*f5d2cbe5SCathy Xu #define PINMUX_GPIO227__FUNC_GBE1_MDIO (MTK_PIN_NO(227) | 7) 1413*f5d2cbe5SCathy Xu 1414*f5d2cbe5SCathy Xu #define PINMUX_GPIO228__FUNC_GPIO228 (MTK_PIN_NO(228) | 0) 1415*f5d2cbe5SCathy Xu #define PINMUX_GPIO228__FUNC_MSDC2_DAT2 (MTK_PIN_NO(228) | 1) 1416*f5d2cbe5SCathy Xu #define PINMUX_GPIO228__FUNC_I2SIN3_DI (MTK_PIN_NO(228) | 2) 1417*f5d2cbe5SCathy Xu #define PINMUX_GPIO228__FUNC_GBE0_MDC (MTK_PIN_NO(228) | 3) 1418*f5d2cbe5SCathy Xu #define PINMUX_GPIO228__FUNC_GBE1_MDC (MTK_PIN_NO(228) | 4) 1419*f5d2cbe5SCathy Xu #define PINMUX_GPIO228__FUNC_CONN_BG_GPS_MCU_AICE_TCKC (MTK_PIN_NO(228) | 5) 1420*f5d2cbe5SCathy Xu 1421*f5d2cbe5SCathy Xu #define PINMUX_GPIO229__FUNC_GPIO229 (MTK_PIN_NO(229) | 0) 1422*f5d2cbe5SCathy Xu #define PINMUX_GPIO229__FUNC_MSDC2_DAT3 (MTK_PIN_NO(229) | 1) 1423*f5d2cbe5SCathy Xu #define PINMUX_GPIO229__FUNC_I2SOUT3_DO (MTK_PIN_NO(229) | 2) 1424*f5d2cbe5SCathy Xu #define PINMUX_GPIO229__FUNC_GBE0_MDIO (MTK_PIN_NO(229) | 3) 1425*f5d2cbe5SCathy Xu #define PINMUX_GPIO229__FUNC_GBE1_MDIO (MTK_PIN_NO(229) | 4) 1426*f5d2cbe5SCathy Xu #define PINMUX_GPIO229__FUNC_CONN_BG_GPS_MCU_AICE_TMSC (MTK_PIN_NO(229) | 5) 1427*f5d2cbe5SCathy Xu #define PINMUX_GPIO229__FUNC_AVB_CLK2 (MTK_PIN_NO(229) | 7) 1428*f5d2cbe5SCathy Xu 1429*f5d2cbe5SCathy Xu #define PINMUX_GPIO230__FUNC_GPIO230 (MTK_PIN_NO(230) | 0) 1430*f5d2cbe5SCathy Xu #define PINMUX_GPIO230__FUNC_CONN_TOP_CLK (MTK_PIN_NO(230) | 1) 1431*f5d2cbe5SCathy Xu 1432*f5d2cbe5SCathy Xu #define PINMUX_GPIO231__FUNC_GPIO231 (MTK_PIN_NO(231) | 0) 1433*f5d2cbe5SCathy Xu #define PINMUX_GPIO231__FUNC_CONN_TOP_DATA (MTK_PIN_NO(231) | 1) 1434*f5d2cbe5SCathy Xu 1435*f5d2cbe5SCathy Xu #define PINMUX_GPIO232__FUNC_GPIO232 (MTK_PIN_NO(232) | 0) 1436*f5d2cbe5SCathy Xu #define PINMUX_GPIO232__FUNC_CONN_HRST_B (MTK_PIN_NO(232) | 1) 1437*f5d2cbe5SCathy Xu 1438*f5d2cbe5SCathy Xu #define PINMUX_GPIO233__FUNC_GPIO233 (MTK_PIN_NO(233) | 0) 1439*f5d2cbe5SCathy Xu #define PINMUX_GPIO233__FUNC_I2SIN0_BCK (MTK_PIN_NO(233) | 1) 1440*f5d2cbe5SCathy Xu 1441*f5d2cbe5SCathy Xu #define PINMUX_GPIO234__FUNC_GPIO234 (MTK_PIN_NO(234) | 0) 1442*f5d2cbe5SCathy Xu #define PINMUX_GPIO234__FUNC_I2SIN0_LRCK (MTK_PIN_NO(234) | 1) 1443*f5d2cbe5SCathy Xu 1444*f5d2cbe5SCathy Xu #define PINMUX_GPIO235__FUNC_GPIO235 (MTK_PIN_NO(235) | 0) 1445*f5d2cbe5SCathy Xu #define PINMUX_GPIO235__FUNC_I2SIN0_DI (MTK_PIN_NO(235) | 1) 1446*f5d2cbe5SCathy Xu 1447*f5d2cbe5SCathy Xu #define PINMUX_GPIO236__FUNC_GPIO236 (MTK_PIN_NO(236) | 0) 1448*f5d2cbe5SCathy Xu #define PINMUX_GPIO236__FUNC_I2SOUT0_DO (MTK_PIN_NO(236) | 1) 1449*f5d2cbe5SCathy Xu 1450*f5d2cbe5SCathy Xu #define PINMUX_GPIO237__FUNC_GPIO237 (MTK_PIN_NO(237) | 0) 1451*f5d2cbe5SCathy Xu #define PINMUX_GPIO237__FUNC_CONN_UARTHUB_UART_TX (MTK_PIN_NO(237) | 1) 1452*f5d2cbe5SCathy Xu #define PINMUX_GPIO237__FUNC_UTXD3 (MTK_PIN_NO(237) | 3) 1453*f5d2cbe5SCathy Xu 1454*f5d2cbe5SCathy Xu #define PINMUX_GPIO238__FUNC_GPIO238 (MTK_PIN_NO(238) | 0) 1455*f5d2cbe5SCathy Xu #define PINMUX_GPIO238__FUNC_CONN_UARTHUB_UART_RX (MTK_PIN_NO(238) | 1) 1456*f5d2cbe5SCathy Xu #define PINMUX_GPIO238__FUNC_URXD3 (MTK_PIN_NO(238) | 3) 1457*f5d2cbe5SCathy Xu 1458*f5d2cbe5SCathy Xu #define PINMUX_GPIO239__FUNC_GPIO239 (MTK_PIN_NO(239) | 0) 1459*f5d2cbe5SCathy Xu #define PINMUX_GPIO239__FUNC_TP_UTXD_CONSYS_VLP (MTK_PIN_NO(239) | 1) 1460*f5d2cbe5SCathy Xu #define PINMUX_GPIO239__FUNC_TP_URXD_CONSYS_VLP (MTK_PIN_NO(239) | 2) 1461*f5d2cbe5SCathy Xu 1462*f5d2cbe5SCathy Xu #define PINMUX_GPIO240__FUNC_GPIO240 (MTK_PIN_NO(240) | 0) 1463*f5d2cbe5SCathy Xu #define PINMUX_GPIO240__FUNC_TP_URXD_CONSYS_VLP (MTK_PIN_NO(240) | 1) 1464*f5d2cbe5SCathy Xu #define PINMUX_GPIO240__FUNC_TP_UTXD_CONSYS_VLP (MTK_PIN_NO(240) | 2) 1465*f5d2cbe5SCathy Xu 1466*f5d2cbe5SCathy Xu #define PINMUX_GPIO241__FUNC_GPIO241 (MTK_PIN_NO(241) | 0) 1467*f5d2cbe5SCathy Xu #define PINMUX_GPIO241__FUNC_PCIE_PERSTN (MTK_PIN_NO(241) | 1) 1468*f5d2cbe5SCathy Xu 1469*f5d2cbe5SCathy Xu #define PINMUX_GPIO242__FUNC_GPIO242 (MTK_PIN_NO(242) | 0) 1470*f5d2cbe5SCathy Xu #define PINMUX_GPIO242__FUNC_PCIE_WAKEN (MTK_PIN_NO(242) | 1) 1471*f5d2cbe5SCathy Xu 1472*f5d2cbe5SCathy Xu #define PINMUX_GPIO243__FUNC_GPIO243 (MTK_PIN_NO(243) | 0) 1473*f5d2cbe5SCathy Xu #define PINMUX_GPIO243__FUNC_PCIE_CLKREQN (MTK_PIN_NO(243) | 1) 1474*f5d2cbe5SCathy Xu 1475*f5d2cbe5SCathy Xu #define PINMUX_GPIO244__FUNC_GPIO244 (MTK_PIN_NO(244) | 0) 1476*f5d2cbe5SCathy Xu #define PINMUX_GPIO244__FUNC_CONN_RST (MTK_PIN_NO(244) | 1) 1477*f5d2cbe5SCathy Xu 1478*f5d2cbe5SCathy Xu #define PINMUX_GPIO245__FUNC_GPIO245 (MTK_PIN_NO(245) | 0) 1479*f5d2cbe5SCathy Xu 1480*f5d2cbe5SCathy Xu #define PINMUX_GPIO246__FUNC_GPIO246 (MTK_PIN_NO(246) | 0) 1481*f5d2cbe5SCathy Xu #define PINMUX_GPIO246__FUNC_CONN_PTA_TXD0 (MTK_PIN_NO(246) | 1) 1482*f5d2cbe5SCathy Xu 1483*f5d2cbe5SCathy Xu #define PINMUX_GPIO247__FUNC_GPIO247 (MTK_PIN_NO(247) | 0) 1484*f5d2cbe5SCathy Xu #define PINMUX_GPIO247__FUNC_CONN_PTA_RXD0 (MTK_PIN_NO(247) | 1) 1485*f5d2cbe5SCathy Xu 1486*f5d2cbe5SCathy Xu #define PINMUX_GPIO248__FUNC_GPIO248 (MTK_PIN_NO(248) | 0) 1487*f5d2cbe5SCathy Xu #define PINMUX_GPIO248__FUNC_UCTS3 (MTK_PIN_NO(248) | 3) 1488*f5d2cbe5SCathy Xu 1489*f5d2cbe5SCathy Xu #define PINMUX_GPIO249__FUNC_GPIO249 (MTK_PIN_NO(249) | 0) 1490*f5d2cbe5SCathy Xu #define PINMUX_GPIO249__FUNC_URTS3 (MTK_PIN_NO(249) | 3) 1491*f5d2cbe5SCathy Xu 1492*f5d2cbe5SCathy Xu #define PINMUX_GPIO250__FUNC_GPIO250 (MTK_PIN_NO(250) | 0) 1493*f5d2cbe5SCathy Xu 1494*f5d2cbe5SCathy Xu #define PINMUX_GPIO251__FUNC_GPIO251 (MTK_PIN_NO(251) | 0) 1495*f5d2cbe5SCathy Xu #define PINMUX_GPIO251__FUNC_IDDIG_1P (MTK_PIN_NO(251) | 1) 1496*f5d2cbe5SCathy Xu 1497*f5d2cbe5SCathy Xu #define PINMUX_GPIO252__FUNC_GPIO252 (MTK_PIN_NO(252) | 0) 1498*f5d2cbe5SCathy Xu #define PINMUX_GPIO252__FUNC_USB_DRVVBUS_1P (MTK_PIN_NO(252) | 1) 1499*f5d2cbe5SCathy Xu 1500*f5d2cbe5SCathy Xu #define PINMUX_GPIO253__FUNC_GPIO253 (MTK_PIN_NO(253) | 0) 1501*f5d2cbe5SCathy Xu #define PINMUX_GPIO253__FUNC_VBUSVALID_1P (MTK_PIN_NO(253) | 1) 1502*f5d2cbe5SCathy Xu 1503*f5d2cbe5SCathy Xu #define PINMUX_GPIO254__FUNC_GPIO254 (MTK_PIN_NO(254) | 0) 1504*f5d2cbe5SCathy Xu #define PINMUX_GPIO254__FUNC_IDDIG_2P (MTK_PIN_NO(254) | 1) 1505*f5d2cbe5SCathy Xu 1506*f5d2cbe5SCathy Xu #define PINMUX_GPIO255__FUNC_GPIO255 (MTK_PIN_NO(255) | 0) 1507*f5d2cbe5SCathy Xu #define PINMUX_GPIO255__FUNC_USB_DRVVBUS_2P (MTK_PIN_NO(255) | 1) 1508*f5d2cbe5SCathy Xu 1509*f5d2cbe5SCathy Xu #define PINMUX_GPIO256__FUNC_GPIO256 (MTK_PIN_NO(256) | 0) 1510*f5d2cbe5SCathy Xu #define PINMUX_GPIO256__FUNC_VBUSVALID_2P (MTK_PIN_NO(256) | 1) 1511*f5d2cbe5SCathy Xu 1512*f5d2cbe5SCathy Xu #define PINMUX_GPIO257__FUNC_GPIO257 (MTK_PIN_NO(257) | 0) 1513*f5d2cbe5SCathy Xu #define PINMUX_GPIO257__FUNC_VBUSVALID_3P (MTK_PIN_NO(257) | 1) 1514*f5d2cbe5SCathy Xu 1515*f5d2cbe5SCathy Xu #define PINMUX_GPIO258__FUNC_GPIO258 (MTK_PIN_NO(258) | 0) 1516*f5d2cbe5SCathy Xu #define PINMUX_GPIO258__FUNC_AVB_CLK1 (MTK_PIN_NO(258) | 7) 1517*f5d2cbe5SCathy Xu 1518*f5d2cbe5SCathy Xu #define PINMUX_GPIO259__FUNC_GPIO259 (MTK_PIN_NO(259) | 0) 1519*f5d2cbe5SCathy Xu #define PINMUX_GPIO259__FUNC_GBE0_TXD0 (MTK_PIN_NO(259) | 1) 1520*f5d2cbe5SCathy Xu #define PINMUX_GPIO259__FUNC_GBE1_TXD0 (MTK_PIN_NO(259) | 2) 1521*f5d2cbe5SCathy Xu 1522*f5d2cbe5SCathy Xu #define PINMUX_GPIO260__FUNC_GPIO260 (MTK_PIN_NO(260) | 0) 1523*f5d2cbe5SCathy Xu #define PINMUX_GPIO260__FUNC_GBE0_TXD1 (MTK_PIN_NO(260) | 1) 1524*f5d2cbe5SCathy Xu #define PINMUX_GPIO260__FUNC_GBE1_TXD1 (MTK_PIN_NO(260) | 2) 1525*f5d2cbe5SCathy Xu 1526*f5d2cbe5SCathy Xu #define PINMUX_GPIO261__FUNC_GPIO261 (MTK_PIN_NO(261) | 0) 1527*f5d2cbe5SCathy Xu #define PINMUX_GPIO261__FUNC_GBE0_TXC (MTK_PIN_NO(261) | 1) 1528*f5d2cbe5SCathy Xu #define PINMUX_GPIO261__FUNC_GBE1_TXC (MTK_PIN_NO(261) | 2) 1529*f5d2cbe5SCathy Xu 1530*f5d2cbe5SCathy Xu #define PINMUX_GPIO262__FUNC_GPIO262 (MTK_PIN_NO(262) | 0) 1531*f5d2cbe5SCathy Xu #define PINMUX_GPIO262__FUNC_GBE0_TXEN (MTK_PIN_NO(262) | 1) 1532*f5d2cbe5SCathy Xu #define PINMUX_GPIO262__FUNC_GBE1_TXEN (MTK_PIN_NO(262) | 2) 1533*f5d2cbe5SCathy Xu 1534*f5d2cbe5SCathy Xu #define PINMUX_GPIO263__FUNC_GPIO263 (MTK_PIN_NO(263) | 0) 1535*f5d2cbe5SCathy Xu #define PINMUX_GPIO263__FUNC_GBE0_RXD0 (MTK_PIN_NO(263) | 1) 1536*f5d2cbe5SCathy Xu #define PINMUX_GPIO263__FUNC_GBE1_RXD0 (MTK_PIN_NO(263) | 2) 1537*f5d2cbe5SCathy Xu #define PINMUX_GPIO263__FUNC_GBE0_AUX_PPS0 (MTK_PIN_NO(263) | 3) 1538*f5d2cbe5SCathy Xu 1539*f5d2cbe5SCathy Xu #define PINMUX_GPIO264__FUNC_GPIO264 (MTK_PIN_NO(264) | 0) 1540*f5d2cbe5SCathy Xu #define PINMUX_GPIO264__FUNC_GBE0_RXD1 (MTK_PIN_NO(264) | 1) 1541*f5d2cbe5SCathy Xu #define PINMUX_GPIO264__FUNC_GBE1_RXD1 (MTK_PIN_NO(264) | 2) 1542*f5d2cbe5SCathy Xu #define PINMUX_GPIO264__FUNC_GBE0_AUX_PPS1 (MTK_PIN_NO(264) | 3) 1543*f5d2cbe5SCathy Xu 1544*f5d2cbe5SCathy Xu #define PINMUX_GPIO265__FUNC_GPIO265 (MTK_PIN_NO(265) | 0) 1545*f5d2cbe5SCathy Xu #define PINMUX_GPIO265__FUNC_GBE0_RXC (MTK_PIN_NO(265) | 1) 1546*f5d2cbe5SCathy Xu #define PINMUX_GPIO265__FUNC_GBE1_RXC (MTK_PIN_NO(265) | 2) 1547*f5d2cbe5SCathy Xu #define PINMUX_GPIO265__FUNC_GBE0_AUX_PPS2 (MTK_PIN_NO(265) | 3) 1548*f5d2cbe5SCathy Xu 1549*f5d2cbe5SCathy Xu #define PINMUX_GPIO266__FUNC_GPIO266 (MTK_PIN_NO(266) | 0) 1550*f5d2cbe5SCathy Xu #define PINMUX_GPIO266__FUNC_GBE0_RXDV (MTK_PIN_NO(266) | 1) 1551*f5d2cbe5SCathy Xu #define PINMUX_GPIO266__FUNC_GBE1_RXDV (MTK_PIN_NO(266) | 2) 1552*f5d2cbe5SCathy Xu #define PINMUX_GPIO266__FUNC_GBE0_AUX_PPS3 (MTK_PIN_NO(266) | 3) 1553*f5d2cbe5SCathy Xu 1554*f5d2cbe5SCathy Xu #define PINMUX_GPIO267__FUNC_GPIO267 (MTK_PIN_NO(267) | 0) 1555*f5d2cbe5SCathy Xu #define PINMUX_GPIO267__FUNC_GBE0_TXD2 (MTK_PIN_NO(267) | 1) 1556*f5d2cbe5SCathy Xu #define PINMUX_GPIO267__FUNC_GBE1_TXD2 (MTK_PIN_NO(267) | 2) 1557*f5d2cbe5SCathy Xu #define PINMUX_GPIO267__FUNC_GBE0_RXER (MTK_PIN_NO(267) | 3) 1558*f5d2cbe5SCathy Xu #define PINMUX_GPIO267__FUNC_GBE1_RXER (MTK_PIN_NO(267) | 4) 1559*f5d2cbe5SCathy Xu 1560*f5d2cbe5SCathy Xu #define PINMUX_GPIO268__FUNC_GPIO268 (MTK_PIN_NO(268) | 0) 1561*f5d2cbe5SCathy Xu #define PINMUX_GPIO268__FUNC_GBE0_TXD3 (MTK_PIN_NO(268) | 1) 1562*f5d2cbe5SCathy Xu #define PINMUX_GPIO268__FUNC_GBE1_TXD3 (MTK_PIN_NO(268) | 2) 1563*f5d2cbe5SCathy Xu 1564*f5d2cbe5SCathy Xu #define PINMUX_GPIO269__FUNC_GPIO269 (MTK_PIN_NO(269) | 0) 1565*f5d2cbe5SCathy Xu #define PINMUX_GPIO269__FUNC_GBE0_RXD2 (MTK_PIN_NO(269) | 1) 1566*f5d2cbe5SCathy Xu #define PINMUX_GPIO269__FUNC_GBE1_RXD2 (MTK_PIN_NO(269) | 2) 1567*f5d2cbe5SCathy Xu #define PINMUX_GPIO269__FUNC_GBE0_MDC (MTK_PIN_NO(269) | 3) 1568*f5d2cbe5SCathy Xu 1569*f5d2cbe5SCathy Xu #define PINMUX_GPIO270__FUNC_GPIO270 (MTK_PIN_NO(270) | 0) 1570*f5d2cbe5SCathy Xu #define PINMUX_GPIO270__FUNC_GBE0_RXD3 (MTK_PIN_NO(270) | 1) 1571*f5d2cbe5SCathy Xu #define PINMUX_GPIO270__FUNC_GBE1_RXD3 (MTK_PIN_NO(270) | 2) 1572*f5d2cbe5SCathy Xu #define PINMUX_GPIO270__FUNC_GBE0_MDIO (MTK_PIN_NO(270) | 3) 1573*f5d2cbe5SCathy Xu 1574*f5d2cbe5SCathy Xu #endif /* __MT8196_PINFUNC_H */ 1575