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/linux/lib/crypto/
H A Dblake2s.c19 static const u8 blake2s_sigma[10][16] = {
20 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
21 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 },
22 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 },
23 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 },
24 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 },
25 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 },
26 { 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11 },
27 { 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10 },
28 { 6, 15, 14, 9, 11, 3, 0, 8, 12, 2, 13, 7, 1, 4, 10, 5 },
[all …]
/linux/drivers/media/platform/verisilicon/
H A Drockchip_vpu2_hw_h264_dec.c28 #define VDPU_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument
30 #define VDPU_REG_DEC_ADV_PRE_DIS(v) ((v) ? BIT(11) : 0) argument
31 #define VDPU_REG_DEC_SCMD_DIS(v) ((v) ? BIT(10) : 0) argument
32 #define VDPU_REG_FILTERING_DIS(v) ((v) ? BIT(8) : 0) argument
33 #define VDPU_REG_PIC_FIXED_QUANT(v) ((v) ? BIT(7) : 0) argument
34 #define VDPU_REG_DEC_LATENCY(v) (((v) << 1) & GENMASK(6, 1)) argument
36 #define VDPU_REG_INIT_QP(v) (((v) << 25) & GENMASK(30, 25)) argument
37 #define VDPU_REG_STREAM_LEN(v) (((v) << 0) & GENMASK(23, 0)) argument
39 #define VDPU_REG_APF_THRESHOLD(v) (((v) << 17) & GENMASK(30, 17)) argument
40 #define VDPU_REG_STARTMB_X(v) (((v) << 8) & GENMASK(16, 8)) argument
[all …]
/linux/drivers/rtc/
H A Drtc-moxart.c150 (((tm->tm_year - 100) / 10) << 4) | in moxart_rtc_set_time()
151 ((tm->tm_year - 100) % 10)); in moxart_rtc_set_time()
154 (((tm->tm_mon + 1) / 10) << 4) | in moxart_rtc_set_time()
155 ((tm->tm_mon + 1) % 10)); in moxart_rtc_set_time()
158 ((tm->tm_mday / 10) << 4) | in moxart_rtc_set_time()
159 (tm->tm_mday % 10)); in moxart_rtc_set_time()
162 ((tm->tm_hour / 10) << 4) | in moxart_rtc_set_time()
163 (tm->tm_hour % 10)); in moxart_rtc_set_time()
166 ((tm->tm_min / 10) << 4) | in moxart_rtc_set_time()
167 (tm->tm_min % 10)); in moxart_rtc_set_time()
[all …]
/linux/lib/crypto/arm/
H A Dblake2s-core.S116 // Execute one round of BLAKE2s by updating the state matrix v[0..15]. v[0..9]
118 // spilling v[8..9], then to v[9..15], then to the message block. r10-r12 and
135 // (v[0], v[4], v[8], v[12]) and (v[1], v[5], v[9], v[13]).
136 __ldrd r10, r11, sp, 16 // load v[12] and v[13]
143 // (v[2], v[6], v[10], v[14]) and (v[3], v[7], v[11], v[15]).
144 __ldrd r8, r9, sp, 8 // load v[10] and v[11]
145 __ldrd r10, r11, sp, 24 // load v[14] and v[15]
148 str r10, [sp, #24] // store v[14]
149 // v[10], v[11], and v[15] are used below, so no need to store them yet.
155 // (v[0], v[5], v[10], v[15]) and (v[1], v[6], v[11], v[12]).
[all …]
/linux/arch/alpha/kernel/
H A Dentry.S152 .cfi_rel_offset $10, 8
163 .cfi_restore $10
200 stq $10, 8($sp)
207 .cfi_rel_offset $10, 8
220 ldq $10, 8($sp)
228 .cfi_restore $10
266 stq $10, 80($sp)
294 .cfi_rel_offset $10, 10*8
325 ldq $10, 80($sp)
353 .cfi_restore $10
[all …]
/linux/arch/arm/crypto/
H A Dblake2b-neon-core.S63 // Execute one round of BLAKE2b by updating the state matrix v[0..15] in the
73 // (v[0], v[4], v[8], v[12]), (v[1], v[5], v[9], v[13]),
74 // (v[2], v[6], v[10], v[14]), and (v[3], v[7], v[11], v[15]).
145 // (v[0], v[5], v[10], v[15]), (v[1], v[6], v[11], v[12]),
146 // (v[2], v[7], v[8], v[13]), and (v[3], v[4], v[9], v[14]).
274 // 'v'. Fortunately, there are exactly enough NEON registers to fit the
285 veor q6, q6, q14 // v[12..13] = IV[4..5] ^ t[0..1]
287 veor q7, q7, q15 // v[14..15] = IV[6..7] ^ f[0..1]
295 _blake2b_round 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
296 _blake2b_round 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3
[all …]
/linux/tools/testing/selftests/net/forwarding/
H A Dip6gre_lib.sh31 # | v |
33 # | | 2001:db8:10::1/64 |
47 # | ^ 2001:db8:10::2/64 |
58 # | VRF v$ol2 | 2001:db8:2::2/64 |
89 # | | VRF v$ol1 | | |
93 # | | VRF v$ul1 | | |
95 # | | v | |
100 # | | v | |
102 # | | | 2001:db8:10::1/64 | |
118 # | | + 2001:db8:10::2/64 | |
[all …]
H A Drouter_bridge_vlan_upper_pvid.sh6 # | + $h1.10 | +----------------------+
19 # | + br1.10 |
40 vlan_create $h1 10 v$h1 192.0.2.1/28 2001:db8:1::1/64
41 ip -4 route add 192.0.2.128/28 vrf v$h1 nexthop via 192.0.2.2
42 ip -6 route add 2001:db8:2::/64 vrf v$h1 nexthop via 2001:db8:1::2
47 ip -6 route del 2001:db8:2::/64 vrf v$h1
48 ip -4 route del 192.0.2.128/28 vrf v$h1
49 vlan_destroy $h1 10
56 ip -4 route add 192.0.2.0/28 vrf v$h2 nexthop via 192.0.2.129
57 ip -6 route add 2001:db8:1::/64 vrf v$h2 nexthop via 2001:db8:2::1
[all …]
H A Drouter_bridge_pvid_vlan_upper.sh6 # | + $h1.10 | +----------------------+
16 # | | + $swp1 BR1 (802.1q, pvid=10) | 192.0.2.129/28 |
35 vlan_create $h1 10 v$h1 192.0.2.1/28 2001:db8:1::1/64
36 ip -4 route add 192.0.2.128/28 vrf v$h1 nexthop via 192.0.2.2
37 ip -6 route add 2001:db8:2::/64 vrf v$h1 nexthop via 2001:db8:1::2
42 ip -6 route del 2001:db8:2::/64 vrf v$h1
43 ip -4 route del 192.0.2.128/28 vrf v$h1
44 vlan_destroy $h1 10
51 ip -4 route add 192.0.2.0/28 vrf v$h2 nexthop via 192.0.2.129
52 ip -6 route add 2001:db8:1::/64 vrf v$h2 nexthop via 2001:db8:2::1
[all …]
H A Dip6gre_custom_multipath_hash.sh27 # | v |
29 # | | 2001:db8:10::1/64 |
35 # | 2001:db8:10::2/64 | |
84 NUM_NETIFS=10
90 ip route add vrf v$h1 default via 198.51.100.1 dev $h1
91 ip -6 route add vrf v$h1 default via 2001:db8:1::1 dev $h1
96 ip -6 route del vrf v$h1 default
97 ip route del vrf v$h1 default
104 __simple_if_init $ul1 v$ol1 2001:db8:10
[all...]
/linux/tools/testing/selftests/bpf/progs/
H A Diters.c18 __uint(max_entries, 10);
34 int *v, i = zero; /* obscure initial value of i */ in iter_err_unsafe_c_loop() local
39 while ((v = bpf_iter_num_next(&it))) { in iter_err_unsafe_c_loop()
96 int *v; in iter_while_loop() local
101 while ((v = bpf_iter_num_next(&it))) { in iter_while_loop()
102 bpf_printk("ITER_BASIC: E1 VAL: v=%d", *v); in iter_while_loop()
114 int *v; in iter_while_loop_auto_cleanup() local
119 while ((v = bpf_iter_num_next(&it))) { in iter_while_loop_auto_cleanup()
120 bpf_printk("ITER_BASIC: E1 VAL: v=%d", *v); in iter_while_loop_auto_cleanup()
132 int *v; in iter_for_loop() local
[all …]
H A Diters_num.c66 const volatile __s64 exp_simple_sum = 9 * 10 / 2;
74 bpf_for(i, 0, 10) sum += i; in num_simple_sum()
80 const volatile __s64 exp_neg_sum = -11 * 10 / 2;
88 bpf_for(i, -10, 0) sum += i; in num_neg_sum()
150 const volatile __s64 exp_max_range = 0 + 10;
158 res_max_range = 10 + bpf_iter_num_new(&it, 0, BPF_MAX_LOOPS); in num_max_range()
178 const volatile __s64 exp_succ_elem_cnt = 10;
185 int cnt = 0, *v; in num_succ_elem_cnt() local
187 bpf_iter_num_new(&it, 0, 10); in num_succ_elem_cnt()
188 while ((v = bpf_iter_num_next(&it))) { in num_succ_elem_cnt()
[all …]
/linux/drivers/bcma/
H A Ddriver_pci.c36 u32 v; in bcma_pcie_mdio_set_phy() local
39 v = BCMA_CORE_PCI_MDIODATA_START; in bcma_pcie_mdio_set_phy()
40 v |= BCMA_CORE_PCI_MDIODATA_WRITE; in bcma_pcie_mdio_set_phy()
41 v |= (BCMA_CORE_PCI_MDIODATA_DEV_ADDR << in bcma_pcie_mdio_set_phy()
43 v |= (BCMA_CORE_PCI_MDIODATA_BLK_ADDR << in bcma_pcie_mdio_set_phy()
45 v |= BCMA_CORE_PCI_MDIODATA_TA; in bcma_pcie_mdio_set_phy()
46 v |= (phy << 4); in bcma_pcie_mdio_set_phy()
47 pcicore_write32(pc, BCMA_CORE_PCI_MDIO_DATA, v); in bcma_pcie_mdio_set_phy()
49 udelay(10); in bcma_pcie_mdio_set_phy()
51 v = pcicore_read32(pc, BCMA_CORE_PCI_MDIO_CONTROL); in bcma_pcie_mdio_set_phy()
[all …]
/linux/Documentation/hwmon/
H A Dmc13783-adc.rst29 Among other things they contain a 10-bit A/D converter. The converter has 16
47 0 Battery Voltage (BATT) 2.50 - 4.65V -2.40V
49 2 Application Supply (BP) 2.50 - 4.65V -2.40V
50 3 Charger Voltage (CHRGRAW) 0 - 10V / /5
51 0 - 20V /10
52 4 Charger Current (CHRGISNSP-CHRGISNSN) -0.25 - 0.25V x4
53 5 General Purpose ADIN5 / Battery Pack Thermistor 0 - 2.30V No
54 6 General Purpose ADIN6 / Backup Voltage (LICELL) 0 - 2.30V / No /
55 1.50 - 3.50V -1.20V
56 7 General Purpose ADIN7 / UID / Die Temperature 0 - 2.30V / No /
[all …]
/linux/include/linux/platform_data/
H A Dad5761.h13 * @AD5761_VOLTAGE_RANGE_M10V_10V: -10V to 10V
14 * @AD5761_VOLTAGE_RANGE_0V_10V: 0V to 10V
15 * @AD5761_VOLTAGE_RANGE_M5V_5V: -5V to 5V
16 * @AD5761_VOLTAGE_RANGE_0V_5V: 0V to 5V
17 * @AD5761_VOLTAGE_RANGE_M2V5_7V5: -2.5V to 7.5V
18 * @AD5761_VOLTAGE_RANGE_M3V_3V: -3V to 3V
19 * @AD5761_VOLTAGE_RANGE_0V_16V: 0V to 16V
20 * @AD5761_VOLTAGE_RANGE_0V_20V: 0V to 20V
/linux/drivers/media/platform/sunxi/sun6i-csi/
H A Dsun6i_csi_reg.h18 #define SUN6I_CSI_EN_PTN_CYCLE(v) (((v) << 16) & GENMASK(23, 16)) argument
29 #define SUN6I_CSI_IF_CFG_FIELD_DT_PCLK_SHIFT(v) (((v) << 24) & GENMASK(27, 24)) argument
57 #define SUN6I_CSI_CAP_MASK(v) (((v) << 2) & GENMASK(5, 2)) argument
70 #define SUN6I_CSI_CH_CFG_PAD_VAL(v) (((v) << 24) & GENMASK(31, 24)) argument
71 #define SUN6I_CSI_CH_CFG_INPUT_FMT(v) (((v) << 20) & GENMASK(23, 20)) argument
72 #define SUN6I_CSI_CH_CFG_OUTPUT_FMT(v) (((v) << 16) & GENMASK(19, 16)) argument
75 #define SUN6I_CSI_CH_CFG_FIELD_SEL_FIELD0 (0 << 10)
76 #define SUN6I_CSI_CH_CFG_FIELD_SEL_FIELD1 (1 << 10)
77 #define SUN6I_CSI_CH_CFG_FIELD_SEL_EITHER (2 << 10)
78 #define SUN6I_CSI_CH_CFG_INPUT_YUV_SEQ(v) (((v) << 8) & GENMASK(9, 8)) argument
[all …]
/linux/drivers/staging/media/sunxi/cedrus/
H A Dcedrus_regs.h13 #define SHIFT_AND_MASK_BITS(v, h, l) \ argument
14 (((unsigned long)(v) << (l)) & GENMASK(h, l))
101 SHIFT_AND_MASK_BITS(p, 11, 10)
104 #define VE_DEC_MPEG_MP12HDR_TOP_FIELD_FIRST(v) \ argument
105 ((v) ? BIT(7) : 0)
106 #define VE_DEC_MPEG_MP12HDR_FRAME_PRED_FRAME_DCT(v) \ argument
107 ((v) ? BIT(6) : 0)
108 #define VE_DEC_MPEG_MP12HDR_CONCEALMENT_MOTION_VECTORS(v) \ argument
109 ((v) ? BIT(5) : 0)
110 #define VE_DEC_MPEG_MP12HDR_Q_SCALE_TYPE(v) \ argument
[all …]
/linux/lib/crypto/arm64/
H A Dsha1-ce-core.S36 add t1.4s, v\s0\().4s, \rc\().4s
45 add t0.4s, v\s0\().4s, \rc\().4s
53 sha1su0 v\s0\().4s, v\s1\().4s, v\s2\().4s
55 sha1su1 v\s0\().4s, v\s3\().4s
91 add_update c, ev, k0, 8, 9, 10, 11, dgb
92 add_update c, od, k0, 9, 10, 11, 8
93 add_update c, ev, k0, 10, 11, 8, 9
94 add_update c, od, k0, 11, 8, 9, 10
95 add_update c, ev, k1, 8, 9, 10, 11
97 add_update p, od, k1, 9, 10, 11, 8
[all …]
/linux/arch/powerpc/kernel/
H A Dalign.c50 { 8, LD }, /* 0 00 10: evldh[x] */
54 { 2, LD }, /* 0 01 10: evlhhousplat[x] */
56 { 4, LD }, /* 0 10 00: evlwhe[x] */
57 INVALID, /* 0 10 01 */
58 { 4, LD }, /* 0 10 10: evlwhou[x] */
59 { 4, LD+SE }, /* 0 10 11: evlwhos[x] */
62 { 4, LD }, /* 0 11 10: evlwhsplat[x] */
67 { 8, ST }, /* 1 00 10: evstdh[x] */
71 INVALID, /* 1 01 10 */
73 { 4, ST }, /* 1 10 00: evstwhe[x] */
[all …]
/linux/net/x25/
H A Dx25_proc.c12 * 2002/10/06 Arnaldo Carvalho de Melo seq_file support
32 static void *x25_seq_route_next(struct seq_file *seq, void *v, loff_t *pos) in x25_seq_route_next() argument
34 return seq_list_next(v, &x25_route_list, pos); in x25_seq_route_next()
37 static void x25_seq_route_stop(struct seq_file *seq, void *v) in x25_seq_route_stop() argument
43 static int x25_seq_route_show(struct seq_file *seq, void *v) in x25_seq_route_show() argument
45 struct x25_route *rt = list_entry(v, struct x25_route, node); in x25_seq_route_show()
47 if (v == &x25_route_list) { in x25_seq_route_show()
52 rt = v; in x25_seq_route_show()
67 static void *x25_seq_socket_next(struct seq_file *seq, void *v, loff_t *pos) in x25_seq_socket_next() argument
69 return seq_hlist_next(v, &x25_list, pos); in x25_seq_socket_next()
[all …]
/linux/drivers/net/ethernet/sfc/falcon/
H A Dfalcon_boards.c309 /* Turn on 1.2V, 2.5V, 3.3V and 5V power rails */ in sfe4001_poweron()
319 msleep(10); in sfe4001_poweron()
321 /* Turn on 1V power rail */ in sfe4001_poweron()
338 for (j = 0; j < 10; ++j) { in sfe4001_poweron()
509 LM87_IN_LIMITS(0, 0x7c, 0x99), /* 2.5V: 1.8V +/- 10% */
510 LM87_IN_LIMITS(1, 0x4c, 0x5e), /* Vccp1: 1.2V +/- 10% */
511 LM87_IN_LIMITS(2, 0xac, 0xd4), /* 3.3V: 3.3V +/- 10% */
512 LM87_IN_LIMITS(3, 0xac, 0xd4), /* 5V: 5.0V +/- 10% */
513 LM87_IN_LIMITS(4, 0xac, 0xe0), /* 12V: 10.8-14V */
514 LM87_IN_LIMITS(5, 0x3f, 0x4f), /* Vccp2: 1.0V +/- 10% */
[all …]
/linux/drivers/net/ethernet/chelsio/cxgb3/
H A Daq100x.c97 unsigned int v; in aq100x_intr_clear() local
99 t3_mdio_read(phy, MDIO_MMD_VEND1, AQ_IFLAG_GLOBAL, &v); in aq100x_intr_clear()
100 t3_mdio_read(phy, MDIO_MMD_PMAPMD, MDIO_STAT1, &v); in aq100x_intr_clear()
108 unsigned int cause, v; in aq100x_intr_handler() local
115 t3_mdio_read(phy, MDIO_MMD_PMAPMD, MDIO_STAT1, &v); in aq100x_intr_handler()
158 /* 10G advertisement */ in aq100x_advertise()
211 unsigned int v; in aq100x_get_link_status() local
214 err = t3_mdio_read(phy, MDIO_MMD_PMAPMD, AQ_LINK_STAT, &v); in aq100x_get_link_status()
218 *link_ok = v & 1; in aq100x_get_link_status()
223 err = t3_mdio_read(phy, MDIO_MMD_AN, AQ_ANEG_STAT, &v); in aq100x_get_link_status()
[all …]
/linux/arch/x86/include/asm/
H A Dperf_event_p4.h40 #define P4_ESCR_EVENT(v) ((v) << P4_ESCR_EVENT_SHIFT) argument
41 #define P4_ESCR_EMASK(v) ((v) << P4_ESCR_EVENTMASK_SHIFT) argument
42 #define P4_ESCR_TAG(v) ((v) << P4_ESCR_TAG_SHIFT) argument
62 #define P4_CCCR_THRESHOLD(v) ((v) << P4_CCCR_THRESHOLD_SHIFT) argument
63 #define P4_CCCR_ESEL(v) ((v) << P4_CCCR_ESCR_SELECT_SHIFT) argument
81 #define p4_config_pack_escr(v) (((u64)(v)) << 32) argument
82 #define p4_config_pack_cccr(v) (((u64)(v)) & 0xffffffffULL) argument
83 #define p4_config_unpack_escr(v) (((u64)(v)) >> 32) argument
84 #define p4_config_unpack_cccr(v) (((u64)(v)) & 0xffffffffULL) argument
86 #define p4_config_unpack_emask(v) \ argument
[all …]
/linux/drivers/media/platform/nxp/
H A Dimx-pxp.h19 #define BF_PXP_CTRL_SFTRST(v) \ argument
20 (((v) << 31) & BM_PXP_CTRL_SFTRST)
22 #define BF_PXP_CTRL_CLKGATE(v) \ argument
23 (((v) << 30) & BM_PXP_CTRL_CLKGATE)
25 #define BF_PXP_CTRL_RSVD4(v) \ argument
26 (((v) << 29) & BM_PXP_CTRL_RSVD4)
28 #define BF_PXP_CTRL_EN_REPEAT(v) \ argument
29 (((v) << 28) & BM_PXP_CTRL_EN_REPEAT)
31 #define BF_PXP_CTRL_ENABLE_ROTATE1(v) \ argument
32 (((v) << 27) & BM_PXP_CTRL_ENABLE_ROTATE1)
[all …]
/linux/drivers/comedi/drivers/
H A Dpcl818.c41 * [3] - 0, 10=10MHz clock for 8254
43 * [4] - 0, 5=A/D input -5V.. +5V
44 * 1, 10=A/D input -10V..+10V
45 * [5] - 0, 5=D/A output 0-5V (internal reference -5V)
46 * 1, 10=D/A output 0-10V (internal reference -10V)
53 * [3] - 0, 10=10MHz clock for 8254
55 * [4] - 0, 5=D/A output 0-5V (internal reference -5V)
56 * 1, 10=D/A output 0-10V (internal reference -10V)
64 * [3] - 0, 10=10MHz clock for 8254
66 * [4] - 0, 5=D/A output 0-5V (internal reference -5V)
[all …]

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