/freebsd/share/man/man3/ |
H A D | bitstring.3 | 9 .\" 1. Redistributions of source code must retain the above copyright 36 .\" 1. Redistributions of source code must retain the above copyright 82 .Nd bit-string manipulation functions and macros 169 clear or set the zero-based numbered bit 179 set or clear the zero-based numbered bits from 189 evaluates to non-zero if the zero-based numbered bit 198 evaluates to non-zero if the zero-based numbered bits from 211 the zero-based number of the first bit not set in the array of 217 is set to \-1. 224 the zero-based number of the first bit set in the array of [all …]
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/freebsd/share/man/man4/ |
H A D | cc_cdg.4 | 8 .\" 1. Redistributions of source code must retain the above copyright 33 CAIA-Delay Gradient (CDG) is a hybrid congestion control algorithm which reacts 35 It attempts to operate as a delay-based algorithm where possible, but utilises 36 heuristics to detect loss-based TCP cross traffic and will compete effectively 41 During delay-based operation, CDG uses a delay-gradient based probabilistic 44 During loss-based operation, CDG essentially reverts to 45 .Xr cc_newreno 4 Ns - Ns like 48 CDG switches to loss-based operation when it detects that a configurable number 49 of consecutive delay-based backoffs have had no measurable effect. 50 It periodically attempts to return to delay-based operation, but will keep [all …]
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H A D | cxgbev.4 | 1 .\" Copyright (c) 2011-2016, Chelsio Inc 7 .\" 1. Redistributions of source code must retain the above copyright notice, 37 .Nd "Chelsio T4-, T5-, and T6-based 100Gb, 40Gb, 25Gb, 10Gb, and 1Gb Ethernet VF driver" 42 .Bd -ragged -offset indent 50 .Bd -literal -offset indent 57 based on the Chelsio Terminator 4, Terminator 5, and Terminator 6 ASICs 69 driver uses different names for devices based on the associated ASIC: 70 .Bl -column -offset indent "ASIC" "Port Name" 93 based on the T6 ASIC: 95 .Bl -bullet -compact [all …]
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/freebsd/sys/contrib/device-tree/Bindings/arm/ |
H A D | fsl.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Shawn Guo <shawnguo@kernel.org> 17 - description: i.MX1 based Boards 19 - enum: 20 - armadeus,imx1-apf9328 21 - fsl,imx1ads 22 - const: fsl,imx1 24 - description: i.MX23 based Boards [all …]
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/freebsd/sys/contrib/device-tree/Bindings/pci/ |
H A D | brcm,iproc-pcie.txt | 4 - compatible: 5 "brcm,iproc-pcie" for the first generation of PAXB based controller, 7 "brcm,iproc-pcie-paxb-v2" for the second generation of PAXB-based 9 "brcm,iproc-pcie-paxc" for the first generation of PAXC based 11 "brcm,iproc-pcie-paxc-v2" for the second generation of PAXC based 13 PAXB-based root complex is used for external endpoint devices. PAXC-based 15 - reg: base address and length of the PCIe controller I/O register space 16 - #interrupt-cells: set to <1> 17 - interrupt-map-mask and interrupt-map, standard PCI properties to define the 19 - linux,pci-domain: PCI domain ID. Should be unique for each host controller [all …]
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/freebsd/usr.bin/clang/llvm-profdata/ |
H A D | llvm-profdata.1 | 4 .nr rst2man-indent-level 0 7 \\$1 \\n[an-margin] 8 level \\n[rst2man-indent-level] 9 level margin: \\n[rst2man-indent\\n[rst2man-indent-level]] 10 - 11 \\n[rst2man-indent0] 12 \\n[rst2man-indent1] 13 \\n[rst2man-indent2] 17 . RS \\$1 18 . nr rst2man-indent\\n[rst2man-indent-level] \\n[an-margin] [all …]
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/freebsd/sys/contrib/device-tree/Bindings/arm/stm32/ |
H A D | stm32.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Alexandre Torgue <alexandre.torgue@foss.st.com> 17 - description: emtrion STM32MP1 Argon based Boards 19 - const: emtrion,stm32mp157c-emsbc-argon 20 - const: emtrion,stm32mp157c-emstamp-argon 21 - const: st,stm32mp157 22 - items: 23 - enum: [all …]
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/freebsd/sys/netinet/cc/ |
H A D | cc_chd.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 4 * Copyright (c) 2009-2010 6 * Copyright (c) 2010-2011 The FreeBSD Foundation 21 * 1. Redistributions of source code must retain the above copyright 41 * An implementation of the CAIA-Hamilton delay based congestion control 42 * algorithm, based on "Improved coexistence and loss tolerance for delay based 45 * 11-14 October 2010. 84 * Private signal type for rate based congestion signal. 85 * See <netinet/cc.h> for appropriate bit-range to use for private signals. [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/silvermont/ |
H A D | pipeline.json | 4 "Counter": "0,1", 7 "PEBS": "1", 8 …ction. This unit predicts the target address not only based on the EIP of the branch but also base… 13 "Counter": "0,1", 17 "PEBScounters": "0,1", 18 …ction. This unit predicts the target address not only based on the EIP of the branch but also base… 24 "Counter": "0,1", 27 "PEBS": "1", 28 …ction. This unit predicts the target address not only based on the EIP of the branch but also base… 34 "Counter": "0,1", [all …]
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/freebsd/contrib/llvm-project/llvm/include/llvm/TextAPI/ |
H A D | FileTypes.h | 1 //===- llvm/TextAPI/FileTypes.h - TAPI Interface File -----------*- C++ -*-===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 20 MachO_DynamicLibrary = 1U << 0, 23 MachO_DynamicLibrary_Stub = 1U << 1, 26 MachO_Bundle = 1U << 2, 28 /// Text-based stub file (.tbd) version 1.0 29 TBD_V1 = 1U << 3, 31 /// Text-based stub file (.tbd) version 2.0 32 TBD_V2 = 1U << 4, [all …]
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/freebsd/lib/libutil/ |
H A D | login_class.3 | 7 .\" 1. Redistributions of source code must retain the above copyright 52 for system daemons based on login classes. 64 process priorities) based on values for a specific named class. 68 function sets class context values based on a given login_cap_t 72 Each of these actions is selectable via bit-flags passed 76 .Bl -tag -width LOGIN_SETLOGINCLASS 100 Set resource limits for the current process based on values 102 Class capability tags used, with and without -cur (soft limit) 103 or -max (hard limit) suffixes and the corresponding resource 105 .Bd -literal [all …]
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/freebsd/sys/contrib/edk2/Include/Library/ |
H A D | PrintLib.h | 5 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR> 6 SPDX-License-Identifier: BSD-2-Clause-Patent 15 - '\\r' is translated to '\\r' 16 - '\\r\\n' is translated to '\\r\\n' 17 - '\\n' is translated to '\\r\\n' 18 - '\\n\\r' is translated to '\\r\\n' 28 - - 29 - The field is left justified. If not flag is not specified, then the 31 - space 32 - Prefix a space character to a number. Only valid for types X, x, and d. [all …]
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/freebsd/sys/dev/smartpqi/ |
H A D | smartpqi_main.c | 1 /*- 2 * Copyright 2016-2023 Microchip Technology, Inc. and/or its subsidiaries. 7 * 1. Redistributions of source code must retain the above copyright 47 /* (MSCC PM8205 8x12G based) */ 48 {0x9005, 0x028f, 0x103c, 0x600, PQI_HWIF_SRCV, "P408i-p SR Gen10"}, 49 {0x9005, 0x028f, 0x103c, 0x601, PQI_HWIF_SRCV, "P408e-p SR Gen10"}, 50 {0x9005, 0x028f, 0x103c, 0x602, PQI_HWIF_SRCV, "P408i-a SR Gen10"}, 51 {0x9005, 0x028f, 0x103c, 0x603, PQI_HWIF_SRCV, "P408i-c SR Gen10"}, 52 {0x9005, 0x028f, 0x1028, 0x1FE0, PQI_HWIF_SRCV, "SmartRAID 3162-8i/eDell"}, 53 {0x9005, 0x028f, 0x9005, 0x608, PQI_HWIF_SRCV, "SmartRAID 3162-8i/e"}, [all …]
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/freebsd/sys/contrib/device-tree/Bindings/spi/ |
H A D | brcm,bcm63xx-hsspi.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/spi/brcm,bcm63xx-hsspi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - William Zhang <william.zhang@broadcom.com> 11 - Kursad Oney <kursad.oney@broadcom.com> 12 - Jonas Gorski <jonas.gorski@gmail.com> 16 early MIPS based chips such as BCM6328 and BCM63268. This initial rev 1.0 17 controller was carried over to recent ARM based chips, such as BCM63138, 18 BCM4908 and BCM6858. The old MIPS based chip should continue to use the [all …]
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H A D | qcom,spi-geni-qcom.txt | 1 GENI based Qualcomm Universal Peripheral (QUP) Serial Peripheral Interface (SPI) 3 The QUP v3 core is a GENI based AHB slave that provides a common data path 5 mini-core. 11 - compatible: Must contain "qcom,geni-spi". 12 - reg: Must contain SPI register location and length. 13 - interrupts: Must contain SPI controller interrupts. 14 - clock-names: Must contain "se". 15 - clocks: Serial engine core clock needed by the device. 16 - #address-cells: Must be <1> to define a chip select address on 18 - #size-cells: Must be <0>. [all …]
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/freebsd/contrib/llvm-project/clang/lib/Driver/ToolChains/Arch/ |
H A D | RISCV.cpp | 1 //===--- RISCV.cpp - RISC-V Helpers for Tools -------------------*- C++ -*-===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 45 for (const std::string &Str : (*ISAInfo)->toFeatures(/*AddAllExtension=*/true, in getArchFeatures() 68 << A->getSpelling() << Mcpu; in getRISCFeaturesFromMcpu() 86 StringRef CPU = A->getValue(); in getRISCVTargetFeatures() 98 // Handle features corresponding to "-ffixed-X" options in getRISCVTargetFeatures() 100 Features.push_back("+reserve-x1"); in getRISCVTargetFeatures() 102 Features.push_back("+reserve-x2"); in getRISCVTargetFeatures() 104 Features.push_back("+reserve-x3"); in getRISCVTargetFeatures() [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/amdzen1/ |
H A D | floating-point.json | 5 "BriefDescription": "Total number multi-pipe uOps assigned to all pipes.", 6 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F… 12 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 3.", 13 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F… 19 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 2.", 20 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F… 26 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 1.", 27 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F… 33 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 0.", 34 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F… [all …]
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/freebsd/sys/contrib/device-tree/Bindings/arm/freescale/ |
H A D | fsl,scu.txt | 2 -------------------------------------------------------------------- 4 The System Controller Firmware (SCFW) is a low-level system function 5 which runs on a dedicated Cortex-M core to provide power, clock, and 9 The AP communicates with the SC using a multi-ported MU module found 22 ------------------- 23 - compatible: should be "fsl,imx-scu". 24 - mbox-names: should include "tx0", "tx1", "tx2", "tx3", 27 - mboxes: List of phandle of 4 MU channels for tx, 4 MU channels for 28 rx, and 1 optional MU channel for general interrupt. 36 Channel 1 must be "tx1" or "rx1". [all …]
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/freebsd/sys/contrib/openzfs/tests/zfs-tests/tests/functional/cli_root/zpool_add/ |
H A D | zpool_add_006_pos.ksh | 1 #!/bin/ksh -p 10 # or https://opensource.org/licenses/CDDL-1.0. 37 # Adding a large number of file based vdevs to a zpool works. 40 # 1. Create a file based pool. 41 # 2. Add 16 file based vdevs to it. 42 # 3. Attempt to add a file based vdev that's too small; verify failure. 50 rm -rf $TESTDIR 53 log_assert "Adding a large number of file based vdevs to a zpool works." 56 log_must mkdir -p $TESTDIR 57 log_must truncate -s $MINVDEVSIZE $TESTDIR/file.00 [all …]
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/freebsd/contrib/llvm-project/llvm/lib/TargetParser/ |
H A D | X86TargetParser.cpp | 1 //===-- X86TargetParser - Parser for X86 features ---------------*- C++ -*-===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 11 //===----------------------------------------------------------------------===// 67 // Basic 64-bit capable CPU. 247 // 1. Copy the mangling from the original CPU_SPEICIFC MACROs. If no, assign 250 // listed here before, which means it doesn't support -march, -mtune and so on. 252 // cpu_dispatch/specific() feature and -march, -mtune, and so on. 253 // clang-format off 258 // i386-generation processors. [all …]
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/freebsd/sbin/routed/ |
H A D | radix.h | 1 /*- 2 * SPDX-License-Identifier: BSD-3-Clause 10 * 1. Redistributions of source code must retain the above copyright 45 short rn_b; /* bit offset; -1-index(netmask) */ 48 #define RNF_NORMAL 1 /* leaf contains normal route */ 82 short rm_b; /* bit offset; -1-index(netmask) */ 99 rn_mkfreelist = (m)->rm_mklist; \ 103 #define MKFree(m) { (m)->rm_mklist = rn_mkfreelist; rn_mkfreelist = (m);} 109 struct radix_node *(*rnh_addaddr) /* add based on sockaddr */ 112 struct radix_node *(*rnh_addpkt) /* add based on packet hdr */ [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/goldmont/ |
H A D | frontend.json | 4 "CollectPEBSRecord": "1", 5 "Counter": "0,1,2,3", 14 "CollectPEBSRecord": "1", 15 "Counter": "0,1,2,3", 24 "CollectPEBSRecord": "1", 25 "Counter": "0,1,2,3", 34 "CollectPEBSRecord": "1", 35 "Counter": "0,1,2,3", 43 …nces per ICache line. This event counts differently than Intel processors based on Silvermont micr… 44 "CollectPEBSRecord": "1", [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/goldmontplus/ |
H A D | frontend.json | 4 "CollectPEBSRecord": "1", 5 "Counter": "0,1,2,3", 9 "PEBScounters": "0,1,2,3", 16 "CollectPEBSRecord": "1", 17 "Counter": "0,1,2,3", 21 "PEBScounters": "0,1,2,3", 28 "CollectPEBSRecord": "1", 29 "Counter": "0,1,2,3", 33 "PEBScounters": "0,1,2,3", 40 "CollectPEBSRecord": "1", [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyInstrFormats.td | 1 //=- WebAssemblyInstrFormats.td - WebAssembly Instr. Formats -*- tablegen -*-=// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 12 //===----------------------------------------------------------------------===// 15 // We instantiate 2 of these for every actual instruction (register based 16 // and stack based), see below. 28 // e.g. the disassembler use case) prefer the one where IsCanonical == 1. 34 string asmstr = "", bits<32> inst = -1, bit is64 = false> 42 // Generates both register and stack based versions of one actual instruction. 44 // based version of this instruction, as well as the corresponding asmstr. [all …]
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/freebsd/crypto/openssh/ |
H A D | ssh-keysign.8 | 1 .\" $OpenBSD: ssh-keysign.8,v 1.18 2024/06/17 08:30:29 djm Exp $ 8 .\" 1. Redistributions of source code must retain the above copyright 29 .Nm ssh-keysign 30 .Nd OpenSSH helper for host-based authentication 36 .Xr ssh 1 38 required during host-based authentication. 51 .Xr ssh 1 . 53 .Xr ssh 1 56 for more information about host-based authentication. 58 .Bl -tag -width Ds -compact [all …]
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