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/freebsd/sys/contrib/ncsw/integrations/fman_ctrl_code/
H A Dp3041_r1.0.h37 @File all_img_P3041_r1.0.h
39 @Description U-code image for CC_HC_IM for P3041_r1.0. Image ID is: rel_101_8
47 0xb7ff000e \
48 , 0x00650008 \
49 , 0xb7ff0021 \
50 , 0xffffffff \
51 , 0xb7ff001f \
52 , 0xffffffff \
53 , 0xb7ff003a \
54 , 0xffffffff \
[all …]
/freebsd/sys/contrib/dev/rtw89/
H A Drtw8852b_rfk_table.c8 RTW89_DECL_RFK_WM(0xC0D4, 0xffffffff, 0x4486888c),
9 RTW89_DECL_RFK_WM(0xC0D8, 0xffffffff, 0xc6ba10e0),
10 RTW89_DECL_RFK_WM(0xc0dc, 0xffffffff, 0x30c52868),
11 RTW89_DECL_RFK_WM(0xc0e0, 0xffffffff, 0x05008128),
12 RTW89_DECL_RFK_WM(0xc0e4, 0xffffffff, 0x0000272b),
13 RTW89_DECL_RFK_WM(0xC1D4, 0xffffffff, 0x4486888c),
14 RTW89_DECL_RFK_WM(0xC1D8, 0xffffffff, 0xc6ba10e0),
15 RTW89_DECL_RFK_WM(0xc1dc, 0xffffffff, 0x30c52868),
16 RTW89_DECL_RFK_WM(0xc1e0, 0xffffffff, 0x05008128),
17 RTW89_DECL_RFK_WM(0xc1e4, 0xffffffff, 0x0000272b),
[all …]
H A Drtw8852a_rfk_table.c8 RTW89_DECL_RFK_WM(0x12a8, 0x00000001, 0x00000001),
9 RTW89_DECL_RFK_WM(0x12a8, 0x0000000e, 0x00000002),
10 RTW89_DECL_RFK_WM(0x32a8, 0x00000001, 0x00000001),
11 RTW89_DECL_RFK_WM(0x32a8, 0x0000000e, 0x00000002),
12 RTW89_DECL_RFK_WM(0x12bc, 0x000000f0, 0x00000005),
13 RTW89_DECL_RFK_WM(0x12bc, 0x00000f00, 0x00000005),
14 RTW89_DECL_RFK_WM(0x12bc, 0x000f0000, 0x00000005),
15 RTW89_DECL_RFK_WM(0x12bc, 0x0000f000, 0x00000005),
16 RTW89_DECL_RFK_WM(0x120c, 0x000000ff, 0x00000033),
17 RTW89_DECL_RFK_WM(0x12c0, 0x0ff00000, 0x00000033),
[all …]
H A Drtw8852c_rfk_table.c8 RTW89_DECL_RFK_WM(0xc004, BIT(17), 0x1),
9 RTW89_DECL_RFK_WM(0xc024, BIT(17), 0x1),
10 RTW89_DECL_RFK_WM(0xc104, BIT(17), 0x1),
11 RTW89_DECL_RFK_WM(0xc124, BIT(17), 0x1),
17 RTW89_DECL_RFK_WM(0xc000, BIT(17), 0x
[all...]
/freebsd/sys/contrib/device-tree/src/riscv/thead/
H A Dth1520.dtsi17 #size-cells = <0>;
20 c910_0: cpu@0 {
27 reg = <0>;
129 <0x00003 0x00003 0x0007fff8>,
130 <0x00004 0x00004 0x0007fff8>,
131 <0x00005 0x00005 0x0007fff8>,
132 <0x00006 0x00006 0x0007fff8>,
133 <0x00007 0x00007 0x0007fff8>,
134 <0x00008 0x00008 0x0007fff8>,
135 <0x00009 0x00009 0x0007fff8>,
[all …]
/freebsd/contrib/expat/lib/
H A Dnametab.h34 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
35 0x00000000, 0x00000000, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
36 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, 0x04000000,
37 0x87FFFFFE, 0x07FFFFFE, 0x00000000, 0x00000000, 0xFF7FFFFF, 0xFF7FFFFF,
38 0xFFFFFFFF, 0x7FF3FFFF, 0xFFFFFDFE, 0x7FFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
39 0xFFFFE00F, 0xFC31FFFF, 0x00FFFFFF, 0x00000000, 0xFFFF0000, 0xFFFFFFFF,
40 0xFFFFFFFF, 0xF80001FF, 0x00000003, 0x00000000, 0x00000000, 0x00000000,
41 0x00000000, 0x00000000, 0xFFFFD740, 0xFFFFFFFB, 0x547F7FFF, 0x000FFFFD,
42 0xFFFFDFFE, 0xFFFFFFFF, 0xDFFEFFFF, 0xFFFFFFFF, 0xFFFF0003, 0xFFFFFFFF,
43 0xFFFF199F, 0x033FCFFF, 0x00000000, 0xFFFE0000, 0x027FFFFF, 0xFFFFFFFE,
[all …]
/freebsd/crypto/openssl/crypto/bn/
H A Dbn_nist.c22 {0xFFFFFFFFFFFFFFFFULL, 0xFFFFFFFFFFFFFFFEULL, 0xFFFFFFFFFFFFFFFFULL},
23 {0xFFFFFFFFFFFFFFFEULL, 0xFFFFFFFFFFFFFFFDULL, 0xFFFFFFFFFFFFFFFFULL},
24 {0xFFFFFFFFFFFFFFFDULL, 0xFFFFFFFFFFFFFFFCULL, 0xFFFFFFFFFFFFFFFFULL}
28 0x0000000000000001ULL, 0x0000000000000002ULL, 0x0000000000000001ULL,
29 0xFFFFFFFFFFFFFFFEULL, 0xFFFFFFFFFFFFFFFDULL, 0xFFFFFFFFFFFFFFFFULL
33 {0x0000000000000001ULL, 0xFFFFFFFF00000000ULL,
34 0xFFFFFFFFFFFFFFFFULL, 0x00000000FFFFFFFFULL},
35 {0x0000000000000002ULL, 0xFFFFFFFE00000000ULL,
36 0xFFFFFFFFFFFFFFFFULL, 0x00000001FFFFFFFFULL} /* this one is
41 0x0000000000000001ULL, 0xFFFFFFFE00000000ULL,
[all …]
H A Dbn_dh.c34 BN_DEF(0xFFFFFFFF, 0xFFFFFFFF), BN_DEF(0xCA237327, 0xF1746C08),
35 BN_DEF(0x4ABC9804, 0x670C354E), BN_DEF(0x7096966D, 0x9ED52907),
36 BN_DEF(0x208552BB, 0x1C62F356), BN_DEF(0xDCA3AD96, 0x83655D23),
37 BN_DEF(0xFD24CF5F, 0x69163FA8), BN_DEF(0x1C55D39A, 0x98DA4836),
38 BN_DEF(0xA163BF05, 0xC2007CB8), BN_DEF(0xECE45B3D, 0x49286651),
39 BN_DEF(0x7C4B1FE6, 0xAE9F2411), BN_DEF(0x5A899FA5, 0xEE386BFB),
40 BN_DEF(0xF406B7ED, 0x0BFF5CB6), BN_DEF(0xA637ED6B, 0xF44C42E9),
41 BN_DEF(0x625E7EC6, 0xE485B576), BN_DEF(0x6D51C245, 0x4FE1356D),
42 BN_DEF(0xF25F1437, 0x302B0A6D), BN_DEF(0xCD3A431B, 0xEF9519B3),
43 BN_DEF(0x8E3404DD, 0x514A0879), BN_DEF(0x3B139B22, 0x020BBEA6),
[all …]
/freebsd/share/i18n/csmapper/ISO646/
H A DISO646-BASIC@1983%UCS.6463 0xFFFFFFFF # 0x23
4 0xFFFFFFFF # 0x24
5 0xFFFFFFFF # 0x40
6 0xFFFFFFFF # 0x5B
7 0xFFFFFFFF # 0x5C
8 0xFFFFFFFF # 0x5D
9 0xFFFFFFFF # 0x5E
10 0xFFFFFFFF # 0x60
11 0xFFFFFFFF # 0x7B
12 0xFFFFFFFF # 0x7C
[all …]
/freebsd/contrib/netbsd-tests/lib/libc/inet/
H A Dt_inet_network.c43 "inet_network(%s) returned: 0x%08X, expected: %s", #input, \
55 H_REQUIRE("0x12", 0x00000012); in ATF_TC_BODY()
56 H_REQUIRE("127.1", 0x00007f01); in ATF_TC_BODY()
57 H_REQUIRE("127.1.2.3", 0x7f010203); in ATF_TC_BODY()
58 H_REQUIRE("0X12", 0x00000012); in ATF_TC_BODY()
59 H_REQUIRE("0", 0x0); in ATF_TC_BODY()
60 H_REQUIRE("01.02.07.077", 0x0102073f); in ATF_TC_BODY()
61 H_REQUIRE("0x1.23.045.0", 0x01172500); in ATF_TC_BODY()
62 H_REQUIRE("0x12.0x34", 0x00001234); in ATF_TC_BODY()
65 H_REQUIRE("1 bar", 0x00000001); in ATF_TC_BODY()
[all …]
/freebsd/sys/netinet/
H A Dsctp_sysctl.h128 #define SCTPCTL_MAXDGRAM_MIN 0
129 #define SCTPCTL_MAXDGRAM_MAX 0xFFFFFFFF
134 #define SCTPCTL_RECVSPACE_MIN 0
135 #define SCTPCTL_RECVSPACE_MAX 0xFFFFFFFF
140 #define SCTPCTL_AUTOASCONF_MIN 0
146 #define SCTPCTL_MULTIPLEASCONFS_MIN 0
152 #define SCTPCTL_ECN_ENABLE_MIN 0
158 #define SCTPCTL_PR_ENABLE_MIN 0
164 #define SCTPCTL_AUTH_ENABLE_MIN 0
170 #define SCTPCTL_ASCONF_ENABLE_MIN 0
[all …]
/freebsd/sys/netpfil/ipfilter/netinet/
H A Dip_rules.c63 0, 0, 0, 0, 0, 0, 0, 0x8070d88, 0, 0, 0, 0xffffffff, 0, 0, 0, 0, 0, 0, 0, 0xffffffff, 0x1b0, 0x1, 0…
67 0, 0, 0, 0, 0, 0, 0, 0x8070d88, 0, 0, 0, 0xffffffff, 0, 0, 0, 0, 0, 0, 0, 0xffffffff, 0x1b0, 0x1, 0…
108 int i, j, err = 0, max; in ipfrule_add_out_()
112 for (i = 0; i < max; i++) { in ipfrule_add_out_()
119 FR_GROUPLEN) == 0) { in ipfrule_add_out_()
133 fp->fr_data = (void *)ipf_rules_out_[0]; in ipfrule_add_out_()
134 fp->fr_dsize = sizeof(ipf_rules_out_[0]); in ipfrule_add_out_()
138 V_ipfmain.ipf_active, 0); in ipfrule_add_out_()
145 int err = 0, i; in ipfrule_remove_out_()
151 if (ipfrule_out_.fr_ref > 0) { in ipfrule_remove_out_()
[all …]
/freebsd/sys/dev/qlnx/qlnxe/
H A Decore_init_values.h35 0x00030003, 0xffff0000, /* if phase != 'engine', skip 3 ops (no DMAE) */
36 0x00020002, 0x00020000, /* if mode != '!asic', skip 2 ops */
37 0x0280c201, 0x00000000, /* write 0x0 to address 0x50184 */
38 0x02810201, 0x00000000, /* write 0x0 to address 0x50204 */
40 0x00110003, 0xffff0000, /* if phase != 'engine', skip 17 ops (no DMAE) */
41 0x00030002, 0x00020000, /* if mode != '!asic', skip 3 ops */
42 0x0048c201, 0x00000000, /* write 0x0 to address 0x9184 */
43 0x0048d201, 0x00000000, /* write 0x0 to address 0x91a4 */
44 0x004ba601, 0x00000001, /* write 0x1 to address 0x974c */
45 0x00020002, 0x00be0000, /* if mode != '(!asic)&bb', skip 2 ops */
[all …]
/freebsd/sys/contrib/device-tree/src/arm/marvell/
H A Darmada-370-xp.dtsi29 #size-cells = <0>;
30 cpu@0 {
33 reg = <0>;
47 pcie-mem-aperture = <0xf8000000 0x7e00000>;
48 pcie-io-aperture = <0xffe00000 0x100000>;
52 reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
53 ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
56 clocks = <&coreclk 0>;
62 reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
63 ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
[all …]
/freebsd/sys/dev/ixl/
H A Di40e_register.h38 #define I40E_GL_ARQBAH 0x000801C0 /* Reset: EMPR */
39 #define I40E_GL_ARQBAH_ARQBAH_SHIFT 0
40 #define I40E_GL_ARQBAH_ARQBAH_MASK I40E_MASK(0xFFFFFFFF, I40E_GL_ARQBAH_ARQBAH_SHIFT)
41 #define I40E_GL_ARQBAL 0x000800C0 /* Reset: EMPR */
42 #define I40E_GL_ARQBAL_ARQBAL_SHIFT 0
43 #define I40E_GL_ARQBAL_ARQBAL_MASK I40E_MASK(0xFFFFFFFF, I40E_GL_ARQBAL_ARQBAL_SHIFT)
44 #define I40E_GL_ARQH 0x000803C0 /* Reset: EMPR */
45 #define I40E_GL_ARQH_ARQH_SHIFT 0
46 #define I40E_GL_ARQH_ARQH_MASK I40E_MASK(0x3FF, I40E_GL_ARQH_ARQH_SHIFT)
47 #define I40E_GL_ARQT 0x000804C0 /* Reset: EMPR */
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Object/
H A DRelocationResolver.cpp3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
70 return (S + Addend) & 0xFFFFFFFF; in resolveX86_64()
93 return (S + Addend) & 0xFFFFFFFF; in resolveAArch64()
97 return (S + Addend - Offset) & 0xFFFF; in resolveAArch64()
99 return (S + Addend - Offset) & 0xFFFFFFFF; in resolveAArch64()
121 return (S + LocData) & 0xFFFFFFFF; in resolveBPF()
[all...]
/freebsd/sys/dev/ice/
H A Dice_hw_autogen.h43 #define E830_GLTCLAN_TSYN_REG_RANGE_ENFORCE(_i) (0x000FD000 + ((_i) * 64)) /* _i=0...7 */ /* Reset Source: CORER */
45 #define E830_GLTCLAN_TSYN_REG_RANGE_ENFORCE_START_S 0
46 #define E830_GLTCLAN_TSYN_REG_RANGE_ENFORCE_START_M MAKEMASK(0x3F, 0)
48 #define E830_GLTCLAN_TSYN_REG_RANGE_ENFORCE_END_M MAKEMASK(0x3F, 6)
50 #define E830_GLTCLAN_TSYN_REG_RANGE_ENFORCE_VM_VF_TYPE_M MAKEMASK(0x3, 12)
52 #define E830_GLTCLAN_TSYN_REG_RANGE_ENFORCE_VM_VF_NUM_M MAKEMASK(0x3FF, 14)
54 #define E830_GLTCLAN_TSYN_REG_RANGE_ENFORCE_PF_NUM_M MAKEMASK(0x7, 24)
57 #define GL_HIDA(_i) (0x0008200
[all...]
/freebsd/sys/dev/sfxge/common/
H A Dsiena_nic.c60 if (req.emr_rc != 0) { in siena_nic_get_partn_mask()
72 return (0); in siena_nic_get_partn_mask()
104 &capabilities, mac_addr)) != 0) in siena_board_cfg()
167 if (rc != 0) { in siena_board_cfg()
188 encp->enc_fw_assisted_tso_v2_n_contexts = 0; in siena_board_cfg()
205 encp->enc_filter_action_mark_max = 0; in siena_board_cfg()
207 return (0); in siena_board_cfg()
227 if ((rc = efx_mcdi_get_phy_cfg(enp)) != 0) in siena_phy_cfg()
236 return (0); in siena_phy_cfg()
244 #define SIENA_BIU_MAGIC0 0x01234567
[all …]
/freebsd/crypto/openssl/crypto/seed/
H A Dseed_local.h49 …(i) = ((((seed_word)(c)[0]) << 24) | (((seed_word)(c)[1]) << 16) | (((seed_word)(c)[2]) << 8) | ((…
52 *((c)+0) = (unsigned char)((l)>>24) & 0xff; \
53 *((c)+1) = (unsigned char)((l)>>16) & 0xff; \
54 *((c)+2) = (unsigned char)((l)>> 8) & 0xff; \
55 *((c)+3) = (unsigned char)((l)) & 0xff
59 (X3) = (((X3)<<8) ^ ((X4)>>24)) & 0xffffffff; \
60 (X4) = (((X4)<<8) ^ ((T0)>>24)) & 0xffffffff; \
61 (T0) = ((X1) + (X3) - (KC)) & 0xffffffff; \
62 (T1) = ((X2) + (KC) - (X4)) & 0xffffffff
66 (X1) = (((X1)>>8) ^ ((X2)<<24)) & 0xffffffff; \
[all …]
/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Dspi-orion.txt19 chip-select lines 0 through 7 respectively.
37 #size-cells = <0>;
38 cell-index = <0>;
39 reg = <0x10600 0x28>;
47 #size-cells = <0>;
48 cell-index = <0>;
49 reg = <MBUS_ID(0xf0, 0x01) 0x10600 0x28>, /* control */
50 <MBUS_ID(0x01, 0x1e) 0 0xffffffff>, /* CS0 */
51 <MBUS_ID(0x01, 0x5e) 0 0xffffffff>, /* CS1 */
52 <MBUS_ID(0x01, 0x9e) 0 0xffffffff>, /* CS2 */
[all …]
/freebsd/sys/dev/bxe/
H A Decore_init.h35 OP_RD = 0x1, /* read a single register */
150 MODE_ASIC = 0x00000001,
151 MODE_FPGA = 0x00000002,
152 MODE_EMUL = 0x00000004,
153 MODE_E2 = 0x00000008,
154 MODE_E3 = 0x00000010,
155 MODE_PORT2 = 0x00000020,
156 MODE_PORT4 = 0x00000040,
157 MODE_SF = 0x00000080,
158 MODE_MF = 0x00000100,
[all …]
/freebsd/sys/contrib/device-tree/Bindings/perf/
H A Driscv,pmu.yaml78 value of variant must be 0xffffffff_ffffffff.
104 riscv,event-to-mhpmevent = <0x0000B 0x0000 0x0001>;
105 riscv,event-to-mhpmcounters = <0x00001 0x00001 0x00000001>,
106 <0x00002 0x00002 0x0000000
[all...]
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dhisilicon,phy-hi3670-pcie.yaml20 const: 0
69 reg = <0x0 0xfc000000 0x0 0x80000>;
70 #phy-cells = <0>;
79 hisilicon,eye-diagram-param = <0xffffffff 0xffffffff
80 0xffffffff 0xffffffff 0xffffffff>;
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Datmel,at91rm9200-pinctrl.yaml62 0xffffffff 0xffc00c3b # pioA
63 0xffffffff 0x7fff3ccf # pioB
64 0xffffffff 0x007fffff # pioC
69 Let's take the pioA on peripheral B whose value is 0xffc00c3b
116 'gpio@[0-9a-f]+$':
156 ranges = <0xfffff400 0xfffff400 0x600>;
160 0xffffffff 0xffc00c3b /* pioA */
161 0xffffffff 0x7fff3ccf /* pioB */
162 0xffffffff 0x007fffff /* pioC */
166 pinctrl_dbgu: dbgu-0 {
[all …]
/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9462_2p1_initvals.h63 {0x00000008, 0x00000000},
64 {0x00000030, 0x000e0085},
65 {0x00000034, 0x00000005},
66 {0x00000040, 0x00000000},
67 {0x00000044, 0x00000000},
68 {0x00000048, 0x00000008},
69 {0x0000004c, 0x00000010},
70 {0x00000050, 0x00000000},
71 {0x00001040, 0x002ffc0f},
72 {0x00001044, 0x002ffc0f},
[all …]

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