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/freebsd/sys/powerpc/powerpc/
H A Ddb_disasm.c17 Op_A = 0x00000001,
18 Op_B = 0x00000002,
19 Op_BI = 0x00000004,
20 Op_BO = 0x00000008,
22 Op_CRM = 0x00000010,
23 Op_D = 0x00000020,
24 Op_ST = 0x00000020, /* Op_S for store-operations, same as D */
25 Op_S = 0x00000040, /* S-field is swapped with A-field */
27 Op_dA = 0x00000080,
28 Op_LK = 0x00000100,
[all …]
/freebsd/sys/crypto/openssl/arm/
H A Dpoly1305-armv4.S23 cmp r1,#0
24 str r3,[r0,#0] @ zero hash value
35 moveq r0,#0
42 ldrb r4,[r1,#0]
43 mov r10,#0x0fffffff
45 and r3,r10,#-4 @ 0x0ffffffc
103 str r4,[r0,#0]
114 mov r0,#0
123 .word 0xe12fff1e @ interoperable with Thumb ISA:-)
135 cmp r3,#0
[all …]
/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/LoongArch/
H A DEmulateInstructionLoongArch.cpp3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
39 {0xfc000000, 0x40000000, &EmulateInstructionLoongArch::EmulateBEQZ, in GetOpcodeForInstruction()
41 {0xfc000000, 0x44000000, &EmulateInstructionLoongArch::EmulateBNEZ, in GetOpcodeForInstruction()
43 {0xfc000300, 0x48000000, &EmulateInstructionLoongArch::EmulateBCEQZ, in GetOpcodeForInstruction()
45 {0xfc000300, 0x48000100, &EmulateInstructionLoongArch::EmulateBCNEZ, in GetOpcodeForInstruction()
47 {0xfc000000, 0x4c000000, &EmulateInstructionLoongArch::EmulateJIRL, in GetOpcodeForInstruction()
49 {0xfc000000, 0x50000000, &EmulateInstructionLoongArch::EmulateB, in GetOpcodeForInstruction()
51 {0xfc000000, 0x54000000, &EmulateInstructionLoongArch::EmulateBL, in GetOpcodeForInstruction()
53 {0xfc000000, 0x58000000, &EmulateInstructionLoongArch::EmulateBEQ, in GetOpcodeForInstruction()
55 {0xfc000000, 0x5c000000, &EmulateInstructionLoongArch::EmulateBNE, in GetOpcodeForInstruction()
[all …]
/freebsd/crypto/openssl/crypto/poly1305/asm/
H A Dpoly1305-armv4.pl33 $output = $#ARGV >= 0 && $ARGV[$#ARGV] =~ m|\.\w+$| ? pop : undef;
34 $flavour = $#ARGV >= 0 && $ARGV[0] !~ m|\.| ? shift : undef;
37 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
48 ($ctx,$inp,$len,$padbit)=map("r$_",(0..3));
72 cmp $inp,#0
73 str r3,[$ctx,#0] @ zero hash value
84 moveq r0,#0
91 ldrb r4,[$inp,#0]
92 mov r10,#0x0fffffff
94 and r3,r10,#-4 @ 0x0ffffffc
[all …]
/freebsd/sys/powerpc/include/
H A Ddb_machdep.h47 #define BKPT_INST 0x7C810808 /* breakpoint instruction */
55 #if 0
56 #define SR_SINGLESTEP 0x400
61 #define T_BREAKPOINT 0xffff
64 #define T_WATCHPOINT 0xeeee
68 #define IS_WATCHPOINT_TRAP(type, code) 0
71 #define M_RTS 0xfc0007fe
72 #define I_RTS 0x4c000020
73 #define M_BC 0xfc000000
74 #define I_BC 0x40000000
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dstorcenter.dts30 #size-cells = <0>;
32 PowerPC,8241@0 {
34 reg = <0>;
37 bus-frequency = <0>; /* from bootwrapper */
47 reg = <0x00000000 0x04000000>; /* 64MB @ 0x0 */
55 store-gathering = <0>; /* 0 == off, !0 == on */
56 ranges = <0x0 0xfc000000 0x100000>;
57 reg = <0xfc000000 0x100000>; /* EUMB */
58 bus-frequency = <0>; /* fixed by loader */
62 #size-cells = <0>;
[all …]
H A DkuroboxHD.dts37 #size-cells = <0>;
41 reg = <0x0>;
44 bus-frequency = <0>; /* Fixed by bootloader */
46 i-cache-size = <0x4000>;
47 d-cache-size = <0x4000>;
53 reg = <0x0 0x4000000>;
61 store-gathering = <0>; /* 0 == off, !0 == on */
62 reg = <0x80000000 0x100000>;
63 ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */
64 0xfc000000 0xfc000000 0x100000 /* EUMB */
[all …]
H A DkuroboxHG.dts37 #size-cells = <0>;
41 reg = <0x0>;
44 bus-frequency = <0>; /* Fixed by bootloader */
46 i-cache-size = <0x4000>;
47 d-cache-size = <0x4000>;
53 reg = <0x0 0x8000000>;
61 store-gathering = <0>; /* 0 == off, !0 == on */
62 reg = <0x80000000 0x100000>;
63 ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */
64 0xfc000000 0xfc000000 0x100000 /* EUMB */
[all …]
H A Do2d.dts15 memory@0 {
16 reg = <0x00000000 0x08000000>; // 128MB
20 ranges = <0 0 0xfc000000 0x02000000
21 3 0 0xe3000000 0x00100000>;
23 flash@0,0 {
25 reg = <0 0 0x02000000>;
33 reg = <0x00060000 0x00260000>;
39 reg = <0x002c0000 0x01d40000>;
H A Do2dnt2.dts15 memory@0 {
16 reg = <0x00000000 0x08000000>; // 128MB
20 ranges = <0 0 0xfc000000 0x02000000
21 3 0 0xe3000000 0x00100000>;
23 flash@0,0 {
25 reg = <0 0 0x02000000>;
33 reg = <0x00060000 0x00260000>;
40 reg = <0x002c0000 0x01d40000>;
H A Do3dnt.dts15 memory@0 {
16 reg = <0x00000000 0x04000000>; // 64MB
20 ranges = <0 0 0xfc000000 0x01000000
21 3 0 0xe3000000 0x00100000>;
23 flash@0,0 {
25 reg = <0 0 0x01000000>;
33 reg = <0x00060000 0x00260000>;
40 reg = <0x002c0000 0x00d40000>;
H A Do2d300.dts16 ranges = <0 0 0xfc000000 0x02000000
17 3 0 0xe3000000 0x00100000>;
18 flash@0,0 {
20 reg = <0 0 0x02000000>;
28 reg = <0x00040000 0x00020000>;
33 reg = <0x00060000 0x00020000>;
38 reg = <0x00080000 0x00260000>;
44 reg = <0x002e0000 0x01d20000>;
H A Dsbc8548-altflash.dts23 reg = <0xe0000000 0x5000>;
26 ranges = <0x0 0x0 0xfc000000 0x04000000 /*64MB Flash*/
27 0x3 0x0 0xf0000000 0x04000000 /*64MB SDRAM*/
28 0x4 0x0 0xf4000000 0x04000000 /*64MB SDRAM*/
29 0x5 0x0 0xf8000000 0x00b10000 /* EPLD */
30 0x6 0x0 0xef800000 0x00800000>; /*8MB Flash*/
32 flash@0,0 {
35 reg = <0x0 0x0 0x04000000>;
39 partition@0 {
42 reg = <0x00000000 0x03f00000>;
[all …]
H A Da3m071.dts26 ranges = <0 0xf0000000 0x0000c000>;
27 reg = <0xf0000000 0x00000100>;
28 bus-frequency = <0>; /* From boot loader */
29 system-frequency = <0>; /* From boot loader */
41 reg = <0x2000 0x100>;
42 interrupts = <2 1 0>;
63 reg = <0x2c00 0x100>;
64 interrupts = <2 4 0>;
73 reg = <0x03>;
94 ranges = <0 0 0xfc000000 0x02000000
[all …]
/freebsd/contrib/file/magic/Magdir/
H A Dnetbsd12 0 name netbsd-detail
14 >4 lelong >0 \b+T=%d
15 >8 lelong >0 \b+D=%d
16 >12 lelong >0 \b+B=%d
17 >16 lelong >0 \b+S=%d
18 >24 lelong >0 \b+TR=%d
19 >28 lelong >0 \b+TD=%d
21 0 name netbsd-4096
22 >0 byte &0x80
26 >0 byte ^0x80 executable
[all …]
/freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/
H A DRuntimeDyldMachOAArch64.h3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
38 int64_t Addend = 0; in decodeAddend()
71 assert((((uintptr_t)LocalAddress & 0x3) == 0) && in decodeAddend()
90 assert(((*p & 0xFC000000) == 0x14000000 || in decodeAddend()
91 (*p & 0xFC000000) == 0x94000000) && in decodeAddend()
97 Addend = (*p & 0x03FFFFFF) << 2; in decodeAddend()
105 assert((*p & 0x9F000000) == 0x90000000 && "Expected adrp instruction."); in decodeAddend()
110 Addend = ((*p & 0x60000000) >> 29) | ((*p & 0x01FFFFE0) >> 3) << 12; in decodeAddend()
119 assert((*p & 0x3B000000) == 0x39000000 && in decodeAddend()
127 assert((((*p & 0x3B000000) == 0x39000000) || in decodeAddend()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/thermal/
H A Dspear-thermal.txt12 reg = <0xfc000000 0x1000>;
13 st,thermal-flags = <0x7000>;
/freebsd/sys/contrib/xen/arch-x86/
H A Dxen-x86_32.h44 #define FLAT_RING1_CS 0xe019 /* GDT index 259 */
45 #define FLAT_RING1_DS 0xe021 /* GDT index 260 */
46 #define FLAT_RING1_SS 0xe021 /* GDT index 260 */
47 #define FLAT_RING3_CS 0xe02b /* GDT index 261 */
48 #define FLAT_RING3_DS 0xe033 /* GDT index 262 */
49 #define FLAT_RING3_SS 0xe033 /* GDT index 262 */
58 #define __HYPERVISOR_VIRT_START_PAE 0xF5800000
59 #define __MACH2PHYS_VIRT_START_PAE 0xF5800000
60 #define __MACH2PHYS_VIRT_END_PAE 0xF6800000
66 #define __HYPERVISOR_VIRT_START_NONPAE 0xFC000000
[all …]
/freebsd/sys/contrib/device-tree/Bindings/rtc/
H A Dspear-rtc.txt12 reg = <0xfc000000 0x1000>;
/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A Dsdhci-spear.txt16 reg = <0xfc000000 0x1000>;
17 cd-gpios = <&gpio0 6 0>;
/freebsd/sys/contrib/device-tree/Bindings/mtd/
H A Dspear_smi.txt20 reg = <0xfc000000 0x1000>;
/freebsd/sys/contrib/device-tree/Bindings/ata/
H A Dpata-arasan.txt32 reg = <0xfc000000 0x1000>;
/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dcdns,cdns-pcie-ep.yaml41 reg = <0x0 0xfc000000 0x0 0x01000000>,
42 <0x0 0x80000000 0x0 0x40000000>;
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dhisilicon,phy-hi3670-pcie.yaml20 const: 0
69 reg = <0x0 0xfc000000 0x0 0x80000>;
70 #phy-cells = <0>;
79 hisilicon,eye-diagram-param = <0xffffffff 0xffffffff
80 0xffffffff 0xffffffff 0xffffffff>;
/freebsd/sys/contrib/device-tree/Bindings/dma/
H A Dsnps-dma.txt11 - chan_allocation_order: order of allocation of channel, 0 (default): ascending,
13 - chan_priority: priority of channels. 0 (default): increase from chan 0->n, 1:
14 increase from chan n->0
22 (0 - 8bits, 1 - 16bits, ..., 5 - 256bits)
27 one cell per channel. 0: not supported, 1 (default): supported.
29 The default value is 0 (for non-cacheable, non-buffered,
37 reg = <0xfc000000 0x1000>;
47 block_size = <0xfff>;
64 reg = <0xe0000000 0x1000>;
65 interrupts = <0 35 0x4>;
[all …]

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