3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
38     int64_t Addend = 0;  in decodeAddend()
71       assert((((uintptr_t)LocalAddress & 0x3) == 0) &&  in decodeAddend()
90       assert(((*p & 0xFC000000) == 0x14000000 ||  in decodeAddend()
91               (*p & 0xFC000000) == 0x94000000) &&  in decodeAddend()
97       Addend = (*p & 0x03FFFFFF) << 2;  in decodeAddend()
105       assert((*p & 0x9F000000) == 0x90000000 && "Expected adrp instruction.");  in decodeAddend()
110       Addend = ((*p & 0x60000000) >> 29) | ((*p & 0x01FFFFE0) >> 3) << 12;  in decodeAddend()
119       assert((*p & 0x3B000000) == 0x39000000 &&  in decodeAddend()
127       assert((((*p & 0x3B000000) == 0x39000000) ||  in decodeAddend()
128               ((*p & 0x11C00000) == 0x11000000)   ) &&  in decodeAddend()
132       Addend = (*p & 0x003FFC00) >> 10;  in decodeAddend()
136       int ImplicitShift = 0;  in decodeAddend()
137       if ((*p & 0x3B000000) == 0x39000000) { // << load / store  in decodeAddend()
139         ImplicitShift = ((*p >> 30) & 0x3);  in decodeAddend()
140         if (ImplicitShift == 0) {  in decodeAddend()
142           if ((*p & 0x04800000) == 0x04800000)  in decodeAddend()
171       assert((((uintptr_t)LocalAddress & 0x3) == 0) &&  in encodeAddend()
190       assert(((*p & 0xFC000000) == 0x14000000 ||  in encodeAddend()
191               (*p & 0xFC000000) == 0x94000000) &&  in encodeAddend()
195       assert((Addend & 0x3) == 0 && "Branch target is not aligned");  in encodeAddend()
199       *p = (*p & 0xFC000000) | ((uint32_t)(Addend >> 2) & 0x03FFFFFF);  in encodeAddend()
206       assert((*p & 0x9F000000) == 0x90000000 && "Expected adrp instruction.");  in encodeAddend()
209       assert((Addend & 0xFFF) == 0 && "ADRP target is not page aligned.");  in encodeAddend()
213       uint32_t ImmLoValue = ((uint64_t)Addend << 17) & 0x60000000;  in encodeAddend()
214       uint32_t ImmHiValue = ((uint64_t)Addend >> 9) & 0x00FFFFE0;  in encodeAddend()
215       *p = (*p & 0x9F00001F) | ImmHiValue | ImmLoValue;  in encodeAddend()
222       assert((*p & 0x3B000000) == 0x39000000 &&  in encodeAddend()
231       assert((((*p & 0x3B000000) == 0x39000000) ||  in encodeAddend()
232               ((*p & 0x11C00000) == 0x11000000)   ) &&  in encodeAddend()
237       int ImplicitShift = 0;  in encodeAddend()
238       if ((*p & 0x3B000000) == 0x39000000) { // << load / store  in encodeAddend()
240         ImplicitShift = ((*p >> 30) & 0x3);  in encodeAddend()
242         case 0:  in encodeAddend()
244           if ((*p & 0x04800000) == 0x04800000) {  in encodeAddend()
246             assert(((Addend & 0xF) == 0) &&  in encodeAddend()
251           assert(((Addend & 0x1) == 0) && "16-bit LDR/STR not 2-byte aligned.");  in encodeAddend()
254           assert(((Addend & 0x3) == 0) && "32-bit LDR/STR not 4-byte aligned.");  in encodeAddend()
257           assert(((Addend & 0x7) == 0) && "64-bit LDR/STR not 8-byte aligned.");  in encodeAddend()
266       *p = (*p & 0xFFC003FF) | ((uint32_t)(Addend << 10) & 0x003FFC00);  in encodeAddend()
290     int64_t ExplicitAddend = 0;  in processRelocationRef()
321     assert((ExplicitAddend == 0 || RE.Addend == 0) && "Relocation has "\  in processRelocationRef()
335       Value.Offset = 0;  in processRelocationRef()
413       Value &= 0xFFF;  in resolveRelocation()