Searched +full:0 +full:xfbe00000 (Results 1 – 10 of 10) sorted by relevance
19 reg = <0x0 0xfbe00000 0x0 0x100000>;
44 reg = <0xfbe00000 0x100000>;
23 memory@0 {24 reg = <0x00000000 0x08000000>; // 128MB30 cell-index = <0>;61 phy0: ethernet-phy@0 {62 reg = <0>;69 reg = <0x51>;73 reg = <0x52>;80 interrupt-map-mask = <0xf800 0 0 7>;81 interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot82 0xc000 0 0 2 &mpc5200_pic 1 1 3[all …]
37 reg = <0 0 0 0>;43 #size-cells = <0>;46 cpu@0 {49 reg = <0>;97 #size-cells = <0>;98 #address-cells = <0>;100 reg = <0x[all...]
47 #size-cells = <0>;49 cpu@0 {52 reg = <0x0 0x0>;59 reg = <0x0 0x1>;66 reg = <0x0 0x2>;73 reg = <0x0 0x3>;81 cpu_suspend = <0x84000001>;82 cpu_off = <0x84000002>;83 cpu_on = <0x84000003>;88 #clock-cells = <0>;[all …]
48 #size-cells = <0>;50 cpu@0 {53 reg = <0x0 0x0>;60 reg = <0x0 0x1>;67 reg = <0x0 0x2>;74 reg = <0x0 0x3>;82 cpu_suspend = <0x84000001>;83 cpu_off = <0x84000002>;84 cpu_on = <0x84000003>;89 #clock-cells = <0>;[all …]
21 #size-cells = <0>;23 cpu@0 {26 reg = <0x0>;28 d-cache-size = <0x8000>;31 i-cache-size = <0xc000>;40 reg = <0x1>;42 d-cache-size = <0x8000>;45 i-cache-size = <0xc000>;54 reg = <0x2>;56 d-cache-size = <0x8000>;[all …]
41 #size-cells = <0>;43 cpu@0 {46 reg = <0x0>;49 d-cache-size = <0x8000>; // L1, 32K50 i-cache-size = <0x8000>; // L1, 32K51 timebase-frequency = <0>;53 clock-frequency = <0>;59 reg = <0x0>;62 d-cache-size = <0x8000>; // L1, 32K63 i-cache-size = <0x8000>; // L1, 32K[all …]
51 #size-cells = <0>;79 cpu_l0: cpu@0 {82 reg = <0x0 0x0>;89 i-cache-size = <0x8000>;92 d-cache-size = <0x8000>;101 reg = <0x0 0x1>;108 i-cache-size = <0x8000>;111 d-cache-size = <0x8000>;120 reg = <0x0 0x2>;127 i-cache-size = <0x8000>;[all …]
1 0x00 = 0x000000002 0x01 = 0x010000003 0x02 = 0x020000004 0x03 = 0x030000005 0x04 = 0x040000006 0x05 = 0x050000007 0x06 = 0x060000008 0x07 = 0x070000009 0x08 = 0x0800000010 0x09 = 0x09000000[all …]