Lines Matching +full:0 +full:xfbe00000
23 memory@0 {
24 reg = <0x00000000 0x08000000>; // 128MB
30 cell-index = <0>;
61 phy0: ethernet-phy@0 {
62 reg = <0>;
69 reg = <0x51>;
73 reg = <0x52>;
80 interrupt-map-mask = <0xf800 0 0 7>;
81 interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
82 0xc000 0 0 2 &mpc5200_pic 1 1 3
83 0xc000 0 0 3 &mpc5200_pic 1 2 3
84 0xc000 0 0 4 &mpc5200_pic 1 3 3
86 0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
87 0xc800 0 0 2 &mpc5200_pic 1 2 3
88 0xc800 0 0 3 &mpc5200_pic 1 3 3
89 0xc800 0 0 4 &mpc5200_pic 0 0 3>;
90 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000>,
91 <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000>,
92 <0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
96 ranges = <0 0 0xfe000000 0x02000000
97 1 0 0xfc000000 0x02000000
98 2 0 0xfbe00000 0x00200000
99 3 0 0xf9e00000 0x02000000
100 4 0 0xf7e00000 0x02000000
101 5 0 0xe6000000 0x02000000
102 6 0 0xe8000000 0x02000000
103 7 0 0xea000000 0x02000000>;
105 flash@0,0 {
107 reg = <0 0 0x02000000>;
112 partition@0 {
114 reg = <0x00000000 0x00040000>;
118 reg = <0x00040000 0x001c0000>;
122 reg = <0x00200000 0x01d00000>;
126 reg = <0x01f00000 0x00040000>;
130 reg = <0x01f40000 0x00040000>;
134 reg = <0x01f80000 0x00040000>;
138 reg = <0x01fc0000 0x00040000>;
142 sram@2,0 {
144 reg = <2 0 0x00200000>;
151 * fpga@3,0 {
153 * reg = <3 0 0x02000000>;
157 * fpga@4,0 {
159 * reg = <4 0 0x02000000>;
167 * device@5,0 {
169 * reg = <5 0 0x02000000>;
172 * device@6,0 {
174 * reg = <6 0 0x02000000>;
177 * device@7,0 {
179 * reg = <7 0 0x02000000>;