/freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/ |
H A D | RuntimeDyldMachOARM.h | 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 46 Addr |= 0x1; in modifyAddressBasedOnFlags() 71 Temp &= 0x00ffffff; // Mask out the opcode. in decodeAddend() 79 // Encoding for high bits 1111 0XXX XXXX XXXX in decodeAddend() 82 if ((HighInsn & 0xf800) != 0xf000) in decodeAddend() 88 if ((LowInsn & 0xf800) != 0xf800) in decodeAddend() 93 return SignExtend64<23>(((HighInsn & 0x7ff) << 12) | in decodeAddend() 94 ((LowInsn & 0x7ff) << 1)); in decodeAddend() 221 assert((HighInsn & 0xf800) == 0xf000 && in resolveRelocation() 223 HighInsn = (HighInsn & 0xf800) | ((Value >> 12) & 0x7ff); in resolveRelocation() [all …]
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/freebsd/sys/contrib/device-tree/src/powerpc/fsl/ |
H A D | mpc8572si-post.dtsi | 39 interrupts = <19 2 0 0>; 42 /* controller at 0x8000 */ 48 bus-range = <0 255>; 50 interrupts = <24 2 0 0>; 52 pcie@0 { 53 reg = <0 0 0 0 0>; 58 interrupts = <24 2 0 0>; 59 interrupt-map-mask = <0xf800 0 0 7>; 62 /* IDSEL 0x0 */ 63 0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0 [all …]
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H A D | mpc8544si-post.dtsi | 39 interrupts = <19 2 0 0>; 42 /* controller at 0x8000 */ 46 interrupts = <24 0x2 0 0>; 47 bus-range = <0 0xff>; 53 /* controller at 0x9000 */ 59 bus-range = <0 255>; 61 interrupts = <25 2 0 0>; 63 pcie@0 { 64 reg = <0 0 0 0 0>; 69 interrupts = <25 2 0 0>; [all …]
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H A D | p2020si-post.dtsi | 39 interrupts = <19 2 0 0>; 42 /* controller at 0xa000 */ 48 bus-range = <0 255>; 50 interrupts = <26 2 0 0>; 53 pcie@0 { 54 reg = <0 0 0 0 0>; 59 interrupts = <26 2 0 0>; 60 interrupt-map-mask = <0xf800 0 0 7>; 62 /* IDSEL 0x0 */ 63 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0 [all …]
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H A D | p1023rdb.dts | 56 size = <0 0x1000000>; 57 alignment = <0 0x1000000>; 60 size = <0 0x400000>; 61 alignment = <0 0x400000>; 64 size = <0 0x2000000>; 65 alignment = <0 0x2000000>; 70 ranges = <0x0 0xf 0xff000000 0x200000>; 74 ranges = <0x0 0xf 0xff200000 0x200000>; 78 ranges = <0x0 0x0 0xff600000 0x200000>; 83 reg = <0x53>; [all …]
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H A D | mpc8536si-post.dtsi | 39 interrupts = <19 2 0 0>; 42 /* controller at 0x8000 */ 46 interrupts = <24 0x2 0 0>; 47 bus-range = <0 0xff>; 53 /* controller at 0x9000 */ 59 bus-range = <0 255>; 61 interrupts = <25 2 0 0>; 63 pcie@0 { 64 reg = <0 0 0 0 0>; 69 interrupts = <25 2 0 0>; [all …]
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H A D | p1022si-post.dtsi | 43 interrupts = <19 2 0 0>, 44 <16 2 0 0>; 47 /* controller at 0x9000 */ 53 bus-range = <0 255>; 55 interrupts = <16 2 0 0>; 57 pcie@0 { 58 reg = <0 [all...] |
H A D | mpc8641si-post.dtsi | 12 interrupts = <19 2 0 0>; 20 bus-frequency = <0>; 22 mcm-law@0 { 24 reg = <0x0 0x1000>; 30 reg = <0x1000 0x1000>; 31 interrupts = <17 2 0 0>; 34 /include/ "pq3-i2c-0.dtsi" 36 /include/ "pq3-duart-0.dtsi" 38 interrupts = <28 2 0 0>; 40 /include/ "pq3-dma-0.dtsi" [all …]
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H A D | p5020si-post.dtsi | 37 alloc-ranges = <0 0 0x10000 0>; 42 alloc-ranges = <0 0 0x10000 0>; 47 alloc-ranges = <0 0 0x10000 0>; 52 interrupts = <25 2 0 0>; 57 /* controller at 0x200000 */ 63 bus-range = <0x0 0xff>; 67 fsl,liodn-reg = <&guts 0x500>; /* PEX1LIODNR */ 68 pcie@0 { 69 reg = <0 0 0 0 0>; 75 interrupt-map-mask = <0xf800 0 0 7>; [all …]
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H A D | p3041si-post.dtsi | 37 alloc-ranges = <0 0 0x10 0>; 42 alloc-ranges = <0 0 0x10 0>; 47 alloc-ranges = <0 0 0x10 0>; 52 interrupts = <25 2 0 0>; 57 /* controller at 0x200000 */ 63 bus-range = <0x0 0xff>; 67 fsl,liodn-reg = <&guts 0x500>; /* PEX1LIODNR */ 68 pcie@0 { 69 reg = <0 0 0 0 0>; 75 interrupt-map-mask = <0xf800 0 0 7>; [all …]
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H A D | p1020si-post.dtsi | 39 interrupts = <19 2 0 0>, 40 <16 2 0 0>; 43 /* controller at 0x9000 */ 49 bus-range = <0 255>; 51 interrupts = <16 2 0 0>; 53 pcie@0 { 54 reg = <0 0 0 0 0>; 59 interrupts = <16 2 0 0>; 60 interrupt-map-mask = <0xf800 0 0 7>; 62 /* IDSEL 0x0 */ [all …]
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H A D | p1010si-post.dtsi | 39 interrupts = <16 2 0 0 19 2 0 0>; 42 /* controller at 0x9000 */ 48 bus-range = <0 255>; 50 interrupts = <16 2 0 0>; 52 pcie@0 { 53 reg = <0 0 0 0 0>; 58 interrupts = <16 2 0 0>; 59 interrupt-map-mask = <0xf800 0 0 7>; 61 /* IDSEL 0x0 */ 62 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0 [all …]
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H A D | p1021si-post.dtsi | 39 interrupts = <19 2 0 0>, 40 <16 2 0 0>; 43 /* controller at 0x9000 */ 49 bus-range = <0 255>; 51 interrupts = <16 2 0 0>; 53 pcie@0 { 54 reg = <0 0 0 0 0>; 59 interrupts = <16 2 0 0>; 60 interrupt-map-mask = <0xf800 0 0 7>; 62 /* IDSEL 0x0 */ [all …]
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/freebsd/sys/contrib/device-tree/src/powerpc/ |
H A D | mpc8610_hpcd.dts | 26 #size-cells = <0>; 28 PowerPC,8610@0 { 30 reg = <0>; 35 sleep = <&pmc 0x00008000 0 // core 36 &pmc 0x00004000 0>; // timebase 37 timebase-frequency = <0>; // From uboot 38 bus-frequency = <0>; // From uboot 39 clock-frequency = <0>; // From uboot 45 reg = <0x00000000 0x20000000>; // 512M at 0x0 52 reg = <0xe0005000 0x1000>; [all …]
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H A D | mpc8377_wlan.dts | 28 #size-cells = <0>; 30 PowerPC,8377@0 { 32 reg = <0x0>; 37 timebase-frequency = <0>; 38 bus-frequency = <0>; 39 clock-frequency = <0>; 45 reg = <0x00000000 0x20000000>; // 512MB at 0 52 reg = <0xe0005000 0x1000>; 53 interrupts = <77 0x8>; 55 ranges = <0x0 0x0 0xfc000000 0x04000000>; [all …]
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H A D | mpc8378_mds.dts | 28 #size-cells = <0>; 30 PowerPC,8378@0 { 32 reg = <0x0>; 37 timebase-frequency = <0>; 38 bus-frequency = <0>; 39 clock-frequency = <0>; 45 reg = <0x00000000 0x20000000>; // 512MB at 0 52 reg = <0xe0005000 0x1000>; 53 interrupts = <77 0x8>; 57 ranges = <0 0x0 0xfe000000 0x02000000 [all …]
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H A D | mpc8315erdb.dts | 27 #size-cells = <0>; 29 PowerPC,8315@0 { 31 reg = <0x0>; 36 timebase-frequency = <0>; // from bootloader 37 bus-frequency = <0>; // from bootloader 38 clock-frequency = <0>; // from bootloader 44 reg = <0x00000000 0x08000000>; // 128MB at 0 51 reg = <0xe0005000 0x1000>; 52 interrupts = <77 0x8>; 58 ranges = <0x0 0x0 0xfe000000 0x00800000 [all …]
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H A D | mpc8377_rdb.dts | 27 #size-cells = <0>; 29 PowerPC,8377@0 { 31 reg = <0x0>; 36 timebase-frequency = <0>; 37 bus-frequency = <0>; 38 clock-frequency = <0>; 44 reg = <0x00000000 0x10000000>; // 256MB at 0 51 reg = <0xe0005000 0x1000>; 52 interrupts = <77 0x8>; 58 ranges = <0x0 0x0 0xfe000000 0x00800000 [all …]
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H A D | mpc8378_rdb.dts | 27 #size-cells = <0>; 29 PowerPC,8378@0 { 31 reg = <0x0>; 36 timebase-frequency = <0>; 37 bus-frequency = <0>; 38 clock-frequency = <0>; 44 reg = <0x00000000 0x10000000>; // 256MB at 0 51 reg = <0xe0005000 0x1000>; 52 interrupts = <77 0x8>; 58 ranges = <0x0 0x0 0xfe000000 0x00800000 [all …]
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/freebsd/sys/contrib/device-tree/Bindings/pci/ |
H A D | intel,ixp4xx-pci.yaml | 54 - const: 0xf800 55 - const: 0 56 - const: 0 73 reg = <0xc0000000 0x1000>; 77 bus-range = <0x00 0xff>; 80 <0x02000000 0 0x48000000 0x48000000 0 0x04000000>, 81 <0x01000000 0 0x00000000 0x4c000000 0 0x00010000>; 83 <0x02000000 0 0x00000000 0x00000000 0 0x04000000>; 86 interrupt-map-mask = <0xf800 0 0 7>; 88 <0x0800 0 0 1 &gpio0 11 3>, /* INT A on slot 1 is irq 11 */ [all …]
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H A D | faraday,ftpci100.txt | 9 The host controller appear on the PCI bus with vendor ID 0x159b (Faraday 10 Technology) and product ID 0x4321. 23 - bus-range: set to <0x00 0xff> 45 - #address-cells: set to <0> 64 interrupt-map-mask = <0xf800 0 0 7>; 66 <0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */ 67 <0x4800 0 0 2 &pci_intc 1>, 68 <0x4800 0 0 3 &pci_intc 2>, 69 <0x4800 0 0 4 &pci_intc 3>, 70 <0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */ [all …]
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H A D | faraday,ftpci100.yaml | 18 The host controller appear on the PCI bus with vendor ID 0x159b (Faraday 19 Technology) and product ID 0x4321. 34 interrupt-map-mask = <0xf800 0 0 7>; 36 <0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */ 37 <0x4800 0 0 2 &pci_intc 1>, 38 <0x4800 0 0 3 &pci_intc 2>, 39 <0x4800 0 0 4 &pci_intc 3>, 40 <0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */ 41 <0x5000 0 0 2 &pci_intc 2>, 42 <0x5000 0 0 3 &pci_intc 3>, [all …]
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H A D | 83xx-512x-pci.txt | 12 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 14 /* IDSEL 0x0E -mini PCI */ 15 0x7000 0x0 0x0 0x1 &ipic 18 0x8 16 0x7000 0x0 0x0 0x2 &ipic 18 0x8 17 0x7000 0x0 0x0 0x3 &ipic 18 0x8 18 0x7000 0x0 0x0 0x4 &ipic 18 0x8 20 /* IDSEL 0x0F - PCI slot */ 21 0x7800 0x0 0x0 0x1 &ipic 17 0x8 22 0x7800 0x0 0x0 0x2 &ipic 18 0x8 23 0x7800 0x0 0x0 0x3 &ipic 17 0x8 [all …]
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H A D | hisilicon-pcie.txt | 17 - port-id: Should be 0, 1, 2 or 3. 26 reg = <0 0xb0080000 0 0x10000>, <0x220 0x00000000 0 0x2000>; 28 bus-range = <0 15>; 34 ranges = <0x82000000 0 0x00000000 0x220 0x00000000 0 0x10000000>; 38 interrupt-map-mask = <0xf800 0 0 7>; 39 interrupt-map = <0x0 0 0 1 &mbigen_pcie 1 10 40 0x0 0 0 2 &mbigen_pcie 2 11 41 0x0 0 0 3 &mbigen_pcie 3 12 42 0x0 0 0 4 &mbigen_pcie 4 13>;
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H A D | kirin-pcie.txt | 27 reg = <0x0 0xf4000000 0x0 0x1000>, <0x0 0xff3fe000 0x0 0x1000>, 28 <0x0 0xf3f20000 0x0 0x40000>, <0x0 0xF4000000 0 0x2000>; 30 bus-range = <0x0 0x1>; 34 ranges = <0x02000000 0x0 0x00000000 0x0 0xf5000000 0x0 0x2000000>; 37 interrupt-map-mask = <0xf800 0 0 7>; 38 interrupt-map = <0x0 0 0 1 &gic 0 0 0 282 4>, 39 <0x0 0 0 2 &gic 0 0 0 283 4>, 40 <0x0 0 0 3 &gic 0 0 0 284 4>, 41 <0x0 0 0 4 &gic 0 0 0 285 4>; 49 reset-gpios = <&gpio11 1 0 >;
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