3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
46       Addr |= 0x1;  in modifyAddressBasedOnFlags()
71         Temp &= 0x00ffffff; // Mask out the opcode.  in decodeAddend()
79         // Encoding for high bits 1111 0XXX XXXX XXXX  in decodeAddend()
82         if ((HighInsn & 0xf800) != 0xf000)  in decodeAddend()
88         if ((LowInsn & 0xf800) != 0xf800)  in decodeAddend()
93         return SignExtend64<23>(((HighInsn & 0x7ff) << 12) |  in decodeAddend()
94                                 ((LowInsn & 0x7ff) << 1));  in decodeAddend()
221       assert((HighInsn & 0xf800) == 0xf000 &&  in resolveRelocation()
223       HighInsn = (HighInsn & 0xf800) | ((Value >> 12) & 0x7ff);  in resolveRelocation()
226       assert((LowInsn & 0xf800) == 0xf800 &&  in resolveRelocation()
228       LowInsn = (LowInsn & 0xf800) | ((Value >> 1) & 0x7ff);  in resolveRelocation()
237         Value |= 0x01;  in resolveRelocation()
247       uint64_t FinalValue = Value & 0xffffff;  in resolveRelocation()
254       writeBytesUnaligned((Temp & ~0xffffff) | FinalValue, LocalAddress, 4);  in resolveRelocation()
264       if (RE.Size & 0x1) // :upper16:  in resolveRelocation()
267       bool IsThumb = RE.Size & 0x2;  in resolveRelocation()
269       Value &= 0xffff;  in resolveRelocation()
274         Insn = (Insn & 0x8f00fbf0) | ((Value & 0xf000) >> 12) |  in resolveRelocation()
275                ((Value & 0x0800) >> 1) | ((Value & 0x0700) << 20) |  in resolveRelocation()
276                ((Value & 0x00ff) << 16);  in resolveRelocation()
278         Insn = (Insn & 0xfff0f000) | ((Value & 0xf000) << 4) | (Value & 0x0fff);  in resolveRelocation()
316       assert(Section.getStubOffset() % 4 == 0 && "Misaligned stub");  in processBranchRelocation()
318       uint32_t StubOpcode = 0;  in processBranchRelocation()
320         StubOpcode = 0xe51ff004; // ldr pc, [pc, #-4]  in processBranchRelocation()
322         StubOpcode = 0xf000f8df; // ldr pc, [pc]  in processBranchRelocation()
338     RelocationEntry TargetRE(RE.SectionID, RE.Offset, RE.RelType, 0,  in processBranchRelocation()
354     // Bit 0 indicates movw (b0 == 0) or movt (b0 == 1).  in processHALFSECTDIFFRelocation()
355     // Bit 1 indicates arm (b1 == 0) or thumb (b1 == 1).  in processHALFSECTDIFFRelocation()
357     bool IsThumb = HalfDiffKindBits & 0x2;  in processHALFSECTDIFFRelocation()
367       Immediate = ((Immediate & 0x0000000f) << 12) |  in processHALFSECTDIFFRelocation()
368                   ((Immediate & 0x00000400) << 1) |  in processHALFSECTDIFFRelocation()
369                   ((Immediate & 0x70000000) >> 20) |  in processHALFSECTDIFFRelocation()
370                   ((Immediate & 0x00ff0000) >> 16);  in processHALFSECTDIFFRelocation()
372       Immediate = ((Immediate >> 4) & 0xf000) | (Immediate & 0xfff);  in processHALFSECTDIFFRelocation()
384     uint32_t SectionAID = ~0U;  in processHALFSECTDIFFRelocation()
397     uint32_t SectionBID = ~0U;  in processHALFSECTDIFFRelocation()
404     uint32_t OtherHalf = MachO.getAnyRelocationAddress(RE2) & 0xffff;  in processHALFSECTDIFFRelocation()
405     unsigned Shift = (HalfDiffKindBits & 0x1) ? 16 : 0;  in processHALFSECTDIFFRelocation()