Home
last modified time | relevance | path

Searched +full:0 +full:xd0000000 (Results 1 – 25 of 87) sorted by relevance

1234

/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dspear3xx.dtsi14 #address-cells = <0>;
15 #size-cells = <0>;
25 reg = <0 0x40000000>;
32 ranges = <0xd0000000 0xd0000000 0x30000000>;
37 reg = <0xf1100000 0x1000>;
43 reg = <0xfc400000 0x1000>;
51 reg = <0xe0800000 0x8000>;
62 reg = <0xfc000000 0x1000>;
69 reg = <0xd0100000 0x1000>;
72 #size-cells = <0>;
[all …]
H A Dspear300.dtsi15 ranges = <0x60000000 0x60000000 0x50000000
16 0xd0000000 0xd0000000 0x30000000>;
20 reg = <0x99000000 0x1000>;
25 reg = <0x60000000 0x1000>;
34 reg = <0x94000000 0x1000 /* FSMC Register */
35 0x80000000 0x0010 /* NAND Base DATA */
36 0x80020000 0x0010 /* NAND Base ADDR */
37 0x80010000 0x0010>; /* NAND Base CMD */
44 reg = <0x70000000 0x100>;
51 reg = <0x50000000 0x1000>;
[all …]
H A Dspear310.dtsi15 ranges = <0x40000000 0x40000000 0x10000000
16 0xb0000000 0xb0000000 0x10000000
17 0xd0000000 0xd0000000 0x30000000>;
21 reg = <0xb4000000 0x1000>;
29 reg = <0x44000000 0x1000 /* FSMC Register */
30 0x40000000 0x0010 /* NAND Base DATA */
31 0x40020000 0x0010 /* NAND Base ADDR */
32 0x40010000 0x0010>; /* NAND Base CMD */
39 reg = <0xb4000000 0x1000>;
49 ranges = <0xb0000000 0xb0000000 0x10000000
[all …]
H A Dspear320.dtsi15 ranges = <0x40000000 0x40000000 0x80000000
16 0xd0000000 0xd0000000 0x30000000>;
20 reg = <0xb3000000 0x1000>;
26 reg = <0x90000000 0x1000>;
36 reg = <0x4c000000 0x1000 /* FSMC Register */
37 0x50000000 0x0010 /* NAND Base DATA */
38 0x50020000 0x0010 /* NAND Base ADDR */
39 0x50010000 0x0010>; /* NAND Base CMD */
46 reg = <0x70000000 0x100>;
54 reg = <0xb3000000 0x1000>;
[all …]
H A Dspear600.dtsi12 #address-cells = <0>;
13 #size-cells = <0>;
23 reg = <0 0x40000000>;
30 ranges = <0xd0000000 0xd0000000 0x30000000>;
35 reg = <0xf1100000 0x1000>;
42 reg = <0xf1000000 0x1000>;
48 reg = <0xfc200000 0x1000>;
56 reg = <0xfc400000 0x1000>;
64 reg = <0xe0800000 0x8000>;
76 reg = <0xd1800000 0x1000 /* FSMC Register */
[all …]
H A Dspear13xx.dtsi15 #size-cells = <0>;
17 cpu@0 {
20 reg = <0>;
36 reg = < 0xec801000 0x1000 >,
37 < 0xec800100 0x0100 >;
42 interrupts = <0 6 0x04>,
43 <0
[all...]
/freebsd/sys/contrib/device-tree/Bindings/bus/
H A Dmvebu-mbus.txt65 pcie-mem-aperture = <0xe0000000 0x8000000>;
66 pcie-io-aperture = <0xe8000000 0x100000>;
73 reg = <0x20000 0x100>, <0x20180 0x20>, <0x20250 0x8>;
87 0xSIAA0000 0x00oooooo
91 S = 0x0 for a MBus valid window
92 S = 0xf for a non-valid window (see below)
94 If S = 0x0, then:
99 If S = 0xf, then:
105 (S = 0x0), an address decoding window is allocated. On the other side,
106 entries for translation that do not correspond to valid windows (S = 0xf)
[all …]
H A Dnvidia,tegra20-gmi.txt54 Programming 0 means 1 clock cycle: actual cycle = programmed cycle + 1
57 bus. Valid values are 0-15, default is 1
60 (in case of MASTER Request). Valid values are 0-15, default is 1
62 Valid values are 0-15, default is 1.
64 Valid values are 0-15, default is 4
66 Valid values are 0-15, default is 1
68 Valid values are 0-255, default is 1
70 Valid values are 0-255, default is 3
78 reg = <0x70009000 0x1000>;
85 ranges = <4 0 0xd0000000 0xfffffff>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/amlogic/
H A Dmeson6.dtsi14 #size-cells = <0>;
20 reg = <0x200>;
27 reg = <0x201>;
33 reg = <0xd0000000 0x40000>;
36 ranges = <0x0 0xd0000000 0x40000>;
39 clk81: clk@0 {
40 #clock-cells = <0>;
/freebsd/sys/contrib/device-tree/src/arm/arm/
H A Dintegratorap.dts17 #size-cells = <0>;
19 cpu@0 {
28 reg = <0>;
37 operating-points = <71000 0
38 66000 0
39 60000 0
40 48000 0
41 36000 0
42 24000 0
43 12000 0>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/marvell/
H A Darmada-xp-crs326-24g-2s.dtsi11 * internal registers to 0xf1000000 (instead of the default
12 * 0xd0000000). The 0xf1000000 is the default used by the recent,
15 * left internal registers mapped at 0xd0000000. If you are in this
33 reg = <0 0x00000000 0 0x20000000>; /* 512 MB */
50 devbus,badr-skew-ps = <0>;
53 devbus,rd-setup-ps = <0>;
54 devbus,rd-hold-ps = <0>;
57 devbus,sync-enable = <0>;
83 flash@0 {
87 reg = <0>; /* Chip select 0 */
[all …]
H A Darmada-xp-crs305-1g-4s.dtsi11 * internal registers to 0xf1000000 (instead of the default
12 * 0xd0000000). The 0xf1000000 is the default used by the recent,
15 * left internal registers mapped at 0xd0000000. If you are in this
33 reg = <0 0x00000000 0 0x20000000>; /* 512 MB */
50 devbus,badr-skew-ps = <0>;
53 devbus,rd-setup-ps = <0>;
54 devbus,rd-hold-ps = <0>;
57 devbus,sync-enable = <0>;
83 flash@0 {
87 reg = <0>; /* Chip select 0 */
[all …]
H A Darmada-xp-crs328-4c-20s-4s.dtsi11 * internal registers to 0xf1000000 (instead of the default
12 * 0xd0000000). The 0xf1000000 is the default used by the recent,
15 * left internal registers mapped at 0xd0000000. If you are in this
33 reg = <0 0x00000000 0 0x20000000>; /* 512 MB */
50 devbus,badr-skew-ps = <0>;
53 devbus,rd-setup-ps = <0>;
54 devbus,rd-hold-ps = <0>;
57 devbus,sync-enable = <0>;
83 flash@0 {
87 reg = <0>; /* Chip select 0 */
[all …]
H A Darmada-xp-db-dxbc2.dts10 * internal registers to 0xf1000000 (instead of the default
11 * 0xd0000000). The 0xf1000000 is the default used by the recent,
14 * left internal registers mapped at 0xd0000000. If you are in this
32 reg = <0 0x00000000 0 0x20000000>; /* 512 MB */
45 devbus,badr-skew-ps = <0>;
48 devbus,rd-setup-ps = <0>;
49 devbus,rd-hold-ps = <0>;
52 devbus,sync-enable = <0>;
74 nand@0 {
75 reg = <0>;
[all …]
H A Darmada-xp-db-xc3-24g4xg.dts10 * internal registers to 0xf1000000 (instead of the default
11 * 0xd0000000). The 0xf1000000 is the default used by the recent,
14 * left internal registers mapped at 0xd0000000. If you are in this
32 reg = <0 0x00000000 0 0x40000000>; /* 1 GB */
49 devbus,badr-skew-ps = <0>;
52 devbus,rd-setup-ps = <0>;
53 devbus,rd-hold-ps = <0>;
56 devbus,sync-enable = <0>;
78 nand@0 {
79 reg = <0>;
[all …]
H A Darmada-370-synology-ds213j.dts8 * internal registers to 0xf1000000 (instead of the old 0xd0000000).
9 * The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
13 * registers mapped at 0xd0000000. If you have such a device you will
18 * (s/0xf1000000/0xd0000000/ in 'ranges' below).
36 memory@0 {
[all...]
H A Darmada-xp-synology-ds414.dts8 * internal registers to 0xf1000000 (instead of the old 0xd0000000).
9 * The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
13 * registers mapped at 0xd0000000. If you have such a device you will
18 * (s/0xf1000000/0xd0000000/ in 'ranges' below).
36 memory@0 {
[all...]
H A Darmada-370-db.dts13 * internal registers to 0xf1000000 (instead of the default
14 * 0xd0000000). The 0xf1000000 is the default used by the recent,
17 * left internal registers mapped at 0xd0000000. If you are in this
33 memory@0 {
35 reg = <0x00000000 0x40000000>; /* 1 GB */
39 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
40 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
41 MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
53 pinctrl-0 = <&ge0_rgmii_pins>;
60 pinctrl-0 = <&ge1_rgmii_pins>;
[all …]
H A Darmada-xp-db.dts14 * internal registers to 0xf1000000 (instead of the default
15 * 0xd0000000). The 0xf1000000 is the default used by the recent,
18 * left internal registers mapped at 0xd0000000. If you are in this
34 memory@0 {
36 reg = <0 0x00000000 0 0x80000000>; /* 2 GB */
40 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
41 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
42 MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000
43 MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
44 MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000
[all …]
H A Darmada-xp-gp.dts13 * internal registers to 0xf1000000 (instead of the default
14 * 0xd0000000). The 0xf1000000 is the default used by the recent,
17 * left internal registers mapped at 0xd0000000. If you are in this
34 memory@0 {
41 * 0xF0000000 to 0xFFFFFFFF cannot be used, as it is
45 reg = <0x00000000 0x00000000 0x00000000 0xf0000000>,
46 <0x00000001 0x00000000 0x00000001 0x00000000>;
58 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
59 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
60 MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000
[all …]
H A Darmada-370-rd.dts11 * internal registers to 0xf1000000 (instead of the default
12 * 0xd0000000). The 0xf1000000 is the default used by the recent,
15 * left internal registers mapped at 0xd0000000. If you are in this
35 memory@0 {
37 reg = <0x00000000 0x20000000>; /* 512 MB */
41 ranges = <MBUS_ID(0xf
[all...]
/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Ddesignware-pcie.txt46 0x00-0xff is assumed if not present)
55 reg = <0xdfc00000 0x0001000>, /* IP registers */
56 <0xd0000000 0x0002000>; /* Configuration space */
61 ranges = <0x81000000 0 0x00000000 0xde000000 0 0x00010000
62 0x82000000 0 0xd0400000 0xd0400000 0 0x0d000000>;
70 reg = <0xdfc00000 0x0001000>, /* IP registers 1 */
71 <0xdfc01000 0x0001000>, /* IP registers 2 */
72 <0xd0000000 0x2000000>; /* Configuration space */
/freebsd/sys/contrib/device-tree/Bindings/ufs/
H A Dtc-dwc-g210-pltfrm.txt24 reg = < 0xd0000000 0x10000 >;
H A Dsnps,tc-dwc-g210.yaml49 reg = <0xd0000000 0x10000>;
/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Datmel-quadspi.txt18 - #size-cells: Should be <0>.
24 reg = <0xf0020000 0x100>, <0xd0000000 0x8000000>;
30 #size-cells = <0>;
32 pinctrl-0 = <&pinctrl_spi0_default>;
34 m25p80@0 {

1234