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Searched +full:0 +full:xc4000 (Results 1 – 22 of 22) sorted by relevance

/linux/drivers/media/tuners/
H A Dxc4000.c3 * Driver for Xceive XC4000 "QAM/8VSB single chip tuner"
23 #include "xc4000.h"
29 MODULE_PARM_DESC(debug, "Debugging level (0 to 2, default: 0 (off)).");
33 MODULE_PARM_DESC(no_poweroff, "Power management (1: disabled, 2: enabled, 0 (default): use device-s…
37 MODULE_PARM_DESC(audio_std, "Audio standard. XC4000 audio decoder explicitly needs to know what aud…
46 module_param_string(firmware_name, firmware_name, sizeof(firmware_name), 0);
53 printk(KERN_INFO "%s: " fmt, "xc4000", ## arg)
101 #define XC4000_DEFAULT_FIRMWARE "dvb-fe-xc4000-1.4.fw"
102 #define XC4000_DEFAULT_FIRMWARE_NEW "dvb-fe-xc4000-1.4.1.fw"
107 #define XC_POWERED_DOWN 0x80000000U
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H A Dxc4000.h3 * Driver for Xceive XC4000 "QAM/8VSB single chip tuner"
20 /* value to be written to XREG_AMPLITUDE in DVB-T mode (0: no write) */
22 /* if non-zero, register 0x0E is set to filter analog TV video output */
28 /* xc4000 callback command */
29 #define XC4000_TUNER_RESET 0
35 * The xc4000 driver cares not for this value, other than ensuring
H A Dtuner-types.c43 * 0x80 = Control Byte
44 * 0x40 = 250 uA charge pump (irrelevant)
45 * 0x18 = Aux Byte to follow
46 * 0x06 = 64.5 kHz divider (irrelevant)
47 * 0x01 = Disable Vt (aka sleep)
49 * 0x00 = AGC Time constant 2s Iagc = 300 nA (vs 0x80 = 9 nA)
50 * 0x50 = AGC Take over point = 103 dBuV
52 static u8 tua603x_agc103[] = { 2, 0x80|0x40|0x18|0x06|0x01, 0x00|0x50 };
54 /* 0x04 = 166.67 kHz divider
56 * 0x80 = AGC Time constant 50ms Iagc = 9 uA
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/linux/drivers/staging/media/atomisp/pci/
H A Datomisp-regs.h23 #define PCICMDSTS 0x01
24 #define INTR 0x0f
25 #define MSI_CAPID 0x24
26 #define MSI_ADDRESS 0x25
27 #define MSI_DATA 0x26
28 #define INTR_CTL 0x27
30 #define PCI_MSI_CAPID 0x90
31 #define PCI_MSI_ADDR 0x94
32 #define PCI_MSI_DATA 0x98
33 #define PCI_INTERRUPT_CTRL 0x9C
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/linux/Documentation/admin-guide/media/
H A Dcx23885-cardlist.rst11 :stub-columns: 0
17 * - 0
142 - Leadtek Winfast PxDVR3200 H XC4000
H A Dcx88-cardlist.rst11 :stub-columns: 0
17 * - 0
370 - Leadtek WinFast DTV1800 H (XC4000)
/linux/arch/arm/mach-imx/
H A Dmx3x.h36 #define MX3x_L2CC_BASE_ADDR 0x30000000
42 #define MX3x_AIPS1_BASE_ADDR 0x43f00000
44 #define MX3x_MAX_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x04000)
45 #define MX3x_EVTMON_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x08000)
46 #define MX3x_CLKCTL_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x0c000)
47 #define MX3x_ETB_SLOT4_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x10000)
48 #define MX3x_ETB_SLOT5_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x14000)
49 #define MX3x_ECT_CTIO_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x18000)
50 #define MX3x_I2C_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x80000)
51 #define MX3x_I2C3_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x84000)
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/linux/drivers/media/pci/cx88/
H A Dcx88-cards.c11 #include "xc4000.h"
19 static unsigned int tuner[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
20 static unsigned int radio[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
21 static unsigned int card[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
43 } while (0)
60 .vmux = 0,
81 .vmux = 0,
82 .gpio0 = 0xff00, // internal decoder
85 .vmux = 0,
86 .gpio0 = 0xff01, // mono from tuner chip
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H A Dcx88-dvb.c31 #include "xc4000.h"
71 } while (0)
84 sizes[0] = dev->ts_packet_size * dev->ts_packet_count; in queue_setup()
86 return 0; in queue_setup()
108 memset(risc, 0, sizeof(*risc)); in buffer_finish()
128 return 0; in start_streaming()
167 int ret = 0; in cx88_dvb_bus_ctrl()
184 dev->frontends.active_fe_id = 0; in cx88_dvb_bus_ctrl()
218 static const u8 clock_config[] = { CLOCK_CTL, 0x38, 0x39 }; in dvico_fusionhdtv_demod_init()
219 static const u8 reset[] = { RESET, 0x80 }; in dvico_fusionhdtv_demod_init()
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/linux/include/media/
H A Dtuner-types.h35 * Please notice that digital tuners like xc3028/xc4000/xc5000 don't use
98 * 0 means inactive, 1 means active. Note: the
100 * inverted. So a 0 here means a 1 in the B6 bit.
102 * 0 means inactive, 1 means active. Note: the
104 * inverted. So a 0 here means a 1 in the B7 bit.
112 * FM and 0 for stereo.
113 * @default_pll_gating_18: Select 18% (or according to datasheet 0%)
120 * 0 = 10.7, 1 = 33.3, 2 = 41.3
122 * band. Default is 0. Range: -16:+15
124 * band. Default is 0. Range: -16:+15
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/linux/Documentation/devicetree/bindings/net/
H A Dmarvell,pp2.yaml32 const: 0
59 '^(ethernet-)?port@[0-2]$':
92 "hifX", with X in [0..8], and "link". The names "tx-cpu0",
165 '^(ethernet-)?port@[0-2]$':
187 '^(ethernet-)?port@[0-1]$':
204 #size-cells = <0>;
206 reg = <0xf0000 0xa000>,
207 <0xc0000 0x3060>,
208 <0xc4000 0x100>,
209 <0xc5000 0x100>;
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/linux/arch/powerpc/boot/dts/fsl/
H A Dt4240si-post.dtsi37 alloc-ranges = <0 0 0x10000 0>;
42 alloc-ranges = <0 0 0x10000 0>;
47 alloc-ranges = <0 0 0x10000 0>;
54 interrupts = <25 2 0 0>;
57 /* controller at 0x240000 */
59 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
63 bus-range = <0x0 0xff>;
64 interrupts = <20 2 0 0>;
65 pcie@0 {
70 reg = <0 0 0 0 0>;
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/linux/arch/arm/boot/dts/marvell/
H A Darmada-375.dtsi36 #clock-cells = <0>;
42 #clock-cells = <0>;
49 #size-cells = <0>;
52 cpu0: cpu@0 {
55 reg = <0>;
75 pcie-mem-aperture = <0xe0000000 0x8000000>;
76 pcie-io-aperture = <0xe8000000 0x100000>;
80 reg = <MBUS_ID(0x01, 0x1d) 0 0x100000>;
85 reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
86 ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
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/linux/drivers/media/common/
H A Dtveeprom.c67 /* 0-9 */
236 { TUNER_ABSENT, "Xceive XC4000"},
284 /* 0-4 */
306 { TVEEPROM_AUDPROC_OTHER, "Type 0x12" },
319 { TVEEPROM_AUDPROC_MSP, "Type 0x1d" },
352 /* 0-4 */
412 return 0; in hasRadioTuner()
421 ** if packet[0] == 0x84, then packet[0..1] == length in tveeprom_hauppauge_analog()
422 ** else length = packet[0] & 3f; in tveeprom_hauppauge_analog()
423 ** if packet[0] & f8 == f8, then EOD and packet[1] == checksum in tveeprom_hauppauge_analog()
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/linux/drivers/media/pci/cx23885/
H A Dcx23885-cards.c22 #include "xc4000.h"
39 "\t\t Default: 0 [Disabled]");
48 .clk_freq = 0,
51 .vmux = 0,
68 .vmux = 0,
69 .gpio0 = 0xff00,
72 .vmux = 0,
73 .gpio0 = 0xff01,
77 .gpio0 = 0xff02,
81 .gpio0 = 0xff02,
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H A Dcx23885-dvb.c27 #include "xc4000.h"
76 } while (0)
97 sizes[0] = port->ts_packet_size * port->ts_packet_count; in queue_setup()
99 return 0; in queue_setup()
158 return 0; in cx23885_start_streaming()
180 .demod_address = 0x32 >> 1,
190 .demod_address = 0x10 >> 1,
201 .demod_address = 0x10 >> 1,
212 .demod_address = 0x32 >> 1,
222 .demod_address = 0x32 >> 1,
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/linux/drivers/media/usb/dvb-usb/
H A Ddib0700_devices.c17 #include "xc4000.h"
29 …vation of Low-Noise-Amplifier(s) (LNA), if applicable for the device (default: 0=automatic/off).");
42 .i2c_address = 0x60,
45 .i2c_address = 0x61,
52 .setup = (1 << 8) | (5 << 5) | (0 << 4) | (0 << 3) | (0 << 2) | (2 << 0),
57 .agc2_min = 0,
59 .agc1_pt1 = 0,
62 .agc1_slope1 = 0,
65 .agc2_pt1 = 0,
74 .max_time = 0x196,
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/linux/drivers/media/v4l2-core/
H A Dtuner-core.c43 #include "xc4000.h"
95 } while (0)
267 return 0; in fe_set_config()
308 dprintk("tuner 0x%02x: Tuner type absent\n", c->addr); in set_type()
350 buffer[0] = 0x0b; in set_type()
351 buffer[1] = 0xdc; in set_type()
352 buffer[2] = 0x9c; in set_type()
353 buffer[3] = 0x60; in set_type()
356 buffer[2] = 0x86; in set_type()
357 buffer[3] = 0x54; in set_type()
[all …]
/linux/drivers/clk/qcom/
H A Dgcc-sa8775p.c74 .offset = 0x0,
77 .enable_reg = 0x4b028,
78 .enable_mask = BIT(0),
89 { 0x1, 2 },
94 .offset = 0x0,
111 .offset = 0x1000,
114 .enable_reg = 0x4b028,
126 .offset = 0x4000,
129 .enable_reg = 0x4b028,
141 .offset = 0x5000,
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/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_dump.h22 #define DRV_DUMP_XSTORM_WAITP_ADDRESS 0x2b8a80
23 #define DRV_DUMP_TSTORM_WAITP_ADDRESS 0x1b8a80
24 #define DRV_DUMP_USTORM_WAITP_ADDRESS 0x338a80
25 #define DRV_DUMP_CSTORM_WAITP_ADDRESS 0x238a80
45 #define BNX2X_DUMP_VERSION 0x61111111
65 static const u32 page_vals_e2[] = {0, 128};
68 {0x58000, 4608, DUMP_CHIP_E2, 0x30}
74 static const u32 page_vals_e3[] = {0, 128};
77 {0x58000, 4608, DUMP_CHIP_E3A0 | DUMP_CHIP_E3B0, 0x30}
81 { 0x2000, 1, 0x1f, 0xfff},
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H A Dbnx2x_reg.h26 #define ATC_ATC_INT_STS_REG_ADDRESS_ERROR (0x1<<0)
27 #define ATC_ATC_INT_STS_REG_ATC_GPA_MULTIPLE_HITS (0x1<<2)
28 #define ATC_ATC_INT_STS_REG_ATC_IREQ_LESS_THAN_STU (0x1<<5)
29 #define ATC_ATC_INT_STS_REG_ATC_RCPL_TO_EMPTY_CNT (0x1<<3)
30 #define ATC_ATC_INT_STS_REG_ATC_TCPL_ERROR (0x1<<4)
31 #define ATC_ATC_INT_STS_REG_ATC_TCPL_TO_NOT_PEND (0x1<<1)
33 #define ATC_REG_ATC_INIT_ARRAY 0x1100b8
35 #define ATC_REG_ATC_INIT_DONE 0x1100bc
36 /* [RC 6] Interrupt register #0 read clear */
37 #define ATC_REG_ATC_INT_STS_CLR 0x1101c0
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/linux/drivers/gpu/drm/i915/
H A Di915_reg.h106 * #define _FOO_A 0xf000
107 * #define _FOO_B 0xf001
111 * #define FOO_MODE_BAR REG_FIELD_PREP(FOO_MODE_MASK, 0)
115 * #define BAR _MMIO(0xb000)
116 * #define GEN8_BAR _MMIO(0xb888)
119 #define GU_CNTL_PROTECTED _MMIO(0x10100C)
122 #define GU_CNTL _MMIO(0x101010)
125 #define GU_DEBUG _MMIO(0x101018)
128 #define GEN6_STOLEN_RESERVED _MMIO(0x1082C0)
129 #define GEN6_STOLEN_RESERVED_ADDR_MASK (0xFFF << 20)
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