| /linux/arch/arm/boot/dts/marvell/ |
| H A D | armada-395.dtsi | 19 reg = <0x18000 0x20>; 24 reg = <0xa8000 0x2000>; 32 reg = <0xf0000 0x4000>,<0xf4000 0x4000>;
|
| H A D | armada-38x.dtsi | 42 pcie-mem-aperture = <0xe0000000 0x8000000>; 43 pcie-io-aperture = <0xe8000000 0x100000>; 47 reg = <MBUS_ID(0x01, 0x1d) 0 0x200000>; 52 reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>; 53 ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>; 56 clocks = <&coreclk 0>; 62 reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>; 63 ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>; 66 clocks = <&coreclk 0>; 72 reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>; [all …]
|
| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | qoriq-fman3-0-1g-0.dtsi | 3 * QorIQ FMan v3 1g port #0 device tree 11 cell-index = <0x8>; 13 reg = <0x88000 0x1000>; 17 cell-index = <0x28>; 19 reg = <0xa8000 0x1000>; 23 cell-index = <0>; 25 reg = <0xe0000 0x1000>; 34 #size-cells = <0>; 36 reg = <0xe1000 0x1000>; 38 pcsphy0: ethernet-phy@0 { [all …]
|
| /linux/Documentation/devicetree/bindings/phy/ |
| H A D | qcom-usb-ipq4019-phy.yaml | 30 const: 0 46 #phy-cells = <0>; 48 reg = <0xa8000 0x40>;
|
| /linux/arch/powerpc/boot/dts/fsl/ |
| H A D | qoriq-fman3-0-10g-2.dtsi | 3 * QorIQ FMan v3 10g port #2 device tree stub [ controller @ offset 0x400000 ] 11 cell-index = <0x8>; 13 reg = <0x88000 0x1000>; 18 cell-index = <0x28>; 20 reg = <0xa8000 0x1000>; 25 cell-index = <0>; 27 reg = <0xe0000 0x1000>; 36 #size-cells = <0>; 38 reg = <0xe1000 0x1000>; 41 pcsphy0: ethernet-phy@0 { [all …]
|
| H A D | qoriq-fman-0-1g-0.dtsi | 2 * QorIQ FMan 1g port #0 device tree stub [ controller @ offset 0x400000 ] 37 cell-index = <0x8>; 39 reg = <0x88000 0x1000>; 43 cell-index = <0x28>; 45 reg = <0xa8000 0x1000>; 49 cell-index = <0>; 51 reg = <0xe0000 0x1000>; 59 #size-cells = <0>; 61 reg = <0xe1120 0xee0>; 62 interrupts = <100 2 0 0>; [all …]
|
| H A D | qoriq-fman3-1-1g-0.dtsi | 2 * QorIQ FMan v3 1g port #0 device tree stub [ controller @ offset 0x500000 ] 37 cell-index = <0x8>; 39 reg = <0x88000 0x1000>; 43 cell-index = <0x28>; 45 reg = <0xa8000 0x1000>; 49 cell-index = <0>; 51 reg = <0xe0000 0x1000>; 60 #size-cells = <0>; 62 reg = <0xe1000 0x1000>; 65 pcsphy8: ethernet-phy@0 { [all …]
|
| H A D | qoriq-fman3-0-1g-0.dtsi | 2 * QorIQ FMan v3 1g port #0 device tree stub [ controller @ offset 0x400000 ] 37 cell-index = <0x8>; 39 reg = <0x88000 0x1000>; 43 cell-index = <0x28>; 45 reg = <0xa8000 0x1000>; 49 cell-index = <0>; 51 reg = <0xe0000 0x1000>; 60 #size-cells = <0>; 62 reg = <0xe1000 0x1000>; 65 pcsphy0: ethernet-phy@0 { [all …]
|
| H A D | qoriq-fman-1-1g-0.dtsi | 2 * QorIQ FMan 1g port #0 device tree stub [ controller @ offset 0x500000 ] 37 cell-index = <0x8>; 39 reg = <0x88000 0x1000>; 43 cell-index = <0x28>; 45 reg = <0xa8000 0x1000>; 49 cell-index = <0>; 51 reg = <0xe0000 0x1000>; 59 #size-cells = <0>; 61 reg = <0xe1120 0xee0>; 64 reg = <0x8>;
|
| H A D | qoriq-fman3-0-10g-0-best-effort.dtsi | 2 * QorIQ FMan v3 1g port #0 device tree stub [ controller @ offset 0x400000 ] 37 cell-index = <0x8>; 39 reg = <0x88000 0x1000>; 45 cell-index = <0x28>; 47 reg = <0xa8000 0x1000>; 53 cell-index = <0>; 55 reg = <0xe0000 0x1000>; 64 #size-cells = <0>; 66 reg = <0xe1000 0x1000>; 69 pcsphy0: ethernet-phy@0 { [all …]
|
| H A D | t4240si-post.dtsi | 37 alloc-ranges = <0 0 0x10000 0>; 42 alloc-ranges = <0 0 0x10000 0>; 47 alloc-ranges = <0 0 0x10000 0>; 54 interrupts = <25 2 0 0>; 57 /* controller at 0x240000 */ 59 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0"; 63 bus-range = <0x0 0xff>; 64 interrupts = <20 2 0 0>; 65 pcie@0 { 70 reg = <0 0 0 0 0>; [all …]
|
| /linux/Documentation/devicetree/bindings/net/ |
| H A D | fsl,fman-port.yaml | 72 reg = <0xa8000 0x1000>; 73 cell-index = <0x28>;
|
| H A D | fsl,fman.yaml | 22 FMan block. The offset is 0xc4 from the beginning of the 23 Frame Processing Manager memory map (0xc3000 from the 38 DEVDISR[1] 1 0 43 DCFG_DEVDISR2[6] 1 0 50 DCFG_CCSR_DEVDISR2[24] 1 0 156 reg = <0x400000 0x100000>; 157 ranges = <0 0x400000 0x100000>; 165 fsl,qman-channel-range = <0x40 0xc>; 167 muram@0 { 169 reg = <0x0 0x28000>; [all …]
|
| /linux/arch/arm/mach-imx/ |
| H A D | mx3x.h | 36 #define MX3x_L2CC_BASE_ADDR 0x30000000 42 #define MX3x_AIPS1_BASE_ADDR 0x43f00000 44 #define MX3x_MAX_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x04000) 45 #define MX3x_EVTMON_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x08000) 46 #define MX3x_CLKCTL_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x0c000) 47 #define MX3x_ETB_SLOT4_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x10000) 48 #define MX3x_ETB_SLOT5_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x14000) 49 #define MX3x_ECT_CTIO_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x18000) 50 #define MX3x_I2C_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x80000) 51 #define MX3x_I2C3_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x84000) [all …]
|
| /linux/drivers/net/wireless/ath/ath10k/ |
| H A D | coredump.c | 21 {0x800, 0x810}, 22 {0x820, 0x82C}, 23 {0x830, 0x8F4}, 24 {0x90C, 0x91C}, 25 {0xA14, 0xA18}, 26 {0xA84, 0xA94}, 27 {0xAA8, 0xAD4}, 28 {0xADC, 0xB40}, 29 {0x1000, 0x10A4}, 30 {0x10BC, 0x111C}, [all …]
|
| /linux/drivers/interconnect/qcom/ |
| H A D | milos.c | 142 .port_offsets = { 0xc000 }, 144 .urg_fwd = 0, 159 .port_offsets = { 0xf200 }, 161 .urg_fwd = 0, 176 .port_offsets = { 0x10000 }, 178 .urg_fwd = 0, 193 .port_offsets = { 0x14000 }, 195 .urg_fwd = 0, 210 .port_offsets = { 0x12000 }, 212 .urg_fwd = 0, [all …]
|
| /linux/arch/arm/boot/dts/ti/omap/ |
| H A D | omap5-l4.dtsi | 1 &l4_cfg { /* 0x4a000000 */ 4 clocks = <&l4cfg_clkctrl OMAP5_L4_CFG_CLKCTRL 0>; 6 reg = <0x4a000000 0x800>, 7 <0x4a000800 0x800>, 8 <0x4a001000 0x1000>; 12 ranges = <0x00000000 0x4a000000 0x080000>, /* segment 0 */ 13 <0x00080000 0x4a080000 0x080000>, /* segment 1 */ 14 <0x00100000 0x4a100000 0x080000>, /* segment 2 */ 15 <0x00180000 0x4a180000 0x080000>, /* segment 3 */ 16 <0x00200000 0x4a200000 0x080000>, /* segment 4 */ [all …]
|
| H A D | omap4-l4.dtsi | 2 &l4_cfg { /* 0x4a000000 */ 5 clocks = <&l4_cfg_clkctrl OMAP4_L4_CFG_CLKCTRL 0>; 7 reg = <0x4a000000 0x800>, 8 <0x4a000800 0x800>, 9 <0x4a001000 0x1000>; 13 ranges = <0x00000000 0x4a000000 0x080000>, /* segment 0 */ 14 <0x00080000 0x4a080000 0x080000>, /* segment 1 */ 15 <0x00100000 0x4a100000 0x080000>, /* segment 2 */ 16 <0x00180000 0x4a180000 0x080000>, /* segment 3 */ 17 <0x00200000 0x4a200000 0x080000>, /* segment 4 */ [all …]
|
| /linux/drivers/media/pci/bt8xx/ |
| H A D | bttv-cards.c | 85 static unsigned int card[BTTV_MAX] = { [ 0 ... (BTTV_MAX-1) ] = UNSET }; 86 static unsigned int pll[BTTV_MAX] = { [ 0 ... (BTTV_MAX-1) ] = UNSET }; 87 static unsigned int tuner[BTTV_MAX] = { [ 0 ... (BTTV_MAX-1) ] = UNSET }; 88 static unsigned int svhs[BTTV_MAX] = { [ 0 ... (BTTV_MAX-1) ] = UNSET }; 89 static unsigned int remote[BTTV_MAX] = { [ 0 ... (BTTV_MAX-1) ] = UNSET }; 92 static struct bttv *master[BTTV_MAX] = { [ 0 ... (BTTV_MAX-1) ] = NULL }; 96 static unsigned int audiomux[5] = { [ 0 ... 4 ] = UNSET }; 118 MODULE_PARM_DESC(pll, "specify installed crystal (0=none, 28=28 MHz, 35=35 MHz, 14=14 MHz)"); 123 "\t\t 0 = autodetect (default)\n" 127 MODULE_PARM_DESC(saa6588, "if 1, then load the saa6588 RDS module, default (0) is to use the card d… [all …]
|