| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | qcom,gpucc-sdm660.yaml | 54 reg = <0x05065000 0x9038>;
|
| /linux/drivers/gpu/drm/radeon/ |
| H A D | rv770.c | 56 unsigned fb_div = 0, vclk_div = 0, dclk_div = 0; in rv770_set_uvd_clocks() 71 return 0; in rv770_set_uvd_clocks() 75 43663, 0x03FFFFFE, 1, 30, ~0, in rv770_set_uvd_clocks() 84 /* set UPLL_FB_DIV to 0x50000 */ in rv770_set_uvd_clocks() 85 WREG32_P(CG_UPLL_FUNC_CNTL_3, UPLL_FB_DIV(0x50000), ~UPLL_FB_DIV_MASK); in rv770_set_uvd_clocks() 88 WREG32_P(CG_UPLL_FUNC_CNTL, 0, ~(UPLL_RESET_MASK | UPLL_SLEEP_MASK)); in rv770_set_uvd_clocks() 90 /* assert BYPASS EN and FB_DIV[0] <- ??? why? */ in rv770_set_uvd_clocks() 117 WREG32_P(CG_UPLL_FUNC_CNTL, 0, ~UPLL_RESET_MASK); in rv770_set_uvd_clocks() 121 /* deassert BYPASS EN and FB_DIV[0] <- ??? why? */ in rv770_set_uvd_clocks() 122 WREG32_P(CG_UPLL_FUNC_CNTL, 0, ~UPLL_BYPASS_EN_MASK); in rv770_set_uvd_clocks() [all …]
|
| H A D | evergreen.c | 50 #define DC_HPDx_CONTROL(x) (DC_HPD1_CONTROL + (x * 0xc)) 51 #define DC_HPDx_INT_CONTROL(x) (DC_HPD1_INT_CONTROL + (x * 0xc)) 52 #define DC_HPDx_INT_STATUS_REG(x) (DC_HPD1_INT_STATUS + (x * 0xc)) 63 WREG32(EVERGREEN_CG_IND_ADDR, ((reg) & 0xffff)); in eg_cg_rreg() 74 WREG32(EVERGREEN_CG_IND_ADDR, ((reg) & 0xffff)); in eg_cg_wreg() 85 WREG32(EVERGREEN_PIF_PHY0_INDEX, ((reg) & 0xffff)); in eg_pif_phy0_rreg() 96 WREG32(EVERGREEN_PIF_PHY0_INDEX, ((reg) & 0xffff)); in eg_pif_phy0_wreg() 107 WREG32(EVERGREEN_PIF_PHY1_INDEX, ((reg) & 0xffff)); in eg_pif_phy1_rreg() 118 WREG32(EVERGREEN_PIF_PHY1_INDEX, ((reg) & 0xffff)); in eg_pif_phy1_wreg() 137 0x98fc, [all …]
|
| H A D | ni.c | 70 0x98fc, 71 0x98f0, 72 0x9834, 73 0x9838, 74 0x9870, 75 0x9874, 76 0x8a14, 77 0x8b24, 78 0x8bcc, 79 0x8b10, [all …]
|
| /linux/drivers/clk/qcom/ |
| H A D | camcc-sm6350.c | 37 { 249600000, 2000000000, 0 }, 42 .l = 0x1f, 43 .alpha = 0x4000, 44 .config_ctl_val = 0x20485699, 45 .config_ctl_hi_val = 0x00002067, 46 .test_ctl_val = 0x40000000, 47 .test_ctl_hi_val = 0x00000002, 48 .user_ctl_val = 0x00000101, 49 .user_ctl_hi_val = 0x00004805, 53 .offset = 0x0, [all …]
|
| H A D | camcc-sm8250.c | 36 { 249600000, 2000000000, 0 }, 40 { 595200000UL, 3600000000UL, 0 }, 44 .l = 0x3e, 45 .alpha = 0x8000, 46 .config_ctl_val = 0x20485699, 47 .config_ctl_hi_val = 0x00002261, 48 .config_ctl_hi1_val = 0x329A699c, 49 .user_ctl_val = 0x00003100, 50 .user_ctl_hi_val = 0x00000805, 51 .user_ctl_hi1_val = 0x00000000, [all …]
|
| H A D | camcc-sdm845.c | 30 .offset = 0x0, 45 { 0x0, 1 }, 46 { 0x1, 2 }, 51 .offset = 0x0, 68 .offset = 0x1000, 83 .offset = 0x1000, 100 .offset = 0x2000, 115 .offset = 0x2000, 132 .offset = 0x3000, 147 .offset = 0x3000, [all …]
|
| /linux/drivers/crypto/inside-secure/ |
| H A D | safexcel.c | 36 * Map all interfaces/rings to register index 0 in eip197_trc_cache_setupvirt() 44 for (i = 0; i < 4; i++) in eip197_trc_cache_setupvirt() 45 writel(0, priv->base + EIP197_FLUE_IFC_LUT(i)); in eip197_trc_cache_setupvirt() 51 for (i = 0; i < priv->config.rings; i++) { in eip197_trc_cache_setupvirt() 52 writel(0, priv->base + EIP197_FLUE_CACHEBASE_LO(i)); in eip197_trc_cache_setupvirt() 53 writel(0, priv->base + EIP197_FLUE_CACHEBASE_HI(i)); in eip197_trc_cache_setupvirt() 57 writel(0, priv->base + EIP197_FLUE_OFFSETS); in eip197_trc_cache_setupvirt() 58 writel(0, priv->base + EIP197_FLUE_ARC4_OFFSET); in eip197_trc_cache_setupvirt() 88 addrlo = 0; in eip197_trc_cache_probe() 89 actbank = min(maxbanks - 1, 0); in eip197_trc_cache_probe() [all …]
|
| /linux/drivers/net/usb/ |
| H A D | qmi_wwan.c | 59 QMI_WWAN_FLAG_RAWIP = 1 << 0, 65 QMI_WWAN_QUIRK_DTR = 1 << 0, /* needs "set DTR" request */ 89 return 0; in qmimux_open() 95 return 0; in qmimux_stop() 106 hdr->pad = 0; in qmimux_start_xmit() 130 dev->hard_header_len = 0; in qmimux_setup() 131 dev->addr_len = 0; in qmimux_setup() 164 unsigned int len, offset = 0, pad_len, pkt_len; in qmimux_rx_fixup() 176 return 0; in qmimux_rx_fixup() 179 if (hdr->pad & 0x80) in qmimux_rx_fixup() [all …]
|
| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | sdm630.dtsi | 36 #clock-cells = <0>; 43 #clock-cells = <0>; 51 #size-cells = <0>; 56 reg = <0x0 0x100>; 76 reg = <0x0 0x101>; 91 reg = <0x0 0x102>; 106 reg = <0x0 0x103>; 118 cpu4: cpu@0 { 121 reg = <0x0 0x0>; 141 reg = <0x0 0x1>; [all …]
|
| /linux/fs/nls/ |
| H A D | nls_cp932.c | 17 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x00-0x07 */ 18 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x08-0x0F */ 19 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x10-0x17 */ 20 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x18-0x1F */ 21 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x20-0x27 */ 22 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x28-0x2F */ 23 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x30-0x37 */ 24 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x38-0x3F */ 25 0x3000,0x3001,0x3002,0xFF0C,0xFF0E,0x30FB,0xFF1A,0xFF1B,/* 0x40-0x47 */ 26 0xFF1F,0xFF01,0x309B,0x309C,0x00B4,0xFF40,0x00A8,0xFF3E,/* 0x48-0x4F */ [all …]
|
| H A D | nls_cp950.c | 17 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x00-0x07 */ 18 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x08-0x0F */ 19 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x10-0x17 */ 20 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x18-0x1F */ 21 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x20-0x27 */ 22 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x28-0x2F */ 23 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x30-0x37 */ 24 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x38-0x3F */ 25 0x3000,0xFF0C,0x3001,0x3002,0xFF0E,0x2027,0xFF1B,0xFF1A,/* 0x40-0x47 */ 26 0xFF1F,0xFF01,0xFE30,0x2026,0x2025,0xFE50,0xFE51,0xFE52,/* 0x48-0x4F */ [all …]
|
| H A D | nls_cp936.c | 17 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x00-0x07 */ 18 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x08-0x0F */ 19 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x10-0x17 */ 20 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x18-0x1F */ 21 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x20-0x27 */ 22 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x28-0x2F */ 23 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x30-0x37 */ 24 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x38-0x3F */ 25 0x4E02,0x4E04,0x4E05,0x4E06,0x4E0F,0x4E12,0x4E17,0x4E1F,/* 0x40-0x47 */ 26 0x4E20,0x4E21,0x4E23,0x4E26,0x4E29,0x4E2E,0x4E2F,0x4E31,/* 0x48-0x4F */ [all …]
|
| H A D | nls_cp949.c | 17 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x00-0x07 */ 18 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x08-0x0F */ 19 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x10-0x17 */ 20 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x18-0x1F */ 21 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x20-0x27 */ 22 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x28-0x2F */ 23 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x30-0x37 */ 24 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x38-0x3F */ 25 0x0000,0xAC02,0xAC03,0xAC05,0xAC06,0xAC0B,0xAC0C,0xAC0D,/* 0x40-0x47 */ 26 0xAC0E,0xAC0F,0xAC18,0xAC1E,0xAC1F,0xAC21,0xAC22,0xAC23,/* 0x48-0x4F */ [all …]
|
| /linux/drivers/net/wireless/realtek/rtw89/ |
| H A D | rtw8852b_table.c | 10 {0x704, 0x601E0100}, 11 {0x4000, 0x00000000}, 12 {0x4004, 0xCA014000}, 13 {0x4008, 0xC751D4F0}, 14 {0x400C, 0x44511475}, 15 {0x4010, 0x00000000}, 16 {0x4014, 0x00000000}, 17 {0x4018, 0x4F4C084B}, 18 {0x401C, 0x084A4E52}, 19 {0x4020, 0x4D504E4B}, [all …]
|
| H A D | rtw8852a_table.c | 10 {0xF0FF0001, 0x00000000}, 11 {0xF03300FF, 0x00000001}, 12 {0xF03500FF, 0x00000002}, 13 {0xF03200FF, 0x00000003}, 14 {0xF03400FF, 0x00000004}, 15 {0xF03600FF, 0x00000005}, 16 {0x704, 0x601E0100}, 17 {0x714, 0x00000000}, 18 {0x718, 0x13332333}, 19 {0x714, 0x00010000}, [all …]
|
| H A D | rtw8852c_table.c | 10 {0xF0FF0000, 0x00000000}, 11 {0xF03300FF, 0x00000001}, 12 {0xF03400FF, 0x00000002}, 13 {0xF03500FF, 0x00000003}, 14 {0xF03600FF, 0x00000004}, 15 {0x70C, 0x00000020}, 16 {0x704, 0x601E0100}, 17 {0x4000, 0x00000000}, 18 {0x4004, 0xCA014000}, 19 {0x4008, 0xC751D4F0}, [all …]
|