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/freebsd/sys/contrib/device-tree/Bindings/usb/
H A Dusb-xhci.yaml44 reg = <0xf0930000 0x8c8>;
45 interrupts = <0x0 0x4e 0x0>;
H A Dgeneric-xhci.yaml82 reg = <0xf0931000 0x8c8>;
83 interrupts = <0x0 0x4e 0x0>;
H A Dusb-xhci.txt39 reg = <0xf0931000 0x8c8>;
40 interrupts = <0x0 0x4e 0x0>;
/freebsd/sys/contrib/device-tree/include/dt-bindings/pinctrl/
H A Dam33xx.h18 #define SLEWCTRL_FAST 0
30 #define PIN_OUTPUT_PULLDOWN 0
43 #define AM335X_PIN_OFFSET_MIN 0x0800U
45 #define AM335X_PIN_GPMC_AD0 0x800
46 #define AM335X_PIN_GPMC_AD1 0x804
47 #define AM335X_PIN_GPMC_AD2 0x808
48 #define AM335X_PIN_GPMC_AD3 0x80c
49 #define AM335X_PIN_GPMC_AD4 0x810
50 #define AM335X_PIN_GPMC_AD5 0x814
51 #define AM335X_PIN_GPMC_AD6 0x818
[all …]
/freebsd/sys/contrib/dev/rtw88/
H A Drtw8822b.h13 u8 res4[4]; /* 0xd0 */
15 u8 res5[0x1e];
17 u8 serial[0x0b]; /* 0xf5 */
18 u8 vid; /* 0x100 */
22 u8 mac_addr[ETH_ALEN]; /* 0x107 */
24 u8 vendor_name[0x07];
26 u8 device_name[0x14];
27 u8 res11[0xcf];
28 u8 package_type; /* 0x1fb */
29 u8 res12[0x4];
[all …]
H A Drtw8821c.h13 u8 res4[4]; /* 0xd0 */
15 u8 res5[0x1e];
17 u8 serial[0x0b]; /* 0xf5 */
18 u8 vid; /* 0x100 */
22 u8 mac_addr[ETH_ALEN]; /* 0x107 */
24 u8 vendor_name[0x07];
26 u8 device_name[0x14];
27 u8 res11[0xcf];
28 u8 package_type; /* 0x1f
[all...]
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Dam437x-sbc-t43.dts21 AM4372_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
22 AM4372_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
23 AM4372_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
24 AM4372_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
25 AM4372_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
26 AM4372_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
27 AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
28 AM4372_IOPAD(0x964, PIN_INPUT | MUX_MODE7) /* ecap0_in_pwm0_out.gpio0_7 */
34 AM4372_IOPAD(0x9b0, PIN_OUTPUT_PULLUP | MUX_MODE2) /* cam0 hd -> DSS DATA 23 */
35 AM4372_IOPAD(0x9b4, PIN_OUTPUT_PULLUP | MUX_MODE2)
[all …]
H A Dam335x-guardian.dts22 cpu@0 {
29 reg = <0x80000000 0x10000000>; /* 256 MB */
34 pinctrl-0 = <&guardian_button_pins>;
54 pinctrl-0 = <&guardian_led_pins>;
73 pinctrl-0 = <&lcd_pins_default &lcd_disen_pins>;
87 hsync-active = <0>;
88 vsync-active = <0>;
93 ac-bias-intrpt = <0>;
97 fdd = <0x80>;
98 sync-edge = <0>;
[all …]
H A Dam437x-sk-evm.dts31 #clock-cells = <0>;
38 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
39 brightness-levels = <0 51 53 56 62 75 101 152 255>;
73 pinctrl-0 = <&matrix_keypad_pins>;
85 MATRIX_KEY(0, 0, KEY_DOWN)
86 MATRIX_KEY(0, 1, KEY_RIGHT)
87 MATRIX_KEY(1, 0, KEY_LEFT)
96 pinctrl-0 = <&leds_pins>;
100 gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 0 */
131 pinctrl-0 = <&lcd_pins>;
[all …]
H A Dam43x-epos-evm.dts62 pinctrl-0 = <&matrix_keypad_default>;
76 linux,keymap = <0x00000201 /* P1 */
77 0x01000204 /* P4 */
78 0x02000207 /* P7 */
79 0x0300020a /* NUMERIC_STAR */
80 0x00010202 /* P2 */
81 0x01010205 /* P5 */
82 0x02010208 /* P8 */
83 0x03010200 /* P0 */
84 0x00020203 /* P3 */
[all …]
H A Dam437x-gp-evm.dts57 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
58 brightness-levels = <0 51 53 56 62 75 101 152 255>;
68 pinctrl-0 = <&matrix_keypad_default>;
80 linux,keymap = <0x00000201 /* P1 */
81 0x00010202 /* P2 */
82 0x01000067 /* UP */
83 0x0101006a /* RIGHT */
84 0x02000069 /* LEFT */
85 0x0201006c>; /* DOWN */
103 #clock-cells = <0>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/broadcom/bcm4908/
H A Dbcm4908.dtsi26 #size-cells = <0>;
28 cpu0: cpu@0 {
31 reg = <0x0>;
33 cpu-release-addr = <0x0 0xfff8>;
40 reg = <0x1>;
42 cpu-release-addr = <0x0 0xfff8>;
49 reg = <0x2>;
51 cpu-release-addr = <0x0 0xfff8>;
58 reg = <0x3>;
60 cpu-release-addr = <0x0 0xfff8>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/broadcom/bcmbca/
H A Dbcm4908.dtsi26 #size-cells = <0>;
28 cpu0: cpu@0 {
31 reg = <0x0>;
33 cpu-release-addr = <0x0 0xfff8>;
40 reg = <0x1>;
42 cpu-release-addr = <0x0 0xfff8>;
49 reg = <0x2>;
51 cpu-release-addr = <0x
[all...]
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6dl-pinfunc.h13 #define MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x04c 0x360 0x000 0x0 0x0
14 #define MX6QDL_PAD_CSI0_DAT10__AUD3_RXC 0x04c 0x360 0x000 0x1 0x0
15 #define MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO 0x04c 0x360 0x7f8 0x2 0x0
16 #define MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x04c 0x360 0x000 0x3 0x0
17 #define MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA 0x04c 0x360 0x8fc 0x3 0x0
18 #define MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28 0x04c 0x360 0x000 0x5 0x0
19 #define MX6QDL_PAD_CSI0_DAT10__ARM_TRACE07 0x04c 0x360 0x000 0x7 0x0
20 #define MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x050 0x364 0x000 0x0 0x0
21 #define MX6QDL_PAD_CSI0_DAT11__AUD3_RXFS 0x050 0x364 0x000 0x1 0x0
22 #define MX6QDL_PAD_CSI0_DAT11__ECSPI2_SS0 0x050 0x364 0x800 0x2 0x0
[all …]
H A Dimx51-pinfunc.h13 #define MX51_PAD_EIM_D16__AUD4_RXFS 0x05c 0x3f0 0x000 0x5 0x0
14 #define MX51_PAD_EIM_D16__AUD5_TXD 0x05c 0x3f0 0x8d8 0x7 0x0
15 #define MX51_PAD_EIM_D16__EIM_D16 0x05c 0x3f0 0x000 0x0 0x0
16 #define MX51_PAD_EIM_D16__GPIO2_0 0x05c 0x3f0 0x000 0x1 0x0
17 #define MX51_PAD_EIM_D16__I2C1_SDA 0x05c 0x3f0 0x9b4 0x4 0x0
18 #define MX51_PAD_EIM_D16__UART2_CTS 0x05c 0x3f0 0x000 0x3 0x0
19 #define MX51_PAD_EIM_D16__USBH2_DATA0 0x05c 0x3f0 0x000 0x2 0x0
20 #define MX51_PAD_EIM_D17__AUD5_RXD 0x060 0x3f4 0x8d4 0x7 0x0
21 #define MX51_PAD_EIM_D17__EIM_D17 0x060 0x3f4 0x000 0x0 0x0
22 #define MX51_PAD_EIM_D17__GPIO2_1 0x060 0x3f4 0x000 0x1 0x0
[all …]
H A Dimx35-pinfunc.h13 #define MX35_PAD_CAPTURE__GPT_CAPIN1 0x004 0x328 0x000 0x0 0x0
14 #define MX35_PAD_CAPTURE__GPT_CMPOUT2 0x004 0x328 0x000 0x1 0x0
15 #define MX35_PAD_CAPTURE__CSPI2_SS1 0x004 0x328 0x7f4 0x2 0x0
16 #define MX35_PAD_CAPTURE__EPIT1_EPITO 0x004 0x328 0x000 0x3 0x0
17 #define MX35_PAD_CAPTURE__CCM_CLK32K 0x004 0x328 0x7d0 0x4 0x0
18 #define MX35_PAD_CAPTURE__GPIO1_4 0x004 0x328 0x850 0x5 0x0
19 #define MX35_PAD_COMPARE__GPT_CMPOUT1 0x008 0x32c 0x000 0x0 0x0
20 #define MX35_PAD_COMPARE__GPT_CAPIN2 0x008 0x32c 0x000 0x1 0x0
21 #define MX35_PAD_COMPARE__GPT_CMPOUT3 0x008 0x32c 0x000 0x2 0x0
22 #define MX35_PAD_COMPARE__EPIT2_EPITO 0x008 0x32c 0x000 0x3 0x0
[all …]
H A Dimx6q-pinfunc.h13 #define MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x04c 0x360 0x000 0x0 0x0
14 #define MX6QDL_PAD_SD2_DAT1__ECSPI5_SS0 0x04c 0x360 0x834 0x1 0x0
15 #define MX6QDL_PAD_SD2_DAT1__EIM_CS2_B 0x04c 0x360 0x000 0x2 0x0
16 #define MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x04c 0x360 0x7c8 0x3 0x0
17 #define MX6QDL_PAD_SD2_DAT1__KEY_COL7 0x04c 0x360 0x8f0 0x4 0x0
18 #define MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x04c 0x360 0x000 0x5 0x0
19 #define MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x050 0x364 0x000 0x0 0x0
20 #define MX6QDL_PAD_SD2_DAT2__ECSPI5_SS1 0x050 0x364 0x838 0x1 0x0
21 #define MX6QDL_PAD_SD2_DAT2__EIM_CS3_B 0x050 0x364 0x000 0x2 0x0
22 #define MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x050 0x364 0x7b8 0x3 0x0
[all …]
/freebsd/sys/dev/rtwn/rtl8821a/
H A Dr21a_priv.h34 { 0x421, 0x0f }, { 0x428, 0x0a }, { 0x429, 0x10 }, { 0x430, 0x00 },
35 { 0x431, 0x00 }, { 0x432, 0x00 }, { 0x433, 0x01 }, { 0x434, 0x04 },
36 { 0x435, 0x05 }, { 0x436, 0x07 }, { 0x437, 0x08 }, { 0x43c, 0x04 },
37 { 0x43d, 0x05 }, { 0x43e, 0x07 }, { 0x43f, 0x08 }, { 0x440, 0x5d },
38 { 0x441, 0x01 }, { 0x442, 0x00 }, { 0x444, 0x10 }, { 0x445, 0x00 },
39 { 0x446, 0x00 }, { 0x447, 0x00 }, { 0x448, 0x00 }, { 0x449, 0xf0 },
40 { 0x44a, 0x0f }, { 0x44b, 0x3e }, { 0x44c, 0x10 }, { 0x44d, 0x00 },
41 { 0x44e, 0x00 }, { 0x44f, 0x00 }, { 0x450, 0x00 }, { 0x451, 0xf0 },
42 { 0x452, 0x0f }, { 0x453, 0x00 }, { 0x456, 0x5e }, { 0x460, 0x66 },
43 { 0x461, 0x66 }, { 0x4c8, 0x3f }, { 0x4c9, 0xff }, { 0x4cc, 0xff },
[all …]
/freebsd/tools/tools/cxgbtool/
H A Dreg_defs.c7 { "SG_CONTROL", 0x0, 0 },
8 { "CmdQ0_Enable", 0, 1 },
24 { "SG_DOORBELL", 0x4, 0 },
25 { "CmdQ0_Enable", 0, 1 },
29 { "SG_CMD0BASELWR", 0x8, 0 },
30 { "SG_CMD0BASEUPR", 0xc, 0 },
31 { "SG_CMD1BASELWR", 0x10, 0 },
32 { "SG_CMD1BASEUPR", 0x14, 0 },
33 { "SG_FL0BASELWR", 0x18, 0 },
34 { "SG_FL0BASEUPR", 0x1c, 0 },
[all …]
H A Dreg_defs_t3.c8 { "SG_CONTROL", 0x0, 0 },
22 { "GlobalEnable", 0, 1 },
23 { "SG_KDOORBELL", 0x4, 0 },
25 { "EgrCntx", 0, 16 },
26 { "SG_GTS", 0x8, 0 },
29 { "NewIndex", 0, 16 },
30 { "SG_CONTEXT_CMD", 0xc, 0 },
38 { "Context", 0, 16 },
39 { "SG_CONTEXT_DATA0", 0x10, 0 },
40 { "SG_CONTEXT_DATA1", 0x14, 0 },
[all …]
H A Dreg_defs_t3b.c7 { "SG_CONTROL", 0x0, 0 },
26 { "GlobalEnable", 0, 1 },
27 { "SG_KDOORBELL", 0x4, 0 },
29 { "EgrCntx", 0, 16 },
30 { "SG_GTS", 0x8, 0 },
33 { "NewIndex", 0, 16 },
34 { "SG_CONTEXT_CMD", 0xc, 0 },
42 { "Context", 0, 16 },
43 { "SG_CONTEXT_DATA0", 0x10, 0 },
44 { "SG_CONTEXT_DATA1", 0x14, 0 },
[all …]
H A Dreg_defs_t3c.c7 { "SG_CONTROL", 0x0, 0 },
29 { "GlobalEnable", 0, 1 },
30 { "SG_KDOORBELL", 0x4, 0 },
32 { "EgrCntx", 0, 16 },
33 { "SG_GTS", 0x8, 0 },
36 { "NewIndex", 0, 16 },
37 { "SG_CONTEXT_CMD", 0xc, 0 },
45 { "Context", 0, 16 },
46 { "SG_CONTEXT_DATA0", 0x10, 0 },
47 { "SG_CONTEXT_DATA1", 0x14, 0 },
[all …]
/freebsd/sys/dev/rtwn/rtl8812a/
H A Dr12a_priv.h34 { 0x010, 0x0c },
37 { 0x025, 0x0f }, { 0x072, 0x00 }, { 0x420, 0x80 }, { 0x428, 0x0a }, \
38 { 0x429, 0x10 }, { 0x430, 0x00 }, { 0x431, 0x00 }, { 0x432, 0x00 }, \
39 { 0x433, 0x01 }, { 0x434, 0x04 }, { 0x435, 0x05 }, { 0x436, 0x07 }, \
40 { 0x437, 0x08 }, { 0x43c, 0x04 }, { 0x43d, 0x05 }, { 0x43e, 0x07 }, \
41 { 0x43f, 0x08 }, { 0x440, 0x5d }, { 0x441, 0x01 }, { 0x442, 0x00 }, \
42 { 0x444, 0x10 }, { 0x445, 0x00 }, { 0x446, 0x00 }, { 0x447, 0x00 }, \
43 { 0x448, 0x00 }, { 0x449, 0xf0 }, { 0x44a, 0x0f }, { 0x44b, 0x3e }, \
44 { 0x44c, 0x10 }, { 0x44d, 0x00 }, { 0x44e, 0x00 }, { 0x44f, 0x00 }, \
45 { 0x450, 0x00 }, { 0x451, 0xf0 }, { 0x452, 0x0f }, { 0x453, 0x00 }, \
[all …]
/freebsd/sys/dev/qat_c2xxx/
H A Dqatreg.h65 (((uintmax_t)(__n) >= NBBY * sizeof(uintmax_t)) ? 0 : \
75 #define MAX_NUM_AE 0x10
77 #define MAX_AE 0x18
81 #define MAX_USTORE_PER_SEG 0x8000 /* 16k * 2 */
98 #define INVLD_UWORD 0xffffffffffull /* invalid micro-instruction */
100 #define UWORD_MASK 0xbffffffffffull /* micro-word mask without parity */
102 #define AE_ALL_CTX 0xff
106 #define NO_REG_OFFSET 0
111 #define FUSECTL_REG 0x40
114 #define LEGFUSE_REG 0x4c
[all …]
/freebsd/contrib/ofed/libcxgb4/
H A Dt4_regs.h38 #define MYPF_BASE 0x1b000
41 #define PF0_BASE 0x1e000
44 #define PF_STRIDE 0x400
48 #define MYPORT_BASE 0x1c000
51 #define PORT0_BASE 0x20000
54 #define PORT_STRIDE 0x2000
68 #define SGE_PF_KDOORBELL_A 0x0
77 #define PIDX_S 0
80 #define SGE_VF_KDOORBELL_A 0x0
86 #define PIDX_T5_S 0
[all …]

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