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/freebsd/contrib/libxo/tests/core/saved/
H A Dtest_08.E.out1 op create: [test] [] [0]
2 op open_container: [top] [] [0x810]
3 op open_container: [data] [] [0x810]
4 op open_container: [contents] [] [0x810]
5 op open_list: [item] [] [0]
6 op open_instance: [item] [] [0x810]
7 op string: [name] [gum] [0x80]
8 op content: [count] [1412] [0x20]
9 op close_instance: [item] [] [0]
10 op open_instance: [item] [] [0x810]
[all …]
H A Dtest_01.E.out1 op create: [test] [] [0]
2 op open_container: [top-level] [] [0x810]
3 op string: [type] [ethernet] [0]
4 op content: [type] [bridge] [0]
5 op content: [type] [18u] [0]
6 op content: [type] [24] [0]
7 op content: [address] [0x0] [0]
8 op content: [port] [1] [0]
9 op content: [address] [0x0] [0]
10 op content: [port] [1] [0]
[all …]
H A Dtest_09.E.out1 op create: [test] [] [0]
2 op open_container: [top] [] [0x810]
3 op open_container: [data] [] [0x810]
4 op open_container: [contents] [] [0x810]
5 op open_leaf_list: [name] [] [0]
6 op string: [name] [gum] [0x2000]
7 op string: [name] [rope] [0x2000]
8 op string: [name] [ladder] [0x2000]
9 op string: [name] [bolt] [0x2000]
10 op string: [name] [water] [0x2000]
[all …]
/freebsd/sys/dev/bwi/
H A Dbwirf.c106 #define SAVE_RF_REG(mac, regs, n) (regs)->rf_##n = RF_READ((mac), 0x##n)
107 #define RESTORE_RF_REG(mac, regs, n) RF_WRITE((mac), 0x##n, (regs)->rf_##n)
109 #define SAVE_PHY_REG(mac, regs, n) (regs)->phy_##n = PHY_READ((mac), 0x##n)
110 #define RESTORE_PHY_REG(mac, regs, n) PHY_WRITE((mac), 0x##n, (regs)->phy_##n)
165 val = (int16_t)__SHIFTOUT(PHY_READ(mac, 0x47f), NRSSI_11G_MASK); in bwi_nrssi_11g()
191 KASSERT(idx >= 0 && idx < BWI_RFLO_MAX, ("idx %d", idx)); in bwi_rf_lo_isused()
214 if (ctrl < 0x70) in bwi_rf_read()
215 ctrl += 0x80; in bwi_rf_read()
216 else if (ctrl < 0x80) in bwi_rf_read()
217 ctrl += 0x70; in bwi_rf_read()
[all …]
H A Dbwiphy.h77 #define BWI_PHYR_NRSSI_THR_11B 0x020
78 #define BWI_PHYR_BBP_ATTEN 0x060
79 #define BWI_PHYR_TBL_CTRL_11A 0x072
80 #define BWI_PHYR_TBL_DATA_LO_11A 0x073
81 #define BWI_PHYR_TBL_DATA_HI_11A 0x074
82 #define BWI_PHYR_TBL_CTRL_11G 0x472
83 #define BWI_PHYR_TBL_DATA_LO_11G 0x473
84 #define BWI_PHYR_TBL_DATA_HI_11G 0x474
85 #define BWI_PHYR_NRSSI_THR_11G 0x48a
86 #define BWI_PHYR_NRSSI_CTRL 0x803
[all …]
/freebsd/sys/contrib/device-tree/include/dt-bindings/pinctrl/
H A Dam33xx.h18 #define SLEWCTRL_FAST 0
30 #define PIN_OUTPUT_PULLDOWN 0
43 #define AM335X_PIN_OFFSET_MIN 0x0800U
45 #define AM335X_PIN_GPMC_AD0 0x800
46 #define AM335X_PIN_GPMC_AD1 0x804
47 #define AM335X_PIN_GPMC_AD2 0x808
48 #define AM335X_PIN_GPMC_AD3 0x80c
49 #define AM335X_PIN_GPMC_AD4 0x810
50 #define AM335X_PIN_GPMC_AD5 0x814
51 #define AM335X_PIN_GPMC_AD6 0x818
[all …]
/freebsd/sys/dev/rtwn/rtl8192c/usb/
H A Dr92cu_priv.h29 { 0x420, 0x80 }, { 0x423, 0x00 }, { 0x430, 0x00 }, { 0x431, 0x00 },
30 { 0x432, 0x00 }, { 0x433, 0x01 }, { 0x434, 0x04 }, { 0x435, 0x05 },
31 { 0x436, 0x06 }, { 0x437, 0x07 }, { 0x438, 0x00 }, { 0x439, 0x00 },
32 { 0x43a, 0x00 }, { 0x43b, 0x01 }, { 0x43c, 0x04 }, { 0x43d, 0x05 },
33 { 0x43e, 0x06 }, { 0x43f, 0x07 }, { 0x440, 0x5d }, { 0x441, 0x01 },
34 { 0x442, 0x00 }, { 0x444, 0x15 }, { 0x445, 0xf0 }, { 0x446, 0x0f },
35 { 0x447, 0x00 }, { 0x458, 0x41 }, { 0x459, 0xa8 }, { 0x45a, 0x72 },
36 { 0x45b, 0xb9 }, { 0x460, 0x66 }, { 0x461, 0x66 }, { 0x462, 0x08 },
37 { 0x463, 0x03 }, { 0x4c8, 0xff }, { 0x4c9, 0x08 }, { 0x4cc, 0xff },
38 { 0x4cd, 0xff }, { 0x4ce, 0x01 }, { 0x500, 0x26 }, { 0x501, 0xa2 },
[all …]
/freebsd/sys/dev/uart/
H A Duart_dev_msm.h65 #define UART_DM_MR1 0x00
66 #define UART_DM_MR1_AUTO_RFR_LEVEL1_BMSK 0xffffff00
67 #define UART_DM_MR1_AUTO_RFR_LEVEL0_BMSK 0x3f
68 #define UART_DM_MR1_CTS_CTL_BMSK 0x40
69 #define UART_DM_MR1_RX_RDY_CTL_BMSK 0x80
71 #define UART_DM_MR2 0x04
72 #define UART_DM_MR2_ERROR_MODE_BMSK 0x40
73 #define UART_DM_MR2_BITS_PER_CHAR_BMSK 0x30
74 #define UART_DM_MR2_STOP_BIT_LEN_BMSK 0x0c
75 #define UART_DM_MR2_PARITY_MODE_BMSK 0x03
[all …]
/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dqcom,sdm670-camss.yaml107 port@0:
205 reg = <0 0x0acb3000 0 0x1000>,
206 <0 0x0acba000 0 0x1000>,
207 <0 0x0acc8000 0 0x1000>,
208 <0 0x0ac65000 0 0x1000>,
209 <0 0x0ac66000 0 0x1000>,
210 <0 0x0ac67000 0 0x1000>,
211 <0 0x0acaf000 0 0x4000>,
212 <0 0x0acb6000 0 0x4000>,
213 <0 0x0acc4000 0 0x4000>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6sl-pinfunc.h13 #define MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x04c 0x2a4 0x000 0x0 0x0
14 #define MX6SL_PAD_AUD_MCLK__PWM4_OUT 0x04c 0x2a4 0x000 0x1 0x0
15 #define MX6SL_PAD_AUD_MCLK__ECSPI3_RDY 0x04c 0x2a4 0x6b4 0x2 0x0
16 #define MX6SL_PAD_AUD_MCLK__FEC_MDC 0x04c 0x2a4 0x000 0x3 0x0
17 #define MX6SL_PAD_AUD_MCLK__WDOG2_RESET_B_DEB 0x04c 0x2a4 0x000 0x4 0x0
18 #define MX6SL_PAD_AUD_MCLK__GPIO1_IO06 0x04c 0x2a4 0x000 0x5 0x0
19 #define MX6SL_PAD_AUD_MCLK__SPDIF_EXT_CLK 0x04c 0x2a4 0x7f4 0x6 0x0
20 #define MX6SL_PAD_AUD_RXC__AUD3_RXC 0x050 0x2a8 0x000 0x0 0x0
21 #define MX6SL_PAD_AUD_RXC__I2C1_SDA 0x050 0x2a8 0x720 0x1 0x0
22 #define MX6SL_PAD_AUD_RXC__UART3_TX_DATA 0x050 0x2a8 0x000 0x2 0x0
[all …]
H A Dimx51-pinfunc.h13 #define MX51_PAD_EIM_D16__AUD4_RXFS 0x05c 0x3f0 0x000 0x5 0x0
14 #define MX51_PAD_EIM_D16__AUD5_TXD 0x05c 0x3f0 0x8d8 0x7 0x0
15 #define MX51_PAD_EIM_D16__EIM_D16 0x05c 0x3f0 0x000 0x0 0x0
16 #define MX51_PAD_EIM_D16__GPIO2_0 0x05c 0x3f0 0x000 0x1 0x0
17 #define MX51_PAD_EIM_D16__I2C1_SDA 0x05c 0x3f0 0x9b4 0x4 0x0
18 #define MX51_PAD_EIM_D16__UART2_CTS 0x05c 0x3f0 0x000 0x3 0x0
19 #define MX51_PAD_EIM_D16__USBH2_DATA0 0x05c 0x3f0 0x000 0x2 0x0
20 #define MX51_PAD_EIM_D17__AUD5_RXD 0x060 0x3f4 0x8d4 0x7 0x0
21 #define MX51_PAD_EIM_D17__EIM_D17 0x060 0x3f4 0x000 0x0 0x0
22 #define MX51_PAD_EIM_D17__GPIO2_1 0x060 0x3f4 0x000 0x1 0x0
[all …]
H A Dimx50-pinfunc.h13 #define MX50_PAD_KEY_COL0__KPP_COL_0 0x020 0x2cc 0x000 0x0 0x0
14 #define MX50_PAD_KEY_COL0__GPIO4_0 0x020 0x2cc 0x000 0x1 0x0
15 #define MX50_PAD_KEY_COL0__EIM_NANDF_CLE 0x020 0x2cc 0x000 0x2 0x0
16 #define MX50_PAD_KEY_COL0__CTI_TRIGIN7 0x020 0x2cc 0x000 0x6 0x0
17 #define MX50_PAD_KEY_COL0__USBPHY1_TXREADY 0x020 0x2cc 0x000 0x7 0x0
18 #define MX50_PAD_KEY_ROW0__KPP_ROW_0 0x024 0x2d0 0x000 0x0 0x0
19 #define MX50_PAD_KEY_ROW0__GPIO4_1 0x024 0x2d0 0x000 0x1 0x0
20 #define MX50_PAD_KEY_ROW0__EIM_NANDF_ALE 0x024 0x2d0 0x000 0x2 0x0
21 #define MX50_PAD_KEY_ROW0__CTI_TRIGIN_ACK7 0x024 0x2d0 0x000 0x6 0x0
22 #define MX50_PAD_KEY_ROW0__USBPHY1_RXVALID 0x024 0x2d0 0x000 0x7 0x0
[all …]
H A Dimx6q-pinfunc.h13 #define MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x04c 0x360 0x000 0x0 0x0
14 #define MX6QDL_PAD_SD2_DAT1__ECSPI5_SS0 0x04c 0x360 0x834 0x1 0x0
15 #define MX6QDL_PAD_SD2_DAT1__EIM_CS2_B 0x04c 0x360 0x000 0x2 0x0
16 #define MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x04c 0x360 0x7c8 0x3 0x0
17 #define MX6QDL_PAD_SD2_DAT1__KEY_COL7 0x04c 0x360 0x8f0 0x4 0x0
18 #define MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x04c 0x360 0x000 0x5 0x0
19 #define MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x050 0x364 0x000 0x0 0x0
20 #define MX6QDL_PAD_SD2_DAT2__ECSPI5_SS1 0x050 0x364 0x838 0x1 0x0
21 #define MX6QDL_PAD_SD2_DAT2__EIM_CS3_B 0x050 0x364 0x000 0x2 0x0
22 #define MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x050 0x364 0x7b8 0x3 0x0
[all …]
/freebsd/sys/arm64/broadcom/genet/
H A Dif_genetreg.h38 #define GENET_SYS_REV_CTRL 0x000
41 #define REV_MAJOR 0xf000000
44 #define REV_MINOR 0xf0000
46 #define REV_PHY 0xffff
47 #define GENET_SYS_PORT_CTRL 0x004
49 #define GENET_SYS_RBUF_FLUSH_CTRL 0x008
51 #define GENET_SYS_TBUF_FLUSH_CTRL 0x00c
52 #define GENET_EXT_RGMII_OOB_CTRL 0x08c
57 #define GENET_INTRL2_CPU_STAT 0x200
58 #define GENET_INTRL2_CPU_CLEAR 0x208
[all …]
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Dam437x-gp-evm.dts57 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
58 brightness-levels = <0 51 53 56 62 75 101 152 255>;
68 pinctrl-0 = <&matrix_keypad_default>;
80 linux,keymap = <0x00000201 /* P1 */
81 0x00010202 /* P2 */
82 0x01000067 /* UP */
83 0x0101006a /* RIGHT */
84 0x02000069 /* LEFT */
85 0x0201006c>; /* DOWN */
103 #clock-cells = <0>;
[all …]
H A Dam437x-cm-t43.dts39 pinctrl-0 = <&cm_t43_led_pins>;
43 AM4372_IOPAD(0xa78, MUX_MODE7)
49 AM4372_IOPAD(0x988, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
50 AM4372_IOPAD(0x98c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
56 AM4372_IOPAD(0x820, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad8.mmc1_dat0 */
57 AM4372_IOPAD(0x824, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad9.mmc1_dat1 */
58 AM4372_IOPAD(0x828, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad10.mmc1_dat2 */
59 AM4372_IOPAD(0x82c, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad11.mmc1_dat3 */
60 AM4372_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad12.mmc1_dat4 */
61 AM4372_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad13.mmc1_dat5 */
[all …]
H A Dam43x-epos-evm.dts62 pinctrl-0 = <&matrix_keypad_default>;
76 linux,keymap = <0x00000201 /* P1 */
77 0x01000204 /* P4 */
78 0x02000207 /* P7 */
79 0x0300020a /* NUMERIC_STAR */
80 0x00010202 /* P2 */
81 0x01010205 /* P5 */
82 0x02010208 /* P8 */
83 0x03010200 /* P0 */
84 0x00020203 /* P3 */
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMSystemRegister.td3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
40 let M2M3Encoding8{7-0} = Enc12{7-0};
47 def : MClassSysReg<0, 0, 0, 0x400, "apsr_g">;
48 def : MClassSysReg<0, 1, 1, 0xc00, "apsr_nzcvqg">;
49 def : MClassSysReg<0, 0, 0, 0x401, "iapsr_g">;
50 def : MClassSysReg<0, 1, 1, 0xc01, "iapsr_nzcvqg">;
51 def : MClassSysReg<0, 0, 0, 0x402, "eapsr_g">;
52 def : MClassSysReg<0, 1, 1, 0xc02, "eapsr_nzcvqg">;
53 def : MClassSysReg<0, 0, 0, 0x403, "xpsr_g">;
54 def : MClassSysReg<0, 1, 1, 0xc03, "xpsr_nzcvqg">;
[all …]
/freebsd/sys/dev/rtwn/rtl8192c/pci/
H A Dr92ce_priv.h31 { 0x420, 0x80 }, { 0x423, 0x00 }, { 0x430, 0x00 }, { 0x431, 0x00 },
32 { 0x432, 0x00 }, { 0x433, 0x01 }, { 0x434, 0x04 }, { 0x435, 0x05 },
33 { 0x436, 0x06 }, { 0x437, 0x07 }, { 0x438, 0x00 }, { 0x439, 0x00 },
34 { 0x43a, 0x00 }, { 0x43b, 0x01 }, { 0x43c, 0x04 }, { 0x43d, 0x05 },
35 { 0x43e, 0x06 }, { 0x43f, 0x07 }, { 0x440, 0x5d }, { 0x441, 0x01 },
36 { 0x442, 0x00 }, { 0x444, 0x15 }, { 0x445, 0xf0 }, { 0x446, 0x0f },
37 { 0x447, 0x00 }, { 0x458, 0x41 }, { 0x459, 0xa8 }, { 0x45a, 0x72 },
38 { 0x45b, 0xb9 }, { 0x460, 0x88 }, { 0x461, 0x88 }, { 0x462, 0x06 },
39 { 0x463, 0x03 }, { 0x4c8, 0x04 }, { 0x4c9, 0x08 }, { 0x4cc, 0x02 },
40 { 0x4cd, 0x28 }, { 0x4ce, 0x01 }, { 0x500, 0x26 }, { 0x501, 0xa2 },
[all …]
/freebsd/sys/dts/arm/
H A Dufw.dts38 reg = <0x80000000 0x10000000>; /* 256 MB */
41 vmmcsd_fixed: fixedregulator@0 {
51 pinctrl-0 = <&clkout2_pin>;
55 AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
56 AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
62 AM33XX_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE3) /* uart0_ctsn.i2c1_sda */
63 AM33XX_IOPAD(0x96c, PIN_INPUT_PULLUP | MUX_MODE3) /* uart0_rtsn.i2c1_scl */
69 AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
70 AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
76 AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
[all …]
/freebsd/sys/dev/qcom_ess_edma/
H A Dqcom_ess_edma_reg.h63 #define EDMA_REG_MAS_CTRL 0x0
64 #define EDMA_REG_TIMEOUT_CTRL 0x004
65 #define EDMA_REG_DBG0 0x008
66 #define EDMA_REG_DBG1 0x00C
67 #define EDMA_REG_SW_CTRL0 0x100
68 #define EDMA_REG_SW_CTRL1 0x104
71 #define EDMA_REG_RX_ISR 0x200
72 #define EDMA_REG_TX_ISR 0x208
73 #define EDMA_REG_MISC_ISR 0x210
74 #define EDMA_REG_WOL_ISR 0x218
[all …]
/freebsd/sys/contrib/dev/rtw88/
H A Drtw8822c.h11 u8 res0[0x30]; /* 0x120 */
12 u8 vid[2]; /* 0x150 */
15 u8 mac_addr[ETH_ALEN]; /* 0x157 */
16 u8 res2[0x3d];
20 u8 res0[0x4a]; /* 0x120 */
21 u8 mac_addr[ETH_ALEN]; /* 0x16a */
25 u8 mac_addr[ETH_ALEN]; /* 0x120 */
33 u8 ltr_cap; /* 0x13
[all...]
/freebsd/sys/contrib/dev/athk/ath10k/
H A Dcoredump.c18 {0x800, 0x810},
19 {0x820, 0x82C},
20 {0x830, 0x8F4},
21 {0x90C, 0x91C},
22 {0xA14, 0xA18},
23 {0xA84, 0xA94},
24 {0xAA8, 0xAD4},
25 {0xADC, 0xB40},
26 {0x1000, 0x10A4},
27 {0x10BC, 0x111C},
[all …]
/freebsd/sys/arm/nvidia/drm2/
H A Dtegra_dc_reg.h37 #define DC_CMD_GENERAL_INCR_SYNCPT 0x000
38 #define DC_CMD_GENERAL_INCR_SYNCPT_CNTRL 0x001
40 #define SYNCPT_CNTRL_SOFT_RESET (1 << 0)
42 #define DC_CMD_GENERAL_INCR_SYNCPT_ERROR 0x002
43 #define DC_CMD_WIN_A_INCR_SYNCPT 0x008
44 #define DC_CMD_WIN_A_INCR_SYNCPT_CNTRL 0x009
45 #define DC_CMD_WIN_A_INCR_SYNCPT_ERROR 0x00a
46 #define DC_CMD_WIN_B_INCR_SYNCPT 0x010
47 #define DC_CMD_WIN_B_INCR_SYNCPT_CNTRL 0x011
48 #define DC_CMD_WIN_B_INCR_SYNCPT_ERROR 0x012
[all …]
/freebsd/sys/dev/rtwn/rtl8188e/
H A Dr88e_priv.h39 { 0x026, 0x41 }, { 0x027, 0x35 }, { 0x040, 0x00 }, { 0x428, 0x0a },
40 { 0x429, 0x10 }, { 0x430, 0x00 }, { 0x431, 0x01 }, { 0x432, 0x02 },
41 { 0x433, 0x04 }, { 0x434, 0x05 }, { 0x435, 0x06 }, { 0x436, 0x07 },
42 { 0x437, 0x08 }, { 0x438, 0x00 }, { 0x439, 0x00 }, { 0x43a, 0x01 },
43 { 0x43b, 0x02 }, { 0x43c, 0x04 }, { 0x43d, 0x05 }, { 0x43e, 0x06 },
44 { 0x43f, 0x07 }, { 0x440, 0x5d }, { 0x441, 0x01 }, { 0x442, 0x00 },
45 { 0x444, 0x15 }, { 0x445, 0xf0 }, { 0x446, 0x0f }, { 0x447, 0x00 },
46 { 0x458, 0x41 }, { 0x459, 0xa8 }, { 0x45a, 0x72 }, { 0x45b, 0xb9 },
47 { 0x460, 0x66 }, { 0x461, 0x66 }, { 0x480, 0x08 }, { 0x4c8, 0xff },
48 { 0x4c9, 0x08 }, { 0x4cc, 0xff }, { 0x4cd, 0xff }, { 0x4ce, 0x01 },
[all …]

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