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/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dwm8962.txt24 performed. And note that only the value within [0x0, 0xffff] is valid.
26 value 0x0.
32 reg = <0x1a>;
36 0x0000 /* 0:Default */
37 0x0000 /* 1:Default */
38 0x0013 /* 2:FN_DMICCLK */
39 0x0000 /* 3:Default */
40 0x8014 /* 4:FN_DMICCDAT */
41 0x0000 /* 5:Default */
H A Dwlf,wm8962.yaml29 const: 0
74 within [0x0, 0xffff] are valid. Any other value is regarded as setting
75 the GPIO register to its reset value 0x0.
101 #size-cells = <0>;
105 reg = <0x1a>;
116 0x0000 /* 0:Default */
117 0x0000 /* 1:Default */
118 0x0013 /* 2:FN_DMICCLK */
119 0x0000 /* 3:Default */
120 0x8014 /* 4:FN_DMICCDAT */
[all …]
/freebsd/sys/dev/sound/pci/
H A Dallegro_code.h55 0x7980, 0x0030, 0x7980, 0x03B4, 0x7980, 0x03B4, 0x7980, 0x00FB, 0x7980,
56 0x00DD, 0x7980, 0x03B4, 0x7980, 0x0332, 0x7980, 0x0287, 0x7980, 0x03B4,
57 0x7980, 0x03B4, 0x7980, 0x03B4, 0x7980, 0x03B4, 0x7980, 0x031A, 0x7980,
58 0x03B4, 0x7980, 0x022F, 0x7980, 0x03B4, 0x7980, 0x03B4, 0x7980, 0x03B4,
59 0x7980, 0x03B4, 0x7980, 0x03B4, 0x7980, 0x0063, 0x7980, 0x006B, 0x7980,
60 0x03B4, 0x7980, 0x03B4, 0xBF80, 0x2C7C, 0x8806, 0x8804, 0xBE40, 0xBC20,
61 0xAE09, 0x1000, 0xAE0A, 0x0001, 0x6938, 0xEB08, 0x0053, 0x695A, 0xEB08,
62 0x00D6, 0x0009, 0x8B88, 0x6980, 0xE388, 0x0036, 0xBE30, 0xBC20, 0x6909,
63 0xB801, 0x9009, 0xBE41, 0xBE41, 0x6928, 0xEB88, 0x0078, 0xBE41, 0xBE40,
64 0x7980, 0x0038, 0xBE41, 0xBE41, 0x903A, 0x6938, 0xE308, 0x0056, 0x903A,
[all …]
/freebsd/sys/dev/uart/
H A Duart_bus_pci.c82 #define PCI_NO_MSI 0x40000000
83 #define PCI_RID_MASK 0x0000ffff
86 { 0x1028, 0x0008, 0xffff, 0, "Dell Remote Access Card III", 0x14,
88 { 0x1028, 0x0012, 0xffff, 0, "Dell RAC 4 Daughter Card Virtual UART", 0x14,
90 { 0x1033, 0x0074, 0x1033, 0x8014, "NEC RCV56ACF 56k Voice Modem", 0x10 },
91 { 0x1033, 0x007d, 0x1033, 0x8012, "NEC RS232C", 0x10 },
92 { 0x103c, 0x1048, 0x103c, 0x1227, "HP Diva Serial [GSP] UART - Powerbar SP2",
93 0x10 },
94 { 0x103c, 0x1048, 0x103c, 0x1301, "HP Diva RMP3", 0x14 },
95 { 0x103c, 0x1290, 0xffff, 0, "HP Auxiliary Diva Serial Port", 0x18 },
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6qdl-sabresd.dtsi17 reg = <0x10000000 0x40000000>;
50 pinctrl-0 = <&pinctrl_pcie_reg>;
61 pinctrl-0 = <&pinctrl_sensors_reg>;
72 pinctrl-0 = <&pinctrl_gpio_keys>;
101 pinctrl-0 = <&pinctrl_hp>;
122 pwms = <&pwm1 0 5000000 0>;
123 brightness-levels = <0 4 8 16 32 64 128 255>;
131 pinctrl-0 = <&pinctrl_gpio_leds>;
134 gpios = <&gpio1 2 0>;
164 pinctrl-0 = <&pinctrl_ipu1_csi0>;
[all …]
/freebsd/sys/dev/ath/ath_hal/ar5210/
H A Dar5210reg.h28 #define PCI_VENDOR_ATHEROS 0x168c
30 #define PCI_PRODUCT_ATHEROS_AR5210 0x0007
31 #define PCI_PRODUCT_ATHEROS_AR5210_OLD 0x0004
34 #define AR_TXDP0 0x0000 /* TX queue pointer 0 register */
35 #define AR_TXDP1 0x0004 /* TX queue pointer 1 register */
36 #define AR_CR 0x0008 /* Command register */
37 #define AR_RXDP 0x000c /* RX queue descriptor ptr register */
38 #define AR_CFG 0x0014 /* Configuration and status register */
39 #define AR_ISR 0x001c /* Interrupt status register */
40 #define AR_IMR 0x0020 /* Interrupt mask register */
[all …]
/freebsd/lib/libpmc/pmu-events/arch/arm64/
H A Dcommon-and-microarch.json4 "EventCode": "0x00",
10 "EventCode": "0x01",
16 "EventCode": "0x02",
22 "EventCode": "0x03",
28 "EventCode": "0x04",
34 "EventCode": "0x05",
40 "EventCode": "0x06",
46 "EventCode": "0x07",
52 "EventCode": "0x08",
58 "EventCode": "0x09",
[all …]
/freebsd/sys/net/
H A Dethernet.h37 ((hasfcs) ? ETHER_CRC_LEN : 0) + \
38 (((etype) == ETHERTYPE_VLAN) ? ETHER_VLAN_ENCAP_LEN : 0))
48 #define ETHER_CRC_POLY_LE 0xedb88320
49 #define ETHER_CRC_POLY_BE 0x04c11db6
77 #define ETHER_IS_MULTICAST(addr) (*(addr) & 0x01) /* is address mcast/bcast? */
79 (((addr)[0] == 0x33) && ((addr)[1] == 0x33))
81 (((addr)[0] & (addr)[1] & (addr)[2] & \
82 (addr)[3] & (addr)[4] & (addr)[5]) == 0xff)
84 (((addr)[0] | (addr)[1] | (addr)[2] | \
85 (addr)[3] | (addr)[4] | (addr)[5]) == 0x00)
[all …]
/freebsd/sys/contrib/dev/athk/ath10k/
H A Dhw.h24 #define QCA988X_2_0_DEVICE_ID_UBNT (0x11ac)
25 #define QCA988X_2_0_DEVICE_ID (0x003c)
26 #define QCA6164_2_1_DEVICE_ID (0x0041)
27 #define QCA6174_2_1_DEVICE_ID (0x003e)
28 #define QCA6174_3_2_DEVICE_ID (0x0042)
29 #define QCA99X0_2_0_DEVICE_ID (0x0040)
30 #define QCA9888_2_0_DEVICE_ID (0x0056)
31 #define QCA9984_1_0_DEVICE_ID (0x0046)
32 #define QCA9377_1_0_DEVICE_ID (0x0042)
33 #define QCA9887_1_0_DEVICE_ID (0x0050)
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8mq-librem5.dtsi29 #clock-cells = <0>;
41 pinctrl-0 = <&pinctrl_keys>;
66 led-0 {
68 pwms = <&pwm2 0 50000 0>;
73 pwms = <&pwm4 0 50000 0>;
78 pwms = <&pwm3 0 50000 0>;
86 pinctrl-0 = <&pinctrl_audiopwr>;
113 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
133 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
140 pinctrl-0 = <&pinctrl_gnsspwr>;
[all …]
/freebsd/sys/dev/isp/
H A Dispmbox.h41 #define MBOX_NO_OP 0x0000
42 #define MBOX_LOAD_RAM 0x0001
43 #define MBOX_EXEC_FIRMWARE 0x0002
44 #define MBOX_LOAD_FLASH_FIRMWARE 0x0003
45 #define MBOX_WRITE_RAM_WORD 0x0004
46 #define MBOX_READ_RAM_WORD 0x0005
47 #define MBOX_MAILBOX_REG_TEST 0x0006
48 #define MBOX_VERIFY_CHECKSUM 0x0007
49 #define MBOX_ABOUT_FIRMWARE 0x0008
50 #define MBOX_LOAD_RISC_RAM_2100 0x0009
[all …]
/freebsd/share/i18n/csmapper/JIS/
H A DJISX0213-1%UCS@BMP.src5 SRC_ZONE 0x21-0x7E / 0x21-0x7E / 8
7 DST_INVALID 0xFFFE
34 0x222F = 0xFF07 # 0x0027
35 0x2230 = 0xFF02 # 0x0022
36 0x2231 = 0xFF0D # 0x002D
37 0x2232 = 0xFF5E # 0x007E
38 0x2233 = 0x3033
39 0x2234 = 0x3034
40 0x2235 = 0x3035
41 0x2236 = 0x303B
[all …]
H A DUCS@BMP%JISX0213-1.src5 SRC_ZONE 0x007E - 0xFF60
7 DST_INVALID 0xFFFF
30 0x00A0 = 0x2922
31 0x00A1 = 0x2923
32 0x00A4 = 0x2924
33 0x00A6 = 0x2925
34 0x00A9 = 0x2926
35 0x00AA = 0x2927
36 0x00AB = 0x2928
37 0x00AD = 0x2929
[all …]
H A DUCS%JISX0212@MS.src5 SRC_ZONE 0x0000 - 0xFFFF
7 DST_INVALID 0xFFFF
11 0x0000 - 0xFFFF = INVALID
15 0x00A1 = 0x2242
16 0x00A4 = 0x2270
17 0x00A9 = 0x226D
18 0x00AA = 0x226C
19 0x00AE = 0x226E
20 0x00AF = 0x2234
21 0x00B8 = 0x2231
[all …]
H A DJISX0212@MS%UCS.src5 SRC_ZONE 0x21-0x7E / 0x21-0x7E / 8
7 DST_ILSEQ 0xFFFE
14 0x222F = 0x02D8
15 0x2230 = 0x02C7
16 0x2231 = 0x00B8
17 0x2232 = 0x02D9
18 0x2233 = 0x02DD
19 0x2234 = 0x00AF
20 0x2235 = 0x02DB
21 0x2236 = 0x02DA
[all …]
H A DJISX0212%UCS.src5 SRC_ZONE 0x21-0x7E / 0x21-0x7E / 8
7 DST_ILSEQ 0xFFFE
57 # Column #1 is the JIS X 0212 code (in hex as 0xXXXX)
58 # Column #2 is the Unicode (in hex as 0xXXXX)
73 # To change hex to EUC form, add 0x8080
74 # To change hex to kuten form, first subtract 0x2020. Then
76 # the kuten form. For example, 0x2121 -> 0x0101 -> 0101;
77 # 0x6D63 -> 0x4D43 -> 7767
88 # into a single character at 0x2922:
94 # the lowercase forms of these two elements at 0x2942 and 0x2943.
[all …]
H A DUCS%JISX0212.src5 SRC_ZONE 0x0000 - 0x9FFF
7 DST_INVALID 0xFFFF
57 # Column #1 is the JIS X 0212 code (in hex as 0xXXXX)
58 # Column #2 is the Unicode (in hex as 0xXXXX)
73 # To change hex to EUC form, add 0x8080
74 # To change hex to kuten form, first subtract 0x2020. Then
76 # the kuten form. For example, 0x2121 -> 0x0101 -> 0101;
77 # 0x6D63 -> 0x4D43 -> 7767
88 # into a single character at 0x2922:
94 # the lowercase forms of these two elements at 0x2942 and 0x2943.
[all …]
/freebsd/sys/dev/ath/ath_hal/ar5211/
H A Dar5211reg.h32 #define AR_CR 0x0008 /* control register */
33 #define AR_RXDP 0x000C /* receive queue descriptor pointer */
34 #define AR_CFG 0x0014 /* configuration and status register */
35 #define AR_IER 0x0024 /* Interrupt enable register */
36 #define AR_RTSD0 0x0028 /* RTS Duration Parameters 0 */
37 #define AR_RTSD1 0x002c /* RTS Duration Parameters 1 */
38 #define AR_TXCFG 0x0030 /* tx DMA size config register */
39 #define AR_RXCFG 0x0034 /* rx DMA size config register */
40 #define AR5211_JUMBO_LAST 0x0038 /* Jumbo descriptor last address */
41 #define AR_MIBC 0x0040 /* MIB control register */
[all …]
/freebsd/sys/contrib/edk2/Include/IndustryStandard/
H A DTpm20.h2 TPM2.0 Specification data structures
49 #define NO 0
51 #define CLEAR 0
121 #define RSA_DEFAULT_PUBLIC_EXPONENT 0x00010001
159 #define TPM_GENERATED_VALUE (TPM_GENERATED)(0xff544347)
166 #define TPM_ALG_ERROR (TPM_ALG_ID)(0x0000)
167 #define TPM_ALG_FIRST (TPM_ALG_ID)(0x0001)
168 // #define TPM_ALG_RSA (TPM_ALG_ID)(0x0001)
169 // #define TPM_ALG_SHA (TPM_ALG_ID)(0x0004)
170 #define TPM_ALG_SHA1 (TPM_ALG_ID)(0x0004)
[all …]
/freebsd/sys/dev/ath/ath_hal/ar5212/
H A Dar5212reg.h27 #define AR_CR 0x0008 /* MAC control register */
28 #define AR_RXDP 0x000C /* MAC receive queue descriptor pointer */
29 #define AR_CFG 0x0014 /* MAC configuration and status register */
30 #define AR_IER 0x0024 /* MAC Interrupt enable register */
31 /* 0x28 is RTSD0 on the 5211 */
32 /* 0x2c is RTSD1 on the 5211 */
33 #define AR_TXCFG 0x0030 /* MAC tx DMA size config register */
34 #define AR_RXCFG 0x0034 /* MAC rx DMA size config register */
35 /* 0x38 is the jumbo descriptor address on the 5211 */
36 #define AR_MIBC 0x0040 /* MAC MIB control register */
[all …]
/freebsd/sys/dev/puc/
H A Dpucdata.c72 { 0x0009, 0x7168, 0xffff, 0,
75 PUC_PORT_2S, 0x10, 0, 8,
78 { 0x103c, 0x1048, 0x103c, 0x1049,
81 PUC_PORT_3S, 0x10, 0, -1,
85 { 0x103c, 0x1048, 0x103c, 0x104a,
88 PUC_PORT_2S, 0x10, 0, -1,
92 { 0x103c, 0x1048, 0x103c, 0x104b,
95 PUC_PORT_4S, 0x10, 0, -1,
99 { 0x103c, 0x1048, 0x103c, 0x1223,
102 PUC_PORT_3S, 0x10, 0, -1,
[all …]
/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dosprey_reg_map.h86 volatile char pad__0[0x8]; /* 0x0 - 0x8 */
87 volatile u_int32_t MAC_DMA_CR; /* 0x8 - 0xc */
88 volatile char pad__1[0x8]; /* 0xc - 0x14 */
89 volatile u_int32_t MAC_DMA_CFG; /* 0x14 - 0x18 */
90 volatile u_int32_t MAC_DMA_RXBUFPTR_THRESH; /* 0x18 - 0x1c */
91 volatile u_int32_t MAC_DMA_TXDPPTR_THRESH; /* 0x1c - 0x20 */
92 volatile u_int32_t MAC_DMA_MIRT; /* 0x20 - 0x24 */
93 volatile u_int32_t MAC_DMA_GLOBAL_IER; /* 0x24 - 0x28 */
94 volatile u_int32_t MAC_DMA_TIMT; /* 0x28 - 0x2c */
95 volatile u_int32_t MAC_DMA_RIMT; /* 0x2c - 0x30 */
[all …]
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Domap4-l4.dtsi2 &l4_cfg { /* 0x4a000000 */
5 clocks = <&l4_cfg_clkctrl OMAP4_L4_CFG_CLKCTRL 0>;
7 reg = <0x4a000000 0x800>,
8 <0x4a000800 0x800>,
9 <0x4a001000 0x1000>;
13 ranges = <0x00000000 0x4a000000 0x080000>, /* segment 0 */
14 <0x00080000 0x4a080000 0x080000>, /* segment 1 */
15 <0x00100000 0x4a100000 0x080000>, /* segment 2 */
16 <0x00180000 0x4a180000 0x080000>, /* segment 3 */
17 <0x00200000 0x4a200000 0x080000>, /* segment 4 */
[all …]
/freebsd/share/i18n/csmapper/CNS/
H A DUCS%CNS11643-2.src5 SRC_ZONE 0x4E07 - 0x9FA4
7 DST_INVALID 0xFFFF
45 0x4E07 = 0x2126
46 0x4E0C = 0x2127
47 0x4E0E = 0x212F
48 0x4E0F = 0x212D
49 0x4E2E = 0x2130
50 0x4E31 = 0x2143
51 0x4E33 = 0x2531
52 0x4E3C = 0x2144
[all …]
H A DCNS11643-2%UCS.src5 SRC_ZONE 0x21-0x7E / 0x21-0x7E / 8
7 DST_ILSEQ 0xFFFE
45 0x2121 = 0x4E42
46 0x2122 = 0x4E5C
47 0x2123 = 0x51F5
48 0x2124 = 0x531A
49 0x2125 = 0x5382
50 0x2126 = 0x4E07
51 0x2127 = 0x4E0C
52 0x2128 = 0x4E47
[all …]

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