Searched +full:0 +full:x80024000 (Results 1 – 6 of 6) sorted by relevance
/freebsd/sys/contrib/device-tree/Bindings/dma/ |
H A D | fsl-mxs-dma.txt | 7 If a channel is empty/reserved, 0 should be filled in place. 21 reg = <0x80004000 0x2000>; 25 87 86 0 0>; 36 reg = <0x80024000 0x2000>; 37 interrupts = <78 79 66 0 56 reg = <0x8006a000 0x2000>;
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H A D | fsl,mxs-dma.yaml | 75 reg = <0x80004000 0x2000>; 79 87 86 0 0>; 86 reg = <0x80024000 0x2000>; 87 interrupts = <78 79 66 0
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/freebsd/sys/contrib/device-tree/src/arm/nxp/mxs/ |
H A D | imx23.dtsi | 32 #size-cells = <0>; 34 cpu@0 { 37 reg = <0>; 45 reg = <0x80000000 0x80000>; 52 reg = <0x80000000 0x40000>; 59 reg = <0x80000000 0x2000>; 64 reg = <0x80004000 0x2000>; 65 interrupts = <0>, <14>, <20>, <0>, 73 reg = <0x80008000 0x2000>; 81 reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>; [all …]
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H A D | imx28.dtsi | 43 #size-cells = <0>; 45 cpu@0 { 48 reg = <0>; 56 reg = <0x80000000 0x80000>; 63 reg = <0x80000000 0x3c900>; 70 reg = <0x80000000 0x2000>; 74 reg = <0x80002000 0x2000>; 83 reg = <0x80004000 0x2000>; 87 <87>, <86>, <0>, <0>; 94 reg = <0x80006000 0x800>; [all …]
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/freebsd/sys/contrib/dev/mediatek/mt76/mt7615/ |
H A D | regs.h | 37 #define MT_HW_REV MT_HW_INFO(0x000) 38 #define MT_HW_CHIPID MT_HW_INFO(0x008) 39 #define MT_TOP_STRAP_STA MT_HW_INFO(0x010) 42 #define MT_TOP_OFF_RSV 0x1128 45 #define MT_TOP_MISC2 ((dev)->reg_map[MT_TOP_CFG_BASE] + 0x134) 46 #define MT_TOP_MISC2_FW_STATE GENMASK(2, 0) 51 #define MT_MCU_BASE 0x2000 54 #define MT_MCU_PCIE_REMAP_1 MT_MCU(0x500) 55 #define MT_MCU_PCIE_REMAP_1_OFFSET GENMASK(17, 0) 57 #define MT_PCIE_REMAP_BASE_1 0x40000 [all …]
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/freebsd/sys/contrib/dev/mediatek/mt76/mt7603/ |
H A D | regs.h | 6 #define MT_HW_REV 0x1000 7 #define MT_HW_CHIPID 0x1008 8 #define MT_TOP_MISC2 0x1134 10 #define MT_MCU_BASE 0x2000 13 #define MT_MCU_PCIE_REMAP_1 MT_MCU(0x500) 14 #define MT_MCU_PCIE_REMAP_1_OFFSET GENMASK(17, 0) 17 #define MT_MCU_PCIE_REMAP_2 MT_MCU(0x504) 18 #define MT_MCU_PCIE_REMAP_2_OFFSET GENMASK(18, 0) 21 #define MT_HIF_BASE 0x4000 24 #define MT_INT_SOURCE_CSR MT_HIF(0x200) [all …]
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