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/linux/tools/arch/x86/kcpuid/
H A Dcpuid.csv12 # Leaf 0H
15 0x0, 0, eax, 31:0, max_std_leaf , Highest standard CPUID leaf supported
16 0x0, 0, ebx, 31:0, cpu_vendorid_0 , CPU vendor ID string bytes 0 - 3
17 0x0, 0, ec
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/linux/tools/testing/selftests/kvm/include/x86/
H A Dprocessor.h30 #define NONCANONICAL 0xaaaaaaaaaaaaaaaaull
35 #define NMI_VECTOR 0x02
41 #define X86_CR4_VME (1ul << 0)
72 u8 extended_state_area[0];
75 #define XFEATURE_MASK_FP BIT_ULL(0)
125 kvm_static_assert((fn & 0xc0000000) == 0 || \
126 (fn & 0xc0000000) == 0x40000000 || \
127 (fn & 0xc0000000) == 0x80000000 || \
128 (fn & 0xc0000000) == 0xc0000000); \
136 #define X86_FEATURE_MWAIT KVM_X86_CPU_FEATURE(0x1, 0, ECX, 3)
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/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dnvidia,tegra124-mc.yaml47 "^emc-timings-[0-9]+$":
56 "^timing-[0-9]+$":
118 reg = <0x70019000 0x1000>;
122 interrupts = <0 77 4>;
135 0x40040001 /* MC_EMEM_ARB_CFG */
136 0x8000000a /* MC_EMEM_ARB_OUTSTANDING_REQ */
137 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
138 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
139 0x00000002 /* MC_EMEM_ARB_TIMING_RC */
140 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
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/linux/fs/smb/common/
H A Dsmbfsctl.h35 #define FSCTL_DEVICE_DFS (0x0006 << 16)
36 #define FSCTL_DEVICE_FILE_SYSTEM (0x0009 << 16)
37 #define FSCTL_DEVICE_NAMED_PIPE (0x0011 << 16)
38 #define FSCTL_DEVICE_NETWORK_FILE_SYSTEM (0x0014 << 16)
39 #define FSCTL_DEVICE_MASK 0xffff0000
41 #define FSCTL_DEVICE_ACCESS_FILE_ANY_ACCESS (0x00 << 14)
42 #define FSCTL_DEVICE_ACCESS_FILE_READ_ACCESS (0x01 << 14)
43 #define FSCTL_DEVICE_ACCESS_FILE_WRITE_ACCESS (0x02 << 14)
44 #define FSCTL_DEVICE_ACCESS_FILE_READ_WRITE_ACCESS (0x03 << 14)
45 #define FSCTL_DEVICE_ACCESS_MASK 0x0000c000
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H A Dsmb2status.h13 * 0 1 2 3 4 5 6 7 8 9 0 A B C D E F 0 1 2 3 4 5 6 7 8 9 A B C D E F
19 #define STATUS_SEVERITY_SUCCESS __constant_cpu_to_le32(0x0000)
20 #define STATUS_SEVERITY_INFORMATIONAL cpu_to_le32(0x0001)
21 #define STATUS_SEVERITY_WARNING cpu_to_le32(0x0002)
22 #define STATUS_SEVERITY_ERROR cpu_to_le32(0x0003)
30 #define STATUS_SUCCESS cpu_to_le32(0x00000000)
31 #define STATUS_WAIT_0 cpu_to_le32(0x00000000)
32 #define STATUS_WAIT_1 cpu_to_le32(0x00000001)
33 #define STATUS_WAIT_2 cpu_to_le32(0x00000002)
34 #define STATUS_WAIT_3 cpu_to_le32(0x00000003)
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/linux/arch/x86/kvm/
H A Dreverse_cpuid.h23 /* Intel-defined SGX sub-features, CPUID level 0x12 (EAX). */
24 #define KVM_X86_FEATURE_SGX1 KVM_X86_FEATURE(CPUID_12_EAX, 0)
28 /* Intel-defined sub-features, CPUID level 0x00000007:1 (ECX) */
31 /* Intel-defined sub-features, CPUID level 0x00000007:1 (EDX) */
39 /* Intel-defined sub-features, CPUID level 0x00000007:2 (EDX) */
40 #define X86_FEATURE_INTEL_PSFD KVM_X86_FEATURE(CPUID_7_2_EDX, 0)
47 /* Intel-defined sub-features, CPUID level 0x00000024:0 (EBX) */
52 /* CPUID level 0x80000007 (EDX). */
55 /* CPUID level 0x80000022 (EAX) */
56 #define KVM_X86_FEATURE_PERFMON_V2 KVM_X86_FEATURE(CPUID_8000_0022_EAX, 0)
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H A Dcpuid.c55 cpuid_count(0xD, i, &xs->eax, &xs->ebx, &xs->ecx, &ign); in kvm_init_xstate_sizes()
74 offset = (xs->ecx & 0x2) ? ALIGN(ret, 64) : ret; in xstate_required_size()
102 for (i = 0; i < nent; i++) { in kvm_find_cpuid_entry2()
145 best = kvm_find_cpuid_entry(vcpu, 0x80000008); in kvm_check_cpuid()
147 int vaddr_bits = (best->eax & 0xff00) >> 8; in kvm_check_cpuid()
149 if (vaddr_bits != 48 && vaddr_bits != 57 && vaddr_bits != 0) in kvm_check_cpuid()
157 best = kvm_find_cpuid_entry_index(vcpu, 0xd, 0); in kvm_check_cpuid()
159 return 0; in kvm_check_cpuid()
164 return 0; in kvm_check_cpuid()
191 for (i = 0; i < nent; i++) { in kvm_cpuid_check_equal()
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/linux/arch/arm64/boot/dts/exynos/google/
H A Dgs101-pixel-common.dtsi28 framebuffer0: framebuffer-0 {
38 pinctrl-0 = <&key_voldown>, <&key_volup>, <&key_power>;
67 mode-bootloader = <0x800000fc>;
68 mode-charge = <0x8000000a>;
69 mode-dm-verity-device-corrupted = <0x80000050>;
70 mode-fastboot = <0x800000fa>;
71 mode-reboot-ab-update = <0x80000052>;
72 mode-recovery = <0x800000ff>;
73 mode-rescue = <0x800000f9>;
74 mode-shutdown-thermal = <0x80000051>;
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/linux/arch/x86/include/asm/
H A Dsvm.h16 INTERCEPT_CR = 0,
26 /* Byte offset 000h (word 0) */
27 INTERCEPT_CR0_READ = 0,
157 u64 avic_backing_page; /* Offset 0xe0 */
158 u8 reserved_6[8]; /* Offset 0xe8 */
159 u64 avic_logical_id; /* Offset 0xf0 */
160 u64 avic_physical_id; /* Offset 0xf8 */
164 u16 bus_lock_counter; /* Offset 0x120 */
166 u64 allowed_sev_features; /* Offset 0x138 */
167 u64 guest_sev_features; /* Offset 0x140 */
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H A Dcpufeatures.h20 /* Intel-defined CPU features, CPUID level 0x00000001 (EDX), word 0 */
21 #define X86_FEATURE_FPU ( 0*32+ 0) /* "fpu" Onboard FPU */
22 #define X86_FEATURE_VME ( 0*32+ 1) /* "vme" Virtual Mode Extensions */
23 #define X86_FEATURE_DE ( 0*32+ 2) /* "de" Debugging Extensions */
24 #define X86_FEATURE_PSE ( 0*32+ 3) /* "pse" Page Size Extensions */
25 #define X86_FEATURE_TSC ( 0*32+ 4) /* "tsc" Time Stamp Counter */
26 #define X86_FEATURE_MSR ( 0*32+ 5) /* "msr" Model-Specific Registers */
27 #define X86_FEATURE_PAE ( 0*32+ 6) /* "pae" Physical Address Extensions */
28 #define X86_FEATURE_MCE ( 0*32+ 7) /* "mce" Machine Check Exception */
29 #define X86_FEATURE_CX8 ( 0*32+ 8) /* "cx8" CMPXCHG8 instruction */
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/linux/arch/arm/boot/dts/nvidia/
H A Dtegra124-nyan-blaze-emc.dtsi92 0x40040001
93 0x8000000a
94 0x00000001
95 0x00000001
96 0x00000002
97 0x00000000
98 0x00000002
99 0x00000001
100 0x00000002
101 0x00000008
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H A Dtegra124-jetson-tk1-emc.dtsi104 0x40040001
105 0x8000000a
106 0x00000001
107 0x00000001
108 0x00000002
109 0x00000000
110 0x00000002
111 0x00000001
112 0x00000003
113 0x00000008
[all …]
H A Dtegra124-apalis-emc.dtsi108 0x40040001 0x8000000a
109 0x00000001 0x00000001
110 0x00000002 0x00000000
111 0x00000002 0x00000001
112 0x00000003 0x00000008
113 0x00000003 0x00000002
114 0x00000003 0x00000006
115 0x06030203 0x000a0502
116 0x77e30303 0x70000f03
117 0x001f0000
[all …]
H A Dtegra124-nyan-big-emc.dtsi263 0x40040001 /* MC_EMEM_ARB_CFG */
264 0x8000000a /* MC_EMEM_ARB_OUTSTANDING_REQ */
265 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
266 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
267 0x00000002 /* MC_EMEM_ARB_TIMING_RC */
268 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
269 0x00000002 /* MC_EMEM_ARB_TIMING_FAW */
270 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
271 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
272 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
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/linux/arch/x86/kernel/cpu/
H A Dcommon.c212 [GDT_ENTRY_KERNEL32_CS] = GDT_ENTRY_INIT(DESC_CODE32, 0, 0xfffff),
213 [GDT_ENTRY_KERNEL_CS] = GDT_ENTRY_INIT(DESC_CODE64, 0, 0xfffff),
214 [GDT_ENTRY_KERNEL_DS] = GDT_ENTRY_INIT(DESC_DATA64, 0, 0xfffff),
215 [GDT_ENTRY_DEFAULT_USER32_CS] = GDT_ENTRY_INIT(DESC_CODE32 | DESC_USER, 0, 0xfffff),
216 [GDT_ENTRY_DEFAULT_USER_DS] = GDT_ENTRY_INIT(DESC_DATA64 | DESC_USER, 0, 0xfffff),
217 [GDT_ENTRY_DEFAULT_USER_CS] = GDT_ENTRY_INIT(DESC_CODE64 | DESC_USER, 0, 0xfffff),
219 [GDT_ENTRY_KERNEL_CS] = GDT_ENTRY_INIT(DESC_CODE32, 0, 0xfffff),
220 [GDT_ENTRY_KERNEL_DS] = GDT_ENTRY_INIT(DESC_DATA32, 0, 0xfffff),
221 [GDT_ENTRY_DEFAULT_USER_CS] = GDT_ENTRY_INIT(DESC_CODE32 | DESC_USER, 0, 0xfffff),
222 [GDT_ENTRY_DEFAULT_USER_DS] = GDT_ENTRY_INIT(DESC_DATA32 | DESC_USER, 0, 0xfffff),
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/linux/fs/ntfs3/
H A Dntfs.h30 * ntfs.sys used 500 maximum links on-disk struct allows up to 0xffff.
55 * at offset 0x40.
86 MFT_REC_MFT = 0,
104 ATTR_ZERO = cpu_to_le32(0x00),
105 ATTR_STD = cpu_to_le32(0x10),
106 ATTR_LIST = cpu_to_le32(0x20),
107 ATTR_NAME = cpu_to_le32(0x30),
108 ATTR_ID = cpu_to_le32(0x40),
109 ATTR_SECURE = cpu_to_le32(0x50),
110 ATTR_LABEL = cpu_to_le32(0x60),
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/linux/tools/arch/x86/include/asm/
H A Dcpufeatures.h20 /* Intel-defined CPU features, CPUID level 0x00000001 (EDX), word 0 */
21 #define X86_FEATURE_FPU ( 0*32+ 0) /* "fpu" Onboard FPU */
22 #define X86_FEATURE_VME ( 0*32+ 1) /* "vme" Virtual Mode Extensions */
23 #define X86_FEATURE_DE ( 0*32+ 2) /* "de" Debugging Extensions */
24 #define X86_FEATURE_PSE ( 0*32+ 3) /* "pse" Page Size Extensions */
25 #define X86_FEATURE_TSC ( 0*32+ 4) /* "tsc" Time Stamp Counter */
26 #define X86_FEATURE_MSR ( 0*32+ 5) /* "msr" Model-Specific Registers */
27 #define X86_FEATURE_PAE ( 0*32+ 6) /* "pae" Physical Address Extensions */
28 #define X86_FEATURE_MCE ( 0*32+ 7) /* "mce" Machine Check Exception */
29 #define X86_FEATURE_CX8 ( 0*32+ 8) /* "cx8" CMPXCHG8 instruction */
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/linux/arch/x86/kvm/svm/
H A Dsvm.c250 return 0; in svm_set_efer()
256 u32 ret = 0; in svm_get_interrupt_shadow()
267 if (mask == 0) in svm_set_interrupt_shadow()
287 if (nrips && svm->vmcb->control.next_rip != 0) { in __svm_skip_emulated_instruction()
297 return 0; in __svm_skip_emulated_instruction()
307 svm_set_interrupt_shadow(vcpu, 0); in __svm_skip_emulated_instruction()
359 return 0; in svm_update_soft_interrupt_rip()
375 | (ex->has_error_code ? SVM_EVTINJ_VALID_ERR : 0) in svm_inject_exception()
409 * all osvw.status bits inside that length, including bit 0 (which is in svm_init_osvw()
411 * osvw_len is 0 then osvw_status[0] carries no information. We need to in svm_init_osvw()
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/linux/drivers/net/wireless/realtek/rtw88/
H A Drtw8822c_table.c16 0x83000000, 0x00000000, 0x40000000, 0x00000000,
17 0x1D90, 0x300001FF,
18 0x1D90, 0x300101FE,
19 0x1D90, 0x300201FD,
20 0x1D90, 0x300301FC,
21 0x1D90, 0x300401FB,
22 0x1D90, 0x300501FA,
23 0x1D90, 0x300601F9,
24 0x1D90, 0x300701F8,
25 0x1D90, 0x300801F7,
[all …]