Lines Matching +full:0 +full:x8000000a
55 cpuid_count(0xD, i, &xs->eax, &xs->ebx, &xs->ecx, &ign); in kvm_init_xstate_sizes()
61 int feature_bit = 0; in xstate_required_size()
66 if (xstate_bv & 0x1) { in xstate_required_size()
72 offset = (xs->ecx & 0x2) ? ALIGN(ret, 64) : ret; in xstate_required_size()
112 for (i = 0; i < vcpu->arch.cpuid_nent; i++) { in cpuid_entry2_find()
174 best = kvm_find_cpuid_entry(vcpu, 0x80000008); in kvm_check_cpuid()
176 int vaddr_bits = (best->eax & 0xff00) >> 8; in kvm_check_cpuid()
178 if (vaddr_bits != 48 && vaddr_bits != 57 && vaddr_bits != 0) in kvm_check_cpuid()
186 best = kvm_find_cpuid_entry_index(vcpu, 0xd, 0); in kvm_check_cpuid()
188 return 0; in kvm_check_cpuid()
193 return 0; in kvm_check_cpuid()
219 for (i = 0; i < nent; i++) { in kvm_cpuid_check_equal()
229 return 0; in kvm_cpuid_check_equal()
245 signature[0] = entry->ebx; in kvm_get_hypervisor_cpuid()
267 return 0; in kvm_apply_cpuid_pv_features_quirk()
271 return 0; in kvm_apply_cpuid_pv_features_quirk()
287 best = kvm_find_cpuid_entry_index(vcpu, 0xd, 0); in cpuid_get_supported_xcr0()
289 return 0; in cpuid_get_supported_xcr0()
321 best = kvm_find_cpuid_entry_index(vcpu, 7, 0); in kvm_update_cpuid_runtime()
327 best = kvm_find_cpuid_entry_index(vcpu, 0xD, 0); in kvm_update_cpuid_runtime()
331 best = kvm_find_cpuid_entry_index(vcpu, 0xD, 1); in kvm_update_cpuid_runtime()
354 entry = kvm_find_cpuid_entry(vcpu, 0); in guest_cpuid_is_amd_or_hygon()
380 return 0; in cpuid_get_reg_unsafe()
395 memset(vcpu->arch.cpu_caps, 0, sizeof(vcpu->arch.cpu_caps)); in kvm_vcpu_after_set_cpuid()
403 for (i = 0; i < NR_KVM_CPU_CAPS; i++) { in kvm_vcpu_after_set_cpuid()
484 best = kvm_find_cpuid_entry(vcpu, 0x80000000); in cpuid_query_maxphyaddr()
485 if (!best || best->eax < 0x80000008) in cpuid_query_maxphyaddr()
487 best = kvm_find_cpuid_entry(vcpu, 0x80000008); in cpuid_query_maxphyaddr()
489 return best->eax & 0xff; in cpuid_query_maxphyaddr()
564 return 0; in kvm_set_cpuid()
596 for (i = 0; i < cpuid->nent; i++) { in kvm_vcpu_ioctl_set_cpuid()
602 e2[i].index = 0; in kvm_vcpu_ioctl_set_cpuid()
603 e2[i].flags = 0; in kvm_vcpu_ioctl_set_cpuid()
604 e2[i].padding[0] = 0; in kvm_vcpu_ioctl_set_cpuid()
605 e2[i].padding[1] = 0; in kvm_vcpu_ioctl_set_cpuid()
606 e2[i].padding[2] = 0; in kvm_vcpu_ioctl_set_cpuid()
654 return 0; in kvm_vcpu_ioctl_get_cpuid2()
663 * KVM only supports features defined by Intel (0x0), AMD (0x80000000), in raw_cpuid_get()
664 * and Centaur (0xc0000000). WARN if a feature for new vendor base is in raw_cpuid_get()
667 base = cpuid.function & 0xffff0000; in raw_cpuid_get()
668 if (WARN_ON_ONCE(base && base != 0x80000000 && base != 0xc0000000)) in raw_cpuid_get()
669 return 0; in raw_cpuid_get()
672 return 0; in raw_cpuid_get()
690 u32 kvm_cpu_cap_passthrough = 0; \
691 u32 kvm_cpu_cap_synthesized = 0; \
692 u32 kvm_cpu_cap_emulated = 0; \
693 u32 kvm_cpu_cap_features = 0; \
706 } while (0)
710 * word that's being initialized. Exempt 0x8000_0001.EDX usage of 0x1.EDX
711 * features, as AMD duplicated many 0x1.EDX features into 0x8000_0001.EDX.
718 } while (0)
777 * Aliased Features - For features in 0x8000_0001.EDX that are duplicates of
778 * identical 0x1.EDX features, and thus are aliased from 0x1 to 0x8000_0001.
816 memset(kvm_cpu_caps, 0, sizeof(kvm_cpu_caps)); in kvm_set_cpu_caps()
1255 memset(entry, 0, sizeof(*entry)); in do_host_cpuid()
1258 switch (function & 0xC0000000) { in do_host_cpuid()
1259 case 0x40000000: in do_host_cpuid()
1263 case 0x80000000: in do_host_cpuid()
1265 * 0x80000021 is sometimes synthesized by __do_cpuid_func, which in do_host_cpuid()
1271 WRITE_ONCE(max_cpuid_80000000, cpuid_eax(0x80000000)); in do_host_cpuid()
1293 memset(entry, 0, sizeof(*entry)); in cpuid_func_emulated()
1296 entry->index = 0; in cpuid_func_emulated()
1297 entry->flags = 0; in cpuid_func_emulated()
1300 case 0: in cpuid_func_emulated()
1318 entry->eax = 0; in cpuid_func_emulated()
1323 return 0; in cpuid_func_emulated()
1333 return 0; in __do_cpuid_func_emulated()
1346 entry = do_host_cpuid(array, function, 0); in __do_cpuid_func()
1351 case 0: in __do_cpuid_func()
1353 entry->eax = min(entry->eax, 0x24U); in __do_cpuid_func()
1362 * CPUID(function=2, index=0) may return different results each in __do_cpuid_func()
1364 * number of times software should do CPUID(2, 0). in __do_cpuid_func()
1367 * idiotic. Intel's SDM states that EAX & 0xff "will always in __do_cpuid_func()
1373 * a stateful CPUID.0x2 is encountered. in __do_cpuid_func()
1375 WARN_ON_ONCE((entry->eax & 0xff) > 1); in __do_cpuid_func()
1377 /* functions 4 and 0x8000001d have additional index. */ in __do_cpuid_func()
1379 case 0x8000001d: in __do_cpuid_func()
1384 for (i = 1; entry->eax & 0x1f; ++i) { in __do_cpuid_func()
1391 entry->eax = 0x4; /* allow ARAT */ in __do_cpuid_func()
1392 entry->ebx = 0; in __do_cpuid_func()
1393 entry->ecx = 0; in __do_cpuid_func()
1394 entry->edx = 0; in __do_cpuid_func()
1403 /* KVM only supports up to 0x7.2, capped above via min(). */ in __do_cpuid_func()
1411 entry->ebx = 0; in __do_cpuid_func()
1412 entry->ecx = 0; in __do_cpuid_func()
1420 entry->ecx = 0; in __do_cpuid_func()
1421 entry->ebx = 0; in __do_cpuid_func()
1422 entry->eax = 0; in __do_cpuid_func()
1425 case 0xa: { /* Architectural Performance Monitoring */ in __do_cpuid_func()
1430 entry->eax = entry->ebx = entry->ecx = entry->edx = 0; in __do_cpuid_func()
1443 edx.split.reserved1 = 0; in __do_cpuid_func()
1444 edx.split.reserved2 = 0; in __do_cpuid_func()
1448 entry->ecx = 0; in __do_cpuid_func()
1452 case 0x1f: in __do_cpuid_func()
1453 case 0xb: in __do_cpuid_func()
1458 entry->eax = entry->ebx = entry->ecx = 0; in __do_cpuid_func()
1460 case 0xd: { in __do_cpuid_func()
1480 WARN_ON_ONCE(permitted_xss != 0); in __do_cpuid_func()
1481 entry->ebx = 0; in __do_cpuid_func()
1507 if (WARN_ON_ONCE(!entry->eax || (entry->ecx & 0x1) != s_state)) { in __do_cpuid_func()
1514 entry->edx = 0; in __do_cpuid_func()
1518 case 0x12: in __do_cpuid_func()
1521 entry->eax = entry->ebx = entry->ecx = entry->edx = 0; in __do_cpuid_func()
1526 * Index 0: Sub-features, MISCSELECT (a.k.a extended features) in __do_cpuid_func()
1546 entry->ebx &= 0; in __do_cpuid_func()
1549 case 0x14: in __do_cpuid_func()
1551 entry->eax = entry->ebx = entry->ecx = entry->edx = 0; in __do_cpuid_func()
1561 case 0x1d: in __do_cpuid_func()
1563 entry->eax = entry->ebx = entry->ecx = entry->edx = 0; in __do_cpuid_func()
1572 case 0x1e: /* TMUL information */ in __do_cpuid_func()
1574 entry->eax = entry->ebx = entry->ecx = entry->edx = 0; in __do_cpuid_func()
1578 case 0x24: { in __do_cpuid_func()
1582 entry->eax = entry->ebx = entry->ecx = entry->edx = 0; in __do_cpuid_func()
1587 * The AVX10 version is encoded in EBX[7:0]. Note, the version in __do_cpuid_func()
1591 avx10_version = min_t(u8, entry->ebx & 0xff, 1); in __do_cpuid_func()
1595 entry->eax = 0; in __do_cpuid_func()
1596 entry->ecx = 0; in __do_cpuid_func()
1597 entry->edx = 0; in __do_cpuid_func()
1603 entry->ebx = sigptr[0]; in __do_cpuid_func()
1626 entry->ebx = 0; in __do_cpuid_func()
1627 entry->ecx = 0; in __do_cpuid_func()
1628 entry->edx = 0; in __do_cpuid_func()
1630 case 0x80000000: in __do_cpuid_func()
1631 entry->eax = min(entry->eax, 0x80000022); in __do_cpuid_func()
1637 * However, only do it if the host has CPUID leaf 0x8000001d. in __do_cpuid_func()
1639 * CPUID leaf if KVM reports that it supports 0x8000001d or in __do_cpuid_func()
1642 * 0x8000001d. Even worse, this can result in an infinite in __do_cpuid_func()
1645 if (entry->eax >= 0x8000001d && in __do_cpuid_func()
1648 entry->eax = max(entry->eax, 0x80000021); in __do_cpuid_func()
1650 case 0x80000001: in __do_cpuid_func()
1655 case 0x80000005: in __do_cpuid_func()
1658 case 0x80000006: in __do_cpuid_func()
1662 case 0x80000007: /* Advanced power management */ in __do_cpuid_func()
1667 entry->eax = entry->ebx = entry->ecx = 0; in __do_cpuid_func()
1669 case 0x80000008: { in __do_cpuid_func()
1684 unsigned int virt_as = max((entry->eax >> 8) & 0xff, 48U); in __do_cpuid_func()
1702 g_phys_as = 0; in __do_cpuid_func()
1704 phys_as = entry->eax & 0xff; in __do_cpuid_func()
1712 entry->edx = 0; in __do_cpuid_func()
1716 case 0x8000000A: in __do_cpuid_func()
1718 entry->eax = entry->ebx = entry->ecx = entry->edx = 0; in __do_cpuid_func()
1724 entry->ecx = 0; /* Reserved */ in __do_cpuid_func()
1727 case 0x80000019: in __do_cpuid_func()
1728 entry->ecx = entry->edx = 0; in __do_cpuid_func()
1730 case 0x8000001a: in __do_cpuid_func()
1731 entry->eax &= GENMASK(2, 0); in __do_cpuid_func()
1732 entry->ebx = entry->ecx = entry->edx = 0; in __do_cpuid_func()
1734 case 0x8000001e: in __do_cpuid_func()
1736 entry->eax = entry->ebx = entry->ecx = 0; in __do_cpuid_func()
1737 entry->edx = 0; /* reserved */ in __do_cpuid_func()
1739 case 0x8000001F: in __do_cpuid_func()
1741 entry->eax = entry->ebx = entry->ecx = entry->edx = 0; in __do_cpuid_func()
1747 * Enumerate '0' for "PA bits reduction", the adjusted in __do_cpuid_func()
1748 * MAXPHYADDR is enumerated directly (see 0x80000008). in __do_cpuid_func()
1753 case 0x80000020: in __do_cpuid_func()
1754 entry->eax = entry->ebx = entry->ecx = entry->edx = 0; in __do_cpuid_func()
1756 case 0x80000021: in __do_cpuid_func()
1757 entry->ebx = entry->ecx = entry->edx = 0; in __do_cpuid_func()
1761 case 0x80000022: { in __do_cpuid_func()
1764 entry->ecx = entry->edx = 0; in __do_cpuid_func()
1766 entry->eax = entry->ebx = 0; in __do_cpuid_func()
1783 case 0xC0000000: in __do_cpuid_func()
1784 /*Just support up to 0xC0000004 now*/ in __do_cpuid_func()
1785 entry->eax = min(entry->eax, 0xC0000004); in __do_cpuid_func()
1787 case 0xC0000001: in __do_cpuid_func()
1792 case 0xC0000002: in __do_cpuid_func()
1793 case 0xC0000003: in __do_cpuid_func()
1794 case 0xC0000004: in __do_cpuid_func()
1796 entry->eax = entry->ebx = entry->ecx = entry->edx = 0; in __do_cpuid_func()
1800 r = 0; in __do_cpuid_func()
1817 #define CENTAUR_CPUID_SIGNATURE 0xC0000000
1827 return 0; in get_cpuid_func()
1860 for (i = 0; i < num_entries; i++) { in sanity_check_entries()
1864 if (pad[0] || pad[1] || pad[2]) in sanity_check_entries()
1875 0, 0x80000000, CENTAUR_CPUID_SIGNATURE, KVM_CPUID_SIGNATURE, in kvm_dev_ioctl_get_cpuid()
1879 .nent = 0, in kvm_dev_ioctl_get_cpuid()
1897 for (i = 0; i < ARRAY_SIZE(funcs); i++) { in kvm_dev_ioctl_get_cpuid()
1915 * highest basic leaf (i.e. CPUID.0H:EAX) were requested. AMD CPUID semantics
1928 * - Basic: 0x00000000 - 0x3fffffff, 0x50000000 - 0x7fffffff
1929 * - Hypervisor: 0x40000000 - 0x4fffffff
1930 * - Extended: 0x80000000 - 0xbfffffff
1931 * - Centaur: 0xc0000000 - 0xcfffffff
1934 * their own independent class associated with a 0x100 byte range. E.g. if Qemu
1938 * - HyperV: 0x40000000 - 0x400000ff
1939 * - KVM: 0x40000100 - 0x400001ff
1947 basic = kvm_find_cpuid_entry(vcpu, 0); in get_out_of_range_cpuid_entry()
1955 if (function >= 0x40000000 && function <= 0x4fffffff) in get_out_of_range_cpuid_entry()
1956 class = kvm_find_cpuid_entry(vcpu, function & 0xffffff00); in get_out_of_range_cpuid_entry()
1957 else if (function >= 0xc0000000) in get_out_of_range_cpuid_entry()
1958 class = kvm_find_cpuid_entry(vcpu, 0xc0000000); in get_out_of_range_cpuid_entry()
1960 class = kvm_find_cpuid_entry(vcpu, function & 0x80000000); in get_out_of_range_cpuid_entry()
1967 * max basic entry, e.g. if the max basic leaf is 0xb but there is no in get_out_of_range_cpuid_entry()
1968 * entry for CPUID.0xb.index (see below), then the output value for EDX in get_out_of_range_cpuid_entry()
1969 * needs to be pulled from CPUID.0xb.1. in get_out_of_range_cpuid_entry()
2001 if (function == 7 && index == 0) { in kvm_cpuid()
2006 } else if (function == 0x80000007) { in kvm_cpuid()
2011 *eax = *ebx = *ecx = *edx = 0; in kvm_cpuid()
2013 * When leaf 0BH or 1FH is defined, CL is pass-through in kvm_cpuid()
2019 if (function == 0xb || function == 0x1f) { in kvm_cpuid()
2022 *ecx = index & 0xff; in kvm_cpuid()
2037 if (cpuid_fault_enabled(vcpu) && !kvm_require_cpl(vcpu, 0)) in kvm_emulate_cpuid()