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/linux/drivers/net/wireless/ralink/rt2x00/
H A Drt2500usb.h20 #define RF2522 0x0000
21 #define RF2523 0x0001
22 #define RF2524 0x0002
23 #define RF2525 0x0003
24 #define RF2525E 0x0005
25 #define RF5222 0x0010
43 #define CSR_REG_BASE 0x0400
44 #define CSR_REG_SIZE 0x0100
45 #define EEPROM_BASE 0x0000
46 #define EEPROM_SIZE 0x006e
[all …]
/linux/drivers/regulator/
H A Dmt6358-regulator.c54 .enable_mask = BIT(0), \
58 .qi = BIT(0), \
82 .vsel_mask = GENMASK(3, 0), \
107 .enable_mask = BIT(0), \
112 .qi = BIT(0), \
127 .vsel_mask = GENMASK(3, 0), \
155 .enable_mask = BIT(0), \
159 .qi = BIT(0), \
183 .vsel_mask = GENMASK(3, 0), \
208 .enable_mask = BIT(0), \
[all …]
H A Dmt6357-regulator.c53 .enable_mask = BIT(0), \
75 .enable_mask = BIT(0), \
96 .enable_mask = BIT(0), \
99 .da_vsel_mask = 0x7f00, \
114 .enable_mask = BIT(0), \
134 if (ret != 0) { in mt6357_get_buck_voltage_sel()
178 0,
186 0,
188 0,
189 0,
[all …]
/linux/drivers/net/dsa/mv88e6xxx/
H A Dglobal2.h16 /* Offset 0x00: Interrupt Source Register */
17 #define MV88E6XXX_G2_INT_SRC 0x00
18 #define MV88E6XXX_G2_INT_SRC_WDOG 0x8000
19 #define MV88E6XXX_G2_INT_SRC_JAM_LIMIT 0x4000
20 #define MV88E6XXX_G2_INT_SRC_DUPLEX_MISMATCH 0x2000
21 #define MV88E6XXX_G2_INT_SRC_WAKE_EVENT 0x1000
22 #define MV88E6352_G2_INT_SRC_SERDES 0x0800
23 #define MV88E6352_G2_INT_SRC_PHY 0x001f
24 #define MV88E6390_G2_INT_SRC_PHY 0x07fe
28 /* Offset 0x01: Interrupt Mask Register */
[all …]
/linux/include/linux/mfd/wm8350/
H A Drtc.h16 #define WM8350_RTC_SECONDS_MINUTES 0x10
17 #define WM8350_RTC_HOURS_DAY 0x11
18 #define WM8350_RTC_DATE_MONTH 0x12
19 #define WM8350_RTC_YEAR 0x13
20 #define WM8350_ALARM_SECONDS_MINUTES 0x14
21 #define WM8350_ALARM_HOURS_DAY 0x15
22 #define WM8350_ALARM_DATE_MONTH 0x16
23 #define WM8350_RTC_TIME_CONTROL 0x17
26 * R16 (0x10) - RTC Seconds/Minutes
28 #define WM8350_RTC_MINS_MASK 0x7F00
[all …]
/linux/drivers/media/dvb-frontends/drx39xyj/
H A Ddrxj_map.h37 * Generated by: IDF:x 1.3.0
56 #define ATV_COMM_EXEC__A 0xC00000
58 #define ATV_COMM_EXEC__M 0x3
59 #define ATV_COMM_EXEC__PRE 0x0
60 #define ATV_COMM_EXEC_STOP 0x0
61 #define ATV_COMM_EXEC_ACTIVE 0x1
62 #define ATV_COMM_EXEC_HOLD 0x2
64 #define ATV_COMM_STATE__A 0xC00001
66 #define ATV_COMM_STATE__M 0xFFFF
67 #define ATV_COMM_STATE__PRE 0x0
[all …]
/linux/drivers/staging/media/av7110/
H A Dav7110_v4l.c30 u8 msg[5] = { dev, reg >> 8, reg & 0xff, val >> 8, val & 0xff }; in msp_writereg()
31 struct i2c_msg msgs = { .flags = 0, .len = 5, .buf = msg }; in msp_writereg()
35 msgs.addr = 0x40; in msp_writereg()
38 msgs.addr = 0x42; in msp_writereg()
41 return 0; in msp_writereg()
48 return 0; in msp_writereg()
53 u8 msg1[3] = { dev, reg >> 8, reg & 0xff }; in msp_readreg()
56 { .flags = 0, .len = 3, .buf = msg1 }, in msp_readreg()
62 msgs[0].addr = 0x40; in msp_readreg()
63 msgs[1].addr = 0x40; in msp_readreg()
[all …]
/linux/arch/sparc/include/asm/
H A Dsunbpp.h26 #define P_HCR_TEST 0x8000 /* Allows buried counters to be read */
27 #define P_HCR_DSW 0x7f00 /* Data strobe width (in ticks) */
28 #define P_HCR_DDS 0x007f /* Data setup before strobe (in ticks) */
31 #define P_OCR_MEM_CLR 0x8000
32 #define P_OCR_DATA_SRC 0x4000 /* ) */
33 #define P_OCR_DS_DSEL 0x2000 /* ) Bidirectional */
34 #define P_OCR_BUSY_DSEL 0x1000 /* ) selects */
35 #define P_OCR_ACK_DSEL 0x0800 /* ) */
36 #define P_OCR_EN_DIAG 0x0400
37 #define P_OCR_BUSY_OP 0x0200 /* Busy operation */
[all …]
/linux/drivers/media/dvb-frontends/
H A Dnxt200x.c33 #define CRC_CCIT_MASK 0x1021
56 #define dprintk(args...) do { if (debug) pr_debug(args); } while (0)
61 struct i2c_msg msg = { .addr = addr, .flags = 0, .buf = buf, .len = len }; in i2c_writebytes()
64 pr_warn("%s: i2c write error (addr 0x%02x, err == %i)\n", in i2c_writebytes()
68 return 0; in i2c_writebytes()
77 pr_warn("%s: i2c read error (addr 0x%02x, err == %i)\n", in i2c_readbytes()
81 return 0; in i2c_readbytes()
89 …struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf2, .len = len +… in nxt200x_writebytes()
97 buf2[0] = reg; in nxt200x_writebytes()
101 pr_warn("%s: i2c write error (addr 0x%02x, err == %i)\n", in nxt200x_writebytes()
[all …]
H A Dtda665x.c28 int err = 0; in tda665x_read()
44 int err = 0; in tda665x_write()
45 struct i2c_msg msg = { .addr = config->addr, .flags = 0, .buf = buf, .len = length }; in tda665x_write()
63 return 0; in tda665x_get_frequency()
69 u8 result = 0; in tda665x_get_status()
70 int err = 0; in tda665x_get_status()
72 *status = 0; in tda665x_get_status()
75 if (err < 0) in tda665x_get_status()
78 if ((result >> 6) & 0x01) { in tda665x_get_status()
94 u32 frequency, status = 0; in tda665x_set_frequency()
[all …]
/linux/drivers/accel/habanalabs/include/gaudi2/asic_reg/
H A Ddcore0_hmmu0_mmu_masks.h24 #define DCORE0_HMMU0_MMU_MMU_ENABLE_R_SHIFT 0
25 #define DCORE0_HMMU0_MMU_MMU_ENABLE_R_MASK 0x1
28 #define DCORE0_HMMU0_MMU_FORCE_ORDERING_WEAK_ORDERING_SHIFT 0
29 #define DCORE0_HMMU0_MMU_FORCE_ORDERING_WEAK_ORDERING_MASK 0x1
31 #define DCORE0_HMMU0_MMU_FORCE_ORDERING_STRONG_ORDERING_MASK 0x2
34 #define DCORE0_HMMU0_MMU_FEATURE_ENABLE_VA_ORDERING_EN_SHIFT 0
35 #define DCORE0_HMMU0_MMU_FEATURE_ENABLE_VA_ORDERING_EN_MASK 0x1
37 #define DCORE0_HMMU0_MMU_FEATURE_ENABLE_CLEAN_LINK_LIST_MASK 0x2
39 #define DCORE0_HMMU0_MMU_FEATURE_ENABLE_HOP_OFFSET_EN_MASK 0x4
41 #define DCORE0_HMMU0_MMU_FEATURE_ENABLE_OBI_ORDERING_EN_MASK 0x8
[all …]
H A Ddcore0_edma0_core_masks.h24 #define DCORE0_EDMA0_CORE_CFG_0_EN_SHIFT 0
25 #define DCORE0_EDMA0_CORE_CFG_0_EN_MASK 0x1
28 #define DCORE0_EDMA0_CORE_CFG_1_HALT_SHIFT 0
29 #define DCORE0_EDMA0_CORE_CFG_1_HALT_MASK 0x1
31 #define DCORE0_EDMA0_CORE_CFG_1_FLUSH_MASK 0x2
34 #define DCORE0_EDMA0_CORE_PROT_VAL_SHIFT 0
35 #define DCORE0_EDMA0_CORE_PROT_VAL_MASK 0x1
37 #define DCORE0_EDMA0_CORE_PROT_ERR_VAL_MASK 0x2
40 #define DCORE0_EDMA0_CORE_CKG_HBW_RBUF_SHIFT 0
41 #define DCORE0_EDMA0_CORE_CKG_HBW_RBUF_MASK 0x1
[all …]
H A Darc_farm_kdma_masks.h24 #define ARC_FARM_KDMA_CFG_0_EN_SHIFT 0
25 #define ARC_FARM_KDMA_CFG_0_EN_MASK 0x1
28 #define ARC_FARM_KDMA_CFG_1_HALT_SHIFT 0
29 #define ARC_FARM_KDMA_CFG_1_HALT_MASK 0x1
31 #define ARC_FARM_KDMA_CFG_1_FLUSH_MASK 0x2
34 #define ARC_FARM_KDMA_PROT_VAL_SHIFT 0
35 #define ARC_FARM_KDMA_PROT_VAL_MASK 0x1
37 #define ARC_FARM_KDMA_PROT_ERR_VAL_MASK 0x2
40 #define ARC_FARM_KDMA_CKG_HBW_RBUF_SHIFT 0
41 #define ARC_FARM_KDMA_CKG_HBW_RBUF_MASK 0x1
[all …]
H A Dpdma0_core_masks.h24 #define PDMA0_CORE_CFG_0_EN_SHIFT 0
25 #define PDMA0_CORE_CFG_0_EN_MASK 0x1
28 #define PDMA0_CORE_CFG_1_HALT_SHIFT 0
29 #define PDMA0_CORE_CFG_1_HALT_MASK 0x1
31 #define PDMA0_CORE_CFG_1_FLUSH_MASK 0x2
34 #define PDMA0_CORE_PROT_VAL_SHIFT 0
35 #define PDMA0_CORE_PROT_VAL_MASK 0x1
37 #define PDMA0_CORE_PROT_ERR_VAL_MASK 0x2
40 #define PDMA0_CORE_CKG_HBW_RBUF_SHIFT 0
41 #define PDMA0_CORE_CKG_HBW_RBUF_MASK 0x1
[all …]
/linux/drivers/net/usb/
H A Daqc111.h18 #define AQ_ACCESS_MAC 0x01
19 #define AQ_FLASH_PARAMETERS 0x20
20 #define AQ_PHY_POWER 0x31
21 #define AQ_WOL_CFG 0x60
22 #define AQ_PHY_OPS 0x61
43 #define SFR_GENERAL_STATUS 0x03
44 #define SFR_CHIP_STATUS 0x05
45 #define SFR_RX_CTL 0x0B
46 #define SFR_RX_CTL_TXPADCRC 0x0400
47 #define SFR_RX_CTL_IPE 0x0200
[all …]
/linux/drivers/media/usb/gspca/
H A Ddtcs033.c32 if (gspca_dev->usb_err < 0) in reg_rw()
36 usb_rcvctrlpipe(udev, 0), in reg_rw()
42 if (ret < 0) { in reg_rw()
53 int i = 0; in reg_reqs()
56 while ((i < n_reqs) && (gspca_dev->usb_err >= 0)) { in reg_reqs()
63 if (gspca_dev->usb_err < 0) { in reg_reqs()
111 return 0; in sd_config()
117 return 0; in sd_init()
137 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0); in dtcs033_pkt_scan()
141 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0); in dtcs033_pkt_scan()
[all …]
/linux/drivers/pcmcia/
H A Dtcic.h33 #define TCIC_BASE 0x240
36 #define TCIC_DATA 0x00
37 #define TCIC_ADDR 0x02
38 #define TCIC_SCTRL 0x06
39 #define TCIC_SSTAT 0x07
40 #define TCIC_MODE 0x08
41 #define TCIC_PWR 0x09
42 #define TCIC_EDC 0x0A
43 #define TCIC_ICSR 0x0C
44 #define TCIC_IENA 0x0D
[all …]
/linux/sound/soc/codecs/
H A Dsgtl5000.h14 #define SGTL5000_CHIP_ID 0x0000
15 #define SGTL5000_CHIP_DIG_POWER 0x0002
16 #define SGTL5000_CHIP_CLK_CTRL 0x0004
17 #define SGTL5000_CHIP_I2S_CTRL 0x0006
18 #define SGTL5000_CHIP_SSS_CTRL 0x000a
19 #define SGTL5000_CHIP_ADCDAC_CTRL 0x000e
20 #define SGTL5000_CHIP_DAC_VOL 0x0010
21 #define SGTL5000_CHIP_PAD_STRENGTH 0x0014
22 #define SGTL5000_CHIP_ANA_ADC_CTRL 0x0020
23 #define SGTL5000_CHIP_ANA_HP_CTRL 0x0022
[all …]
/linux/sound/isa/msnd/
H A Dmsnd.h22 #define SRAM_BANK_SIZE 0x8000
23 #define SRAM_CNTL_START 0x7F00
24 #define SMA_STRUCT_START 0x7F40
26 #define DSP_BASE_ADDR 0x4000
27 #define DSP_BANK_BASE 0x4000
29 #define AGND 0x01
30 #define SIGNAL 0x02
32 #define EXT_DSP_BIT_DCAL 0x0001
33 #define EXT_DSP_BIT_MIDI_CON 0x0002
35 #define BUFFSIZE 0x8000
[all …]
/linux/arch/alpha/include/asm/
H A Dcore_tsunami.h21 #define TS_BIAS 0x80000000000UL
23 #define TS_BIAS 0x10000000000UL
89 #define TSUNAMI_cchip ((tsunami_cchip *)(IDENT_ADDR+TS_BIAS+0x1A0000000UL))
90 #define TSUNAMI_dchip ((tsunami_dchip *)(IDENT_ADDR+TS_BIAS+0x1B0000800UL))
91 #define TSUNAMI_pchip0 ((tsunami_pchip *)(IDENT_ADDR+TS_BIAS+0x180000000UL))
92 #define TSUNAMI_pchip1 ((tsunami_pchip *)(IDENT_ADDR+TS_BIAS+0x380000000UL))
99 #define perror_m_lost 0x1
100 #define perror_m_serr 0x2
101 #define perror_m_perr 0x4
102 #define perror_m_dcrto 0x8
[all …]
/linux/Documentation/driver-api/
H A Dnvmem.rst68 .offset = 0x7f00,
81 .dev_id = "foo_mac.0",
172 00000a0 db10 2240 0000 e000 0c00 0c00 0000 0c00
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/
H A Dreg.h7 #define REG_SYS_ISO_CTRL 0x0000
8 #define REG_SYS_FUNC_EN 0x0002
9 #define REG_APS_FSMCO 0x0004
10 #define REG_SYS_CLKR 0x0008
11 #define REG_9346CR 0x000A
12 #define REG_EE_VPD 0x000C
13 #define REG_AFE_MISC 0x0010
14 #define REG_SPS0_CTRL 0x0011
15 #define REG_SPS_OCP_CFG 0x0018
16 #define REG_RSV_CTRL 0x001C
[all …]
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/
H A Dreg.h7 #define REG_SYS_ISO_CTRL 0x0000
8 #define REG_SYS_FUNC_EN 0x0002
9 #define REG_APS_FSMCO 0x0004
10 #define REG_SYS_CLKR 0x0008
11 #define REG_9346CR 0x000A
12 #define REG_EE_VPD 0x000C
13 #define REG_AFE_MISC 0x0010
14 #define REG_SPS0_CTRL 0x0011
15 #define REG_SPS_OCP_CFG 0x0018
16 #define REG_RSV_CTRL 0x001C
[all …]
/linux/include/video/
H A Dgbe.h20 uint32_t _pad0[0x010000/4 - 8];
29 volatile uint32_t vt_intr01; /* intr 0,1 y coords */
41 uint32_t _pad1[0xffb0/4];
42 volatile uint32_t ovr_width_tile;/*overlay plane ctrl 0 */
45 uint32_t _pad2[0xfff4/4];
46 volatile uint32_t frm_size_tile;/* normal plane ctrl 0 */
50 uint32_t _pad3[0xfff0/4];
53 uint32_t _pad4[0x7ff8/4];
55 uint32_t _pad5[0x7f80/4];
57 uint32_t _pad6[0x2000/4];
[all …]
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/
H A Dreg.h7 #define TXPKT_BUF_SELECT 0x69
8 #define RXPKT_BUF_SELECT 0xA5
9 #define DISABLE_TRXPKT_BUF_ACCESS 0x0
11 #define REG_SYS_ISO_CTRL 0x0000
12 #define REG_SYS_FUNC_EN 0x0002
13 #define REG_APS_FSMCO 0x0004
14 #define REG_SYS_CLKR 0x0008
15 #define REG_9346CR 0x000A
16 #define REG_EE_VPD 0x000C
17 #define REG_SYS_SWR_CTRL1 0x0010
[all …]

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