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/linux/arch/arm/mach-omap2/
H A Domap54xx.h17 #define L4_54XX_BASE 0x4a000000
18 #define L4_WK_54XX_BASE 0x4ae00000
19 #define L4_PER_54XX_BASE 0x48000000
20 #define L3_54XX_BASE 0x44000000
21 #define OMAP54XX_32KSYNCT_BASE 0x4ae04000
22 #define OMAP54XX_CM_CORE_AON_BASE 0x4a004000
23 #define OMAP54XX_CM_CORE_BASE 0x4a008000
24 #define OMAP54XX_PRM_BASE 0x4ae06000
25 #define OMAP54XX_PRCM_MPU_BASE 0x48243000
26 #define OMAP54XX_SCM_BASE 0x4a002000
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H A Diomap.h33 #define OMAP2_L3_IO_OFFSET 0x90000000
36 #define OMAP2_L4_IO_OFFSET 0xb2000000
39 #define OMAP4_L3_IO_OFFSET 0xb4000000
42 #define AM33XX_L4_WK_IO_OFFSET 0xb5000000
45 #define OMAP4_L3_PER_IO_OFFSET 0xb1100000
48 #define OMAP2_EMU_IO_OFFSET 0xaa800000 /* Emulation */
58 #define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 --> 0xf8000000*/
61 #define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 --> 0xfa000000 */
65 #define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 --> 0xfb000000 */
70 /* 0x6e000000 --> 0xfe000000 */
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/linux/Documentation/devicetree/bindings/pci/
H A Dst,stm32-pcie-ep.yaml59 reg = <0x48400000 0x400000>,
60 <0x48500000 0x100000>,
61 <0x48700000 0x80000>,
62 <0x10000000 0x10000000>;
68 pinctrl-0 = <&pcie_pins_a>;
H A Dst,stm32-pcie-host.yaml37 '^pcie@[0-2],0$':
81 reg = <0x48400000 0x400000>,
82 <0x10000000 0x10000>;
85 interrupt-map-mask = <0 0 0 7>;
86 interrupt-map = <0 0 0 1 &intc 0 0 GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
87 <0 0 0 2 &intc 0 0 GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
88 <0 0 0 3 &intc 0 0 GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>,
89 <0 0 0 4 &intc 0 0 GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
92 ranges = <0x01000000 0x0 0x00000000 0x10010000 0x0 0x10000>,
93 <0x02000000 0x0 0x10020000 0x10020000 0x0 0x7fe0000>,
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