| /linux/arch/arm64/boot/dts/amlogic/ |
| H A D | amlogic-a4-common.dtsi | 27 #clock-cells = <0>; 38 reg = <0x0 0xfff01000 0 0x1000>, 39 <0x0 0xfff02000 0 0x2000>, 40 <0x0 0xfff04000 0 0x2000>, 41 <0x0 0xfff06000 0 0x2000>; 43 #address-cells = <0>; 50 reg = <0x0 0xfe000000 0x0 0x480000>; 53 ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>; 57 reg = <0x0 0x2100 0x0 0x10>; 64 reg = <0x0 0x7a000 0x0 0x18>; [all …]
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| H A D | amlogic-s7d.dtsi | 15 #size-cells = <0>; 17 cpu0: cpu@0 { 20 reg = <0x0 0x0>; 27 reg = <0x0 0x100>; 34 reg = <0x0 0x200>; 41 reg = <0x0 0x300>; 73 #clock-cells = <0>; 85 #address-cells = <0>; 87 reg = <0x0 0xfff01000 0 0x1000>, 88 <0x0 0xfff02000 0 0x0100>; [all …]
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| H A D | amlogic-s6.dtsi | 14 #size-cells = <0>; 16 cpu0: cpu@0 { 19 reg = <0x0 0x0>; 26 reg = <0x0 0x100>; 33 reg = <0x0 0x200>; 40 reg = <0x0 0x300>; 71 #clock-cells = <0>; 83 #address-cells = <0>; 85 reg = <0x0 0xff200000 0 0x10000>, 86 <0x0 0xff240000 0 0x80000>; [all …]
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| H A D | amlogic-s7.dtsi | 15 #size-cells = <0>; 17 cpu0: cpu@0 { 20 reg = <0x0 0x0>; 23 d-cache-size = <0x8000>; 26 i-cache-size = <0x8000>; 34 reg = <0x0 0x100>; 37 d-cache-size = <0x8000>; 40 i-cache-size = <0x8000>; 48 reg = <0x0 0x200>; 51 d-cache-size = <0x8000>; [all …]
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| /linux/drivers/accel/habanalabs/include/goya/asic_reg/ |
| H A D | mmu_regs.h | 22 #define mmMMU_INPUT_FIFO_THRESHOLD 0x480000 24 #define mmMMU_MMU_ENABLE 0x48000C 26 #define mmMMU_FORCE_ORDERING 0x480010 28 #define mmMMU_FEATURE_ENABLE 0x480014 30 #define mmMMU_VA_ORDERING_MASK_31_7 0x480018 32 #define mmMMU_VA_ORDERING_MASK_49_32 0x48001C 34 #define mmMMU_LOG2_DDR_SIZE 0x480020 36 #define mmMMU_SCRAMBLER 0x480024 38 #define mmMMU_MEM_INIT_BUSY 0x480028 40 #define mmMMU_SPI_MASK 0x48002C [all …]
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| /linux/arch/arm/boot/dts/nxp/mxs/ |
| H A D | imx28-apf28.dts | 15 reg = <0x40000000 0x08000000>; 21 pinctrl-0 = <&duart_pins_a>; 27 pinctrl-0 = <&gpmi_pins_a &gpmi_status_cfg>; 30 partition@0 { 32 reg = <0x0 0x300000>; 37 reg = <0x300000 0x80000>; 42 reg = <0x380000 0x80000>; 47 reg = <0x400000 0x80000>; 52 reg = <0x480000 0x80000>; 57 reg = <0x500000 0x800000>; [all …]
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| /linux/sound/drivers/vx/ |
| H A D | vx_cmd.c | 19 [CMD_VERSION] = { 0x010000, 2, RMH_SSIZE_FIXED, 1 }, 20 [CMD_SUPPORTED] = { 0x020000, 1, RMH_SSIZE_FIXED, 2 }, 21 [CMD_TEST_IT] = { 0x040000, 1, RMH_SSIZE_FIXED, 1 }, 22 [CMD_SEND_IRQA] = { 0x070001, 1, RMH_SSIZE_FIXED, 0 }, 23 [CMD_IBL] = { 0x080000, 1, RMH_SSIZE_FIXED, 4 }, 24 [CMD_ASYNC] = { 0x0A0000, 1, RMH_SSIZE_ARG, 0 }, 25 [CMD_RES_PIPE] = { 0x400000, 1, RMH_SSIZE_FIXED, 0 }, 26 [CMD_FREE_PIPE] = { 0x410000, 1, RMH_SSIZE_FIXED, 0 }, 27 [CMD_CONF_PIPE] = { 0x42A101, 2, RMH_SSIZE_FIXED, 0 }, 28 [CMD_ABORT_CONF_PIPE] = { 0x42A100, 2, RMH_SSIZE_FIXED, 0 }, [all …]
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| /linux/arch/arm/boot/dts/intel/ixp/ |
| H A D | intel-ixp42x-linksys-wrv54g.dts | 20 memory@0 { 23 reg = <0x00000000 0x2000000>; 67 #size-cells = <0>; 75 ethernet-switch@0 { 77 reg = <0>; 87 #size-cells = <0>; 89 ethernet-port@0 { 90 reg = <0>; 129 flash@0,0 { 135 reg = <0 0x00000000 0x00800000>; [all …]
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| /linux/drivers/net/ethernet/cavium/thunder/ |
| H A D | nic_reg.h | 13 #define NIC_PF_CFG (0x0000) 14 #define NIC_PF_STATUS (0x0010) 15 #define NIC_PF_INTR_TIMER_CFG (0x0030) 16 #define NIC_PF_BIST_STATUS (0x0040) 17 #define NIC_PF_SOFT_RESET (0x0050) 18 #define NIC_PF_TCP_TIMER (0x0060) 19 #define NIC_PF_BP_CFG (0x0080) 20 #define NIC_PF_RRM_CFG (0x0088) 21 #define NIC_PF_CQM_CFG (0x00A0) 22 #define NIC_PF_CNM_CF (0x00A8) [all …]
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| /linux/drivers/net/wireless/ath/ath11k/ |
| H A D | qmi.h | 16 #define ATH11K_QMI_CALDB_ADDRESS 0x4BA00000 18 #define ATH11K_QMI_WLFW_SERVICE_ID_V01 0x45 19 #define ATH11K_QMI_WLFW_SERVICE_VERS_V01 0x01 20 #define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01 0x02 21 #define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCA6390 0x01 22 #define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_IPQ8074 0x02 23 #define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCN9074 0x07 24 #define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_WCN6750 0x03 28 #define ATH11K_QMI_CALDB_SIZE 0x480000 29 #define ATH11K_QMI_BDF_EXT_STR_LENGTH 0x20 [all …]
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| /linux/drivers/media/dvb-frontends/ |
| H A D | drxk_map.h | 2 #define AUD_COMM_EXEC__A 0x1000000 3 #define AUD_COMM_EXEC_STOP 0x0 4 #define FEC_COMM_EXEC__A 0x1C00000 5 #define FEC_COMM_EXEC_STOP 0x0 6 #define FEC_COMM_EXEC_ACTIVE 0x1 7 #define FEC_DI_COMM_EXEC__A 0x1C20000 8 #define FEC_DI_COMM_EXEC_STOP 0x0 9 #define FEC_DI_INPUT_CTL__A 0x1C20016 10 #define FEC_RS_COMM_EXEC__A 0x1C30000 11 #define FEC_RS_COMM_EXEC_STOP 0x0 [all …]
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| /linux/drivers/accel/habanalabs/include/gaudi/asic_reg/ |
| H A D | dma_if_w_s_regs.h | 22 #define mmDMA_IF_W_S_HBM0_WR_CRED_CNT 0x480000 24 #define mmDMA_IF_W_S_HBM1_WR_CRED_CNT 0x480004 26 #define mmDMA_IF_W_S_HBM0_RD_CRED_CNT 0x480008 28 #define mmDMA_IF_W_S_HBM1_RD_CRED_CNT 0x48000C 30 #define mmDMA_IF_W_S_HBM_LIMITER_0 0x480030 32 #define mmDMA_IF_W_S_HBM_LIMITER_1 0x480034 34 #define mmDMA_IF_W_S_HBM_LIMITER_2 0x480038 36 #define mmDMA_IF_W_S_HBM_LIMITER_3 0x48003C 38 #define mmDMA_IF_W_S_HBM_ALMOST_EN_0 0x480040 40 #define mmDMA_IF_W_S_HBM_ALMOST_EN_1 0x480044 [all …]
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| /linux/drivers/mfd/ |
| H A D | wm5110-tables.c | 22 { 0x80, 0x3 }, 23 { 0x44, 0x20 }, 24 { 0x45, 0x40 }, 25 { 0x46, 0x60 }, 26 { 0x47, 0x80 }, 27 { 0x48, 0xa0 }, 28 { 0x51, 0x13 }, 29 { 0x52, 0x33 }, 30 { 0x53, 0x53 }, 31 { 0x54, 0x73 }, [all …]
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| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx95.dtsi | 24 #size-cells = <0>; 31 arm,psci-suspend-param = <0x0010033>; 40 A55_0: cpu@0 { 43 reg = <0x0>; 61 reg = <0x100>; 79 reg = <0x200>; 97 reg = <0x300>; 115 reg = <0x400>; 133 reg = <0x500>; 248 #clock-cells = <0>; [all …]
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| /linux/sound/soc/codecs/ |
| H A D | wm5110.c | 49 { .type = WMFW_ADSP2_PM, .base = 0x100000 }, 50 { .type = WMFW_ADSP2_ZM, .base = 0x180000 }, 51 { .type = WMFW_ADSP2_XM, .base = 0x190000 }, 52 { .type = WMFW_ADSP2_YM, .base = 0x1a8000 }, 56 { .type = WMFW_ADSP2_PM, .base = 0x200000 }, 57 { .type = WMFW_ADSP2_ZM, .base = 0x280000 }, 58 { .type = WMFW_ADSP2_XM, .base = 0x290000 }, 59 { .type = WMFW_ADSP2_YM, .base = 0x2a8000 }, 63 { .type = WMFW_ADSP2_PM, .base = 0x300000 }, 64 { .type = WMFW_ADSP2_ZM, .base = 0x38000 [all...] |