Home
last modified time | relevance | path

Searched +full:0 +full:x422 (Results 1 – 16 of 16) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/mips/loongson/
H A Dls2k-reset.yaml35 reg = <0 0x1fe07000 0 0x422>;
/freebsd/sys/contrib/device-tree/src/mips/loongson/
H A Dloongson64-2k1000.dtsi15 #size-cells = <0>;
17 cpu0: cpu@0 {
20 reg = <0x0>;
27 #clock-cells = <0>;
33 #address-cells = <0>;
43 ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* ioports */
44 0 0x40000000 0 0x40000000 0 0x40000000
45 0xfe 0x00000000 0xfe 0x00000000 0 0x40000000>;
51 ranges = <1 0x0 0x0 0x18000000 0x4000>;
56 reg = <0 0x1fe07000 0 0x422>;
[all …]
/freebsd/sys/dev/bwi/
H A Dif_bwireg.h45 #define BWI_FLAGS 0xf18
46 #define BWI_FLAGS_INTR_MASK __BITS(5, 0)
48 #define BWI_IMSTATE 0xf90
52 #define BWI_INTRVEC 0xf94
54 #define BWI_STATE_LO 0xf98
55 #define BWI_STATE_LO_RESET __BIT(0)
60 #define BWI_STATE_LO_FLAG_PHYCLKEN __BIT(0)
65 #define BWI_STATE_HI 0xf9c
66 #define BWI_STATE_HI_SERROR __BIT(0)
68 #define BWI_STATE_HI_FLAG_MAGIC1 0x1
[all …]
H A Dbwiphy.c103 #define BWI_PHYTBL_WRSSI 0x1000
104 #define BWI_PHYTBL_NOISE_SCALE 0x1400
105 #define BWI_PHYTBL_NOISE 0x1800
106 #define BWI_PHYTBL_ROTOR 0x2000
107 #define BWI_PHYTBL_DELAY 0x2400
108 #define BWI_PHYTBL_RSSI 0x4000
109 #define BWI_PHYTBL_SIGMA_SQ 0x5000
110 #define BWI_PHYTBL_WRSSI_REV1 0x5400
111 #define BWI_PHYTBL_FREQ 0x5800
187 for (i = 0; i < nitems(bwi_sup_bphy); ++i) { in bwi_phy_attach()
[all …]
/freebsd/sys/arm/nvidia/drm2/
H A Dtegra_dc_reg.h37 #define DC_CMD_GENERAL_INCR_SYNCPT 0x000
38 #define DC_CMD_GENERAL_INCR_SYNCPT_CNTRL 0x001
40 #define SYNCPT_CNTRL_SOFT_RESET (1 << 0)
42 #define DC_CMD_GENERAL_INCR_SYNCPT_ERROR 0x002
43 #define DC_CMD_WIN_A_INCR_SYNCPT 0x008
44 #define DC_CMD_WIN_A_INCR_SYNCPT_CNTRL 0x009
45 #define DC_CMD_WIN_A_INCR_SYNCPT_ERROR 0x00a
46 #define DC_CMD_WIN_B_INCR_SYNCPT 0x010
47 #define DC_CMD_WIN_B_INCR_SYNCPT_CNTRL 0x011
48 #define DC_CMD_WIN_B_INCR_SYNCPT_ERROR 0x012
[all …]
/freebsd/sys/dev/bwn/
H A Dif_bwnreg.h36 #define BWN_IOCTL_PHYCLOCK_ENABLE 0x0004
37 #define BWN_IOCTL_PHYRESET 0x0008
38 #define BWN_IOCTL_MACPHYCLKEN 0x0010 /* MAC PHY Clock Control Enable (rev >= 5) */
39 #define BWN_IOCTL_PLLREFSEL 0x0020 /* PLL Frequency Reference Select (rev >= 5) */
41 #define BWN_IOCTL_PHY_BANDWIDTH 0x00C0
42 #define BWN_IOCTL_PHY_BANDWIDTH_10MHZ 0x0000
43 #define BWN_IOCTL_PHY_BANDWIDTH_20MHZ 0x0040
44 #define BWN_IOCTL_PHY_BANDWIDTH_40MHZ 0x0080
45 #define BWN_IOCTL_SUPPORT_G 0x2000
48 #define BWN_IOST_HAVE_2GHZ 0x0001
[all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/westmereep-dp/
H A Dcache.json4 "Counter": "0,1",
5 "EventCode": "0x63",
8 "UMask": "0x2"
12 "Counter": "0,1",
13 "EventCode": "0x63",
16 "UMask": "0x1"
20 "Counter": "0,1",
21 "EventCode": "0x51",
24 "UMask": "0x4"
28 "Counter": "0,1",
[all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/nehalemep/
H A Dcache.json4 "Counter": "0,1",
5 "EventCode": "0x63",
8 "UMask": "0x2"
12 "Counter": "0,1",
13 "EventCode": "0x63",
16 "UMask": "0x1"
20 "Counter": "0,1",
21 "EventCode": "0x51",
24 "UMask": "0x4"
28 "Counter": "0,1",
[all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/westmereex/
H A Dcache.json4 "Counter": "0,1",
5 "EventCode": "0x63",
8 "UMask": "0x2"
12 "Counter": "0,1",
13 "EventCode": "0x63",
16 "UMask": "0x1"
20 "Counter": "0,1",
21 "EventCode": "0x51",
24 "UMask": "0x4"
28 "Counter": "0,1",
[all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/nehalemex/
H A Dcache.json3 "EventCode": "0x63",
4 "Counter": "0,1",
5 "UMask": "0x2",
11 "EventCode": "0x63",
12 "Counter": "0,1",
13 "UMask": "0x1",
19 "EventCode": "0x51",
20 "Counter": "0,1",
21 "UMask": "0x4",
27 "EventCode": "0x51",
[all …]
/freebsd/contrib/netbsd-tests/sbin/gpt/
H A Dgpt.backup12 <integer>0x10000</integer>
20 <integer>0x0</integer>
22 <integer>0x421</integer>
28 <integer>0x22</integer>
34 <integer>0x0</integer>
36 <integer>0x27df</integer>
42 <integer>0x422</integer>
48 <integer>0x0</integer>
50 <integer>0x0</integer>
56 <integer>0x0</integer>
[all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/westmereep-sp/
H A Dcache.json4 "Counter": "0,1",
5 "EventCode": "0x63",
8 "UMask": "0x2"
12 "Counter": "0,1",
13 "EventCode": "0x63",
16 "UMask": "0x1"
20 "Counter": "0,1",
21 "EventCode": "0x51",
24 "UMask": "0x4"
28 "Counter": "0,1",
[all …]
/freebsd/sys/contrib/dev/rtw89/
H A Dcore.h36 #define MASKBYTE0 0xff
37 #define MASKBYTE1 0xff00
38 #define MASKBYTE2 0xff0000
39 #define MASKBYTE3 0xff000000
40 #define MASKBYTE4 0xff00000000ULL
41 #define MASKHWORD 0xffff0000
42 #define MASKLWORD 0x0000ffff
43 #define MASKDWORD 0xffffffff
44 #define RFREG_MASK 0xfffff
45 #define INV_RF_DATA 0xffffffff
[all …]
/freebsd/crypto/heimdal/lib/wind/
H A Dmap_table.c8 {0x0, 0, 0, WIND_PROFILE_LDAP|WIND_PROFILE_LDAP_CASE}, /* rfc4518-map: Map to nothing */
9 {0x1, 0, 0, WIND_PROFILE_LDAP|WIND_PROFILE_LDAP_CASE}, /* rfc4518-map: Map to nothing */
10 {0x2, 0, 0, WIND_PROFILE_LDAP|WIND_PROFILE_LDAP_CASE}, /* rfc4518-map: Map to nothing */
11 {0x3, 0, 0, WIND_PROFILE_LDAP|WIND_PROFILE_LDAP_CASE}, /* rfc4518-map: Map to nothing */
12 {0x4, 0, 0, WIND_PROFILE_LDAP|WIND_PROFILE_LDAP_CASE}, /* rfc4518-map: Map to nothing */
13 {0x5, 0, 0, WIND_PROFILE_LDAP|WIND_PROFILE_LDAP_CASE}, /* rfc4518-map: Map to nothing */
14 {0x6, 0, 0, WIND_PROFILE_LDAP|WIND_PROFILE_LDAP_CASE}, /* rfc4518-map: Map to nothing */
15 {0x7, 0, 0, WIND_PROFILE_LDAP|WIND_PROFILE_LDAP_CASE}, /* rfc4518-map: Map to nothing */
16 {0x9, 1, 0, WIND_PROFILE_LDAP|WIND_PROFILE_LDAP_CASE}, /* rfc4518-map: Map to SPACE */
17 {0xa, 1, 1, WIND_PROFILE_LDAP|WIND_PROFILE_LDAP_CASE}, /* rfc4518-map: Map to SPACE */
[all …]
/freebsd/share/misc/
H A Dusb_vendors33 0b21 AB13X Headset Adapter
308 0a01 ScanJet 2400c
309 0a17 color LaserJet 3700
310 0b01 ScanJet 82x0C
311 0b0c Wireless Keyboard and Optical Mouse receiver
312 0b17 LaserJet 2300d
313 0c17 LaserJet 1010
314 0c24 Bluetooth Dongle
315 0d12 OfficeJet 9100 series
316 0d17 LaserJet 1012
[all …]
/freebsd/sys/dev/bnxt/bnxt_en/
H A Dhsi_struct_def.h71 * * 0x0-0xFFF8 - The function ID
72 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
73 * * 0xFFFD - Reserved for user-space HWRM interface
74 * * 0xFFFF - HWRM
104 #define CMD_DISCR_TLV_ENCAP UINT32_C(0x8000)
109 #define TLV_TYPE_HWRM_REQUEST UINT32_C(0x1)
111 #define TLV_TYPE_HWRM_RESPONSE UINT32_C(0x2)
113 #define TLV_TYPE_ROCE_SP_COMMAND UINT32_C(0x3)
115 #define TLV_TYPE_QUERY_ROCE_CC_GEN1 UINT32_C(0x4)
117 #define TLV_TYPE_MODIFY_ROCE_CC_GEN1 UINT32_C(0x5)
[all …]