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/freebsd/sys/contrib/device-tree/src/powerpc/fsl/
H A Dpq3-esdhc-0.dtsi2 * PQ3 eSDHC device tree stub [ controller @ offset 0x2e000 ]
37 reg = <0x2e000 0x1000>;
38 interrupts = <72 0x2 0 0>;
40 clock-frequency = <0>;
/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dtango-pcie.txt19 reg = <0x50000000 0x400000>, <0x2e000 0x100>;
20 bus-range = <0 3>;
25 ranges = <0x02000000 0x0 0x00400000 0x50400000 0x0 0x3c00000>;
/freebsd/sys/contrib/device-tree/src/arm64/realtek/
H A Drtd1619-mjolnir.dts17 reg = <0x2e000 0x7ffd2000>; /* boot ROM to 2 GiB */
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dti,icss-iep.yaml52 reg = <0x2e000 0x1000>;
/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A Dfsl-esdhc.txt46 reg = <0x2e000 0x1000>;
47 interrupts = <42 0x8>;
50 clock-frequency = <0>;
H A Dfsl,esdhc.yaml99 reg = <0x2e000 0x1000>;
100 interrupts = <42 0x8>;
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Domap5-l4-abe.dtsi1 &l4_abe { /* 0x40100000 */
3 reg = <0x40100000 0x400>,
4 <0x40100400 0x400>;
10 ranges = <0x00000000 0x40100000 0x100000>, /* segment 0 */
11 <0x4900000
[all...]
H A Domap4-l4-abe.dtsi1 &l4_abe { /* 0x40100000 */
3 reg = <0x40100000 0x400>,
4 <0x40100400 0x400>;
10 ranges = <0x00000000 0x40100000 0x100000>, /* segment 0 */
11 <0x4900000
[all...]
H A Ddm814x.dtsi31 #size-cells = <0>;
32 cpu@0 {
35 reg = <0>;
65 reg = <0x47400000 0x1000>;
73 reg = <0x47401300 0x100>;
76 #phy-cells = <0>;
81 reg = <0x47401400 0x400
82 0x47401000 0x200>;
94 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
95 &cppi41dma 2 0 &cppi41dma 3 0
[all …]
H A Ddra7-l4.dtsi1 &l4_cfg { /* 0x4a000000 */
4 clocks = <&l4cfg_clkctrl DRA7_L4CFG_L4_CFG_CLKCTRL 0>;
6 reg = <0x4a000000 0x800>,
7 <0x4a000800 0x800>,
8 <0x4a001000 0x1000>;
12 ranges = <0x00000000 0x4a000000 0x100000>, /* segment 0 */
13 <0x00100000 0x4a100000 0x100000>, /* segment 1 */
14 <0x00200000 0x4a200000 0x100000>; /* segment 2 */
16 segment@0 { /* 0x4a000000 */
20 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dmsm8953-motorola-potter.dts18 qcom,msm-id = <293 0>;
19 qcom,board-id = <0x46 0x83a0>;
28 reg = <0 0x90001000 0 (2220 * 1920 * 3)>;
51 pinctrl-0 = <&gpio_key_default>;
62 reg = <0x0 0x84300000 0x0 0x2000000>;
67 reg = <0x0 0x90001000 0x0 (1080 * 1920 * 3)>;
72 reg = <0x0 0xaefd2000 0x0 0x2e000>;
77 reg = <0x0 0xeefe4000 0x0 0x1c000>;
83 reg = <0x0 0xef000000 0x0 0x80000>;
84 console-size = <0x40000>;
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dmpc8379_mds.dts26 #size-cells = <0>;
28 PowerPC,8379@0 {
30 reg = <0x0>;
35 timebase-frequency = <0>;
36 bus-frequency = <0>;
37 clock-frequency = <0>;
43 reg = <0x00000000 0x20000000>; // 512MB at 0
50 reg = <0xe0005000 0x1000>;
51 interrupts = <77 0x8>;
55 ranges = <0 0x0 0xfe000000 0x02000000
[all …]
H A Dmpc8377_wlan.dts28 #size-cells = <0>;
30 PowerPC,8377@0 {
32 reg = <0x0>;
37 timebase-frequency = <0>;
38 bus-frequency = <0>;
39 clock-frequency = <0>;
45 reg = <0x00000000 0x20000000>; // 512MB at 0
52 reg = <0xe0005000 0x1000>;
53 interrupts = <77 0x8>;
55 ranges = <0x0 0x0 0xfc000000 0x04000000>;
[all …]
H A Dmpc8379_rdb.dts25 #size-cells = <0>;
27 PowerPC,8379@0 {
29 reg = <0x0>;
34 timebase-frequency = <0>;
35 bus-frequency = <0>;
36 clock-frequency = <0>;
42 reg = <0x00000000 0x10000000>; // 256MB at 0
49 reg = <0xe0005000 0x1000>;
50 interrupts = <77 0x8>;
56 ranges = <0x0 0x0 0xfe000000 0x00800000
[all …]
H A Dmpc8378_mds.dts28 #size-cells = <0>;
30 PowerPC,8378@0 {
32 reg = <0x0>;
37 timebase-frequency = <0>;
38 bus-frequency = <0>;
39 clock-frequency = <0>;
45 reg = <0x00000000 0x20000000>; // 512MB at 0
52 reg = <0xe0005000 0x1000>;
53 interrupts = <77 0x8>;
57 ranges = <0 0x0 0xfe000000 0x02000000
[all …]
H A Dmpc8377_rdb.dts27 #size-cells = <0>;
29 PowerPC,8377@0 {
31 reg = <0x0>;
36 timebase-frequency = <0>;
37 bus-frequency = <0>;
38 clock-frequency = <0>;
44 reg = <0x00000000 0x10000000>; // 256MB at 0
51 reg = <0xe0005000 0x1000>;
52 interrupts = <77 0x8>;
58 ranges = <0x0 0x0 0xfe000000 0x00800000
[all …]
H A Dmpc8378_rdb.dts27 #size-cells = <0>;
29 PowerPC,8378@0 {
31 reg = <0x0>;
36 timebase-frequency = <0>;
37 bus-frequency = <0>;
38 clock-frequency = <0>;
44 reg = <0x00000000 0x10000000>; // 256MB at 0
51 reg = <0xe0005000 0x1000>;
52 interrupts = <77 0x8>;
58 ranges = <0x0 0x0 0xfe000000 0x00800000
[all …]
H A Dmpc8377_mds.dts28 #size-cells = <0>;
30 PowerPC,8377@0 {
32 reg = <0x0>;
37 timebase-frequency = <0>;
38 bus-frequency = <0>;
39 clock-frequency = <0>;
45 reg = <0x00000000 0x20000000>; // 512MB at 0
52 reg = <0xe0005000 0x1000>;
53 interrupts = <77 0x8>;
57 ranges = <0 0x0 0xfe000000 0x02000000
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-am65-main.dtsi12 reg = <0x0 0x70000000 0x0 0x200000>;
15 ranges = <0x0 0x0 0x70000000 0x200000>;
17 atf-sram@0 {
18 reg = <0x0 0x20000>;
22 reg = <0xf0000 0x10000>;
26 reg = <0x100000 0x100000>;
37 reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */
38 <0x00 0x01880000 0x00 0x90000>, /* GICR */
39 <0x00 0x6f000000 0x00 0x2000>, /* GICC */
40 <0x00 0x6f010000 0x00 0x1000>, /* GICH */
[all …]
H A Dk3-am64-main.dtsi13 #clock-cells = <0>;
15 clock-frequency = <0>;
22 reg = <0x00 0x70000000 0x00 0x200000>;
25 ranges = <0x0 0x00 0x70000000 0x200000>;
28 reg = <0x1c0000 0x20000>;
32 reg = <0x1e0000 0x1c000>;
36 reg = <0x1fc000 0x4000>;
43 reg = <0x0 0x43000000 0x0 0x20000>;
46 ranges = <0x0 0x0 0x43000000 0x20000>;
51 reg = <0x00000014 0x4>;
[all …]
/freebsd/sys/dts/powerpc/
H A Dp1020rdb.dts55 #size-cells = <0>;
57 PowerPC,P1020@0 {
59 reg = <0x0>;
65 reg = <0x1>;
78 reg = <0 0xffe05000 0 0x1000>;
83 ranges = <0x0 0x0 0x0 0xef000000 0x01000000
84 0x1 0x0 0x0 0xffa00000 0x00040000
85 0x2 0x0 0x0 0xffb00000 0x00020000>;
87 nor@0,0 {
91 reg = <0x0 0x0 0x1000000>;
[all …]
H A Dp2020ds.dts81 #size-cells = <0>;
83 PowerPC,P2020@0 {
85 reg = <0x0>;
91 reg = <0x1>;
104 reg = <0 0xffe05000 0 0x1000>;
108 ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
109 0x1 0x0 0x0 0xe0000000 0x08000000
110 0x2 0x0 0x0 0xffa00000 0x00040000
111 0x3 0x0 0x0 0xffdf0000 0x00008000
112 0x4 0x0 0x0 0xffa40000 0x00040000
[all …]
/freebsd/sys/dev/qcom_gcc/
H A Dqcom_gcc_ipq4018_clock.c71 .clkdef.parent_cnt = 0, \
82 .clkdef.parent_cnt = 0, \
207 F_FEPLL(GCC_FEPLL_VCO, "gcc_fepll_vco", "xo", 0x2f020, 16, 8, 24, 5),
208 F_FEPLL(GCC_APSS_DDRPLL_VCO, "gcc_apps_ddrpll_vco", "xo", 0x2e020,
219 { 384000000, "gcc_apps_ddrpll_vco", 0xd, 0, 0 },
220 { 413000000, "gcc_apps_ddrpll_vco", 0xc, 0, 0 },
221 { 448000000, "gcc_apps_ddrpll_vco", 0xb, 0, 0 },
222 { 488000000, "gcc_apps_ddrpll_vco", 0xa, 0, 0 },
223 { 512000000, "gcc_apps_ddrpll_vco", 0x9, 0, 0 },
224 { 537000000, "gcc_apps_ddrpll_vco", 0x8, 0, 0 },
[all …]
/freebsd/sys/dev/rtwn/rtl8812a/
H A Dr12a_chan.c69 SM(R12A_TXAGC_MCS0, power[RTWN_RIDX_HT_MCS(0)]) | in r12a_write_txpower_ht()
99 /* 1SS, MCS 0..3 */ in r12a_write_txpower_vht()
101 SM(R12A_TXAGC_NSS1_MCS0, power[RTWN_RIDX_VHT_MCS(0, 0)]) | in r12a_write_txpower_vht()
102 SM(R12A_TXAGC_NSS1_MCS1, power[RTWN_RIDX_VHT_MCS(0, 1)]) | in r12a_write_txpower_vht()
103 SM(R12A_TXAGC_NSS1_MCS2, power[RTWN_RIDX_VHT_MCS(0, 2)]) | in r12a_write_txpower_vht()
104 SM(R12A_TXAGC_NSS1_MCS3, power[RTWN_RIDX_VHT_MCS(0, 3)])); in r12a_write_txpower_vht()
108 SM(R12A_TXAGC_NSS1_MCS4, power[RTWN_RIDX_VHT_MCS(0, 4)]) | in r12a_write_txpower_vht()
109 SM(R12A_TXAGC_NSS1_MCS5, power[RTWN_RIDX_VHT_MCS(0, 5)]) | in r12a_write_txpower_vht()
110 SM(R12A_TXAGC_NSS1_MCS6, power[RTWN_RIDX_VHT_MCS(0, 6)]) | in r12a_write_txpower_vht()
111 SM(R12A_TXAGC_NSS1_MCS7, power[RTWN_RIDX_VHT_MCS(0, 7)])); in r12a_write_txpower_vht()
[all …]
/freebsd/sys/dev/bxe/
H A Dbxe_dump.h33 #define DRV_DUMP_XSTORM_WAITP_ADDRESS 0x2b8a80
34 #define DRV_DUMP_TSTORM_WAITP_ADDRESS 0x1b8a80
35 #define DRV_DUMP_USTORM_WAITP_ADDRESS 0x338a80
36 #define DRV_DUMP_CSTORM_WAITP_ADDRESS 0x238a80
56 #define BNX2X_DUMP_VERSION 0x61111111
76 static const uint32_t page_vals_e2[] = {0, 128};
79 {0x58000, 4608, DUMP_CHIP_E2, 0x30}
85 static const uint32_t page_vals_e3[] = {0, 128};
88 {0x58000, 4608, DUMP_CHIP_E3A0 | DUMP_CHIP_E3B0, 0x30}
92 { 0x2000, 1, 0x1f, 0xfff},
[all …]