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/linux/arch/sh/boards/mach-rsk/
H A Ddevices-rsk7269.c26 [0] = {
27 .start = 0x24000000,
28 .end = 0x240000ff,
H A Ddevices-rsk7203.c28 [0] = {
29 .start = 0x24000000,
30 .end = 0x240000ff,
131 __raw_writel(0x36db0400, 0xfffc0008); /* CS1BCR */ in rsk7203_devices_setup()
/linux/drivers/soc/tegra/cbb/
H A Dtegra194-cbb.c27 #define ERRLOGGER_0_ID_COREID_0 0x00000000
28 #define ERRLOGGER_0_ID_REVISIONID_0 0x00000004
29 #define ERRLOGGER_0_FAULTEN_0 0x00000008
30 #define ERRLOGGER_0_ERRVLD_0 0x0000000c
31 #define ERRLOGGER_0_ERRCLR_0 0x00000010
32 #define ERRLOGGER_0_ERRLOG0_0 0x00000014
33 #define ERRLOGGER_0_ERRLOG1_0 0x00000018
34 #define ERRLOGGER_0_RSVD_00_0 0x0000001c
35 #define ERRLOGGER_0_ERRLOG3_0 0x00000020
36 #define ERRLOGGER_0_ERRLOG4_0 0x00000024
[all …]
/linux/arch/arm64/boot/dts/airoha/
H A Den7581.dtsi20 reg = <0x0 0x84000000 0x0 0xa00000>;
25 reg = <0x0 0x84b00000 0x0 0x100000>;
30 reg = <0x0 0x85000000 0x0 0x1a00000>;
35 reg = <0x0 0x86b00000 0x0 0x100000>;
40 reg = <0x0 0x86d00000 0x0 0x100000>;
51 #size-cells = <0>;
73 cpu0: cpu@0 {
76 reg = <0x0>;
85 reg = <0x1>;
94 reg = <0x2>;
[all …]
/linux/arch/arm/boot/dts/arm/
H A Dintegrator.dtsi12 reg = <0x0 0x0>;
17 reg = <0x10000000 0x200>;
18 ranges = <0x0 0x10000000 0x200>;
23 led@c,0 {
25 reg = <0x0c 0x04>;
26 offset = <0x0c>;
27 mask = <0x01>;
36 reg = <0x12000000 0x100>;
40 reg = <0x13000000 0x100>;
46 reg = <0x13000100 0x100>;
[all …]
/linux/drivers/message/fusion/lsi/
H A Dmpi_log_fc.h20 * The value is 0xabcccccc where
24 * 0 = FCP Initiator
40 MPI_IOCLOGINFO_FC_INIT_BASE = 0x20000000,
41 …MPI_IOCLOGINFO_FC_INIT_ERROR_OUT_OF_ORDER_FRAME = 0x20000001, /* received an out of order frame - …
42 …MPI_IOCLOGINFO_FC_INIT_ERROR_BAD_START_OF_FRAME = 0x20000002, /* Bad Rx Frame, bad start of frame …
43 …MPI_IOCLOGINFO_FC_INIT_ERROR_BAD_END_OF_FRAME = 0x20000003, /* Bad Rx Frame, bad end of frame pr…
44 MPI_IOCLOGINFO_FC_INIT_ERROR_OVER_RUN = 0x20000004, /* Bad Rx Frame, overrun */
45 …MPI_IOCLOGINFO_FC_INIT_ERROR_RX_OTHER = 0x20000005, /* Other errors caught by IOC which …
46 …MPI_IOCLOGINFO_FC_INIT_ERROR_SUBPROC_DEAD = 0x20000006, /* Main processor could not initiali…
47 MPI_IOCLOGINFO_FC_INIT_ERROR_RX_OVERRUN = 0x20000007, /* Scatter Gather overrun */
[all …]
/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_0_default.h26 #define cfgNB_NBCFG0_NB_VENDOR_ID_DEFAULT 0x00000000
27 #define cfgNB_NBCFG0_NB_DEVICE_ID_DEFAULT 0x00000000
28 #define cfgNB_NBCFG0_NB_COMMAND_DEFAULT 0x00000000
29 #define cfgNB_NBCFG0_NB_STATUS_DEFAULT 0x00000000
30 #define cfgNB_NBCFG0_NB_REVISION_ID_DEFAULT 0x00000000
31 #define cfgNB_NBCFG0_NB_REGPROG_INF_DEFAULT 0x00000000
32 #define cfgNB_NBCFG0_NB_SUB_CLASS_DEFAULT 0x00000000
33 #define cfgNB_NBCFG0_NB_BASE_CODE_DEFAULT 0x00000000
34 #define cfgNB_NBCFG0_NB_CACHE_LINE_DEFAULT 0x00000000
35 #define cfgNB_NBCFG0_NB_LATENCY_DEFAULT 0x00000000
[all …]
H A Dnbio_2_3_default.h26 #define mmBIF_BX_PF_MM_INDEX_DEFAULT 0x00000000
27 #define mmBIF_BX_PF_MM_DATA_DEFAULT 0x00000000
28 #define mmBIF_BX_PF_MM_INDEX_HI_DEFAULT 0x00000000
32 #define mmSYSHUB_INDEX_OVLP_DEFAULT 0x00000000
33 #define mmSYSHUB_DATA_OVLP_DEFAULT 0x00000000
34 #define mmPCIE_INDEX_DEFAULT 0x00000000
35 #define mmPCIE_DATA_DEFAULT 0x00000000
36 #define mmPCIE_INDEX2_DEFAULT 0x00000000
37 #define mmPCIE_DATA2_DEFAULT 0x00000000
38 #define mmSBIOS_SCRATCH_0_DEFAULT 0x00000000
[all …]
H A Dnbio_6_1_default.h26 #define cfgPSWUSCFG0_VENDOR_ID_DEFAULT 0x00000000
27 #define cfgPSWUSCFG0_DEVICE_ID_DEFAULT 0x00000000
28 #define cfgPSWUSCFG0_COMMAND_DEFAULT 0x00000000
29 #define cfgPSWUSCFG0_STATUS_DEFAULT 0x00000000
30 #define cfgPSWUSCFG0_REVISION_ID_DEFAULT 0x00000000
31 #define cfgPSWUSCFG0_PROG_INTERFACE_DEFAULT 0x00000000
32 #define cfgPSWUSCFG0_SUB_CLASS_DEFAULT 0x00000000
33 #define cfgPSWUSCFG0_BASE_CLASS_DEFAULT 0x00000000
34 #define cfgPSWUSCFG0_CACHE_LINE_DEFAULT 0x00000000
35 #define cfgPSWUSCFG0_LATENCY_DEFAULT 0x00000000
[all …]
/linux/arch/riscv/boot/dts/sophgo/
H A Dsg2044.dtsi20 reg = <0x00000000 0x80000000 0x00000010 0x00000000>;
26 #clock-cells = <0>;
37 reg = <0x6c 0x00000000 0x0 0x00001000>,
38 <0x6c 0x00300000 0x0 0x00004000>,
39 <0x48 0x00000000 0x0 0x00001000>,
40 <0x6c 0x000c0000 0x0 0x00001000>;
48 interrupt-map-mask = <0 0 0 7>;
49 interrupt-map = <0 0 0 1 &pcie_intc0 0>,
50 <0 0 0 2 &pcie_intc0 1>,
51 <0 0 0 3 &pcie_intc0 2>,
[all …]
/linux/arch/arm/boot/dts/ti/keystone/
H A Dkeystone-k2g.dtsi33 #size-cells = <0>;
35 cpu@0 {
38 reg = <0>;
46 reg = <0x0 0x02561000 0x0 0x1000>,
47 <0x0 0x02562000 0x0 0x2000>,
48 <0x0 0x02564000 0x0 0x2000>,
49 <0x0 0x02566000 0x0 0x2000>;
74 #size-cells = <0>;
77 usb0_phy: usb-phy@0 {
79 reg = <0>;
[all …]
H A Dkeystone-k2e-netcp.dtsi15 queue-range = <0 0x2000>;
16 linkram0 = <0x100000 0x4000>;
17 linkram1 = <0 0x10000>;
24 managed-queues = <0 0x2000>;
25 reg = <0x2a40000 0x20000>,
26 <0x2a06000 0x400>,
27 <0x2a02000 0x1000>,
28 <0x2a03000 0x1000>,
29 <0x23a80000 0x20000>,
30 <0x2a80000 0x20000>;
[all …]
/linux/arch/arm/mach-versatile/
H A Dintegrator-hardware.h14 #define IO_BASE 0xF0000000 // VA of IO
15 #define IO_SIZE 0x0B000000 // How much?
19 #define IO_ADDRESS(x) (((x) & 0x000fffff) | (((x) >> 4) & 0x0ff00000) | IO_BASE)
25 #define INTEGRATOR_BOOT_ROM_LO 0x00000000
26 #define INTEGRATOR_BOOT_ROM_HI 0x20000000
40 #define INTEGRATOR_SSRAM_BASE 0x00000000
41 #define INTEGRATOR_SSRAM_ALIAS_BASE 0x10800000
44 #define INTEGRATOR_FLASH_BASE 0x24000000
47 #define INTEGRATOR_MBRD_SSRAM_BASE 0x28000000
53 #define INTEGRATOR_SDRAM_BASE 0x00040000
[all …]
/linux/lib/crypto/
H A Ddes.c30 0x00, 0x00, 0x40, 0x04, 0x10, 0x10, 0x50, 0x14,
31 0x04, 0x40, 0x44, 0x44, 0x14, 0x50, 0x54, 0x54,
32 0x02, 0x02, 0x42, 0x06, 0x12, 0x12, 0x52, 0x16,
33 0x06, 0x42, 0x46, 0x46, 0x16, 0x52, 0x56, 0x56,
34 0x80, 0x08, 0xc0, 0x0c, 0x90, 0x18, 0xd0, 0x1c,
35 0x84, 0x48, 0xc4, 0x4c, 0x94, 0x58, 0xd4, 0x5c,
36 0x82, 0x0a, 0xc2, 0x0e, 0x92, 0x1a, 0xd2, 0x1e,
37 0x86, 0x4a, 0xc6, 0x4e, 0x96, 0x5a, 0xd6, 0x5e,
38 0x20, 0x20, 0x60, 0x24, 0x30, 0x30, 0x70, 0x34,
39 0x24, 0x60, 0x64, 0x64, 0x34, 0x70, 0x74, 0x74,
[all …]
/linux/arch/arm64/boot/dts/cavium/
H A Dthunder-88xx.dtsi63 #size-cells = <0>;
65 cpu@0 {
68 reg = <0x0 0x000>;
74 reg = <0x0 0x001>;
80 reg = <0x0 0x002>;
86 reg = <0x0 0x003>;
92 reg = <0x0 0x004>;
98 reg = <0x0 0x005>;
104 reg = <0x0 0x006>;
110 reg = <0x0 0x007>;
[all …]
/linux/arch/hexagon/kernel/
H A Dvm_init_segtable.S16 * Start with mapping PA=0 to both VA=0x0 and VA=0xc000000 as 16MB large pages.
46 /* VA 0x00000000 */
59 /* VA 0x40000000 */
68 /* VA 0x80000000 */
74 /*0xa8*/.word X,X,X,X
77 /*0xa9*/.word BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000)
79 /*0xa9*/.word X,X,X,X
81 /*0xaa*/.word X,X,X,X
82 /*0xab*/.word X,X,X,X
83 /*0xac*/.word X,X,X,X
[all …]
/linux/drivers/gpu/drm/gma500/
H A Dcdv_intel_display.c28 #define CDV_LIMIT_SINGLE_LVDS_96 0
41 .m1 = {.min = 0, .max = 0},
53 .m1 = {.min = 0, .max = 0},
68 .m1 = {.min = 0, .max = 0},
80 .m1 = {.min = 0, .max = 0},
92 .m1 = {.min = 0, .max = 0},
104 .m1 = {.min = 0, .max = 0},
115 int ret__ = 0; \
134 ret = wait_for((REG_READ(SB_PCKT) & SB_BUSY) == 0, 1000); in cdv_sb_read()
144 SET_FIELD(0xf, SB_BYTE_ENABLE)); in cdv_sb_read()
[all …]
/linux/drivers/media/pci/cx25821/
H A Dcx25821-core.c26 static unsigned int card[] = {[0 ... (CX25821_MAXBOARDS - 1)] = UNSET };
330 pr_cont("0x%08x [ %s", in cx25821_risc_decode()
332 for (i = ARRAY_SIZE(bits) - 1; i >= 0; i--) { in cx25821_risc_decode()
336 pr_cont(" count=%d ]\n", risc & 0xfff); in cx25821_risc_decode()
345 cx_write(DEV_CNTRL2, 0x20); in cx25821_registers_init()
350 cx_write(PCI_INT_MSK, 0x2001FFFF); in cx25821_registers_init()
357 cx_write(PLL_A_INT_FRAC, 0x9807A58B); in cx25821_registers_init()
359 /* PLL_A_POST = 0x1C, PLL_A_OUT_TO_PIN = 0x1 */ in cx25821_registers_init()
360 cx_write(PLL_A_POST_STAT_BIST, 0x8000019C); in cx25821_registers_init()
364 cx_write(PLL_A_INT_FRAC, tmp & 0x7FFFFFFF); in cx25821_registers_init()
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dramgk104.c144 u32 addr = 0x110974, i; in gk104_ram_train()
146 ram_mask(fuc, 0x10f910, mask, data); in gk104_ram_train()
147 ram_mask(fuc, 0x10f914, mask, data); in gk104_ram_train()
149 for (i = 0; (data & 0x80000000) && i < ram->parts; addr += 0x1000, i++) { in gk104_ram_train()
152 ram_wait(fuc, addr, 0x0000000f, 0x00000000, 500000); in gk104_ram_train()
166 ram_mask(fuc, 0x1373f4, 0x00000000, 0x00001100); in r1373f4_init()
167 ram_mask(fuc, 0x1373f4, 0x00000000, 0x00000010); in r1373f4_init()
169 ram_mask(fuc, 0x1373f4, 0x00000000, 0x00010010); in r1373f4_init()
172 ram_mask(fuc, 0x1373f4, 0x00000003, 0x00000000); in r1373f4_init()
173 ram_mask(fuc, 0x1373f4, 0x00000010, 0x00000000); in r1373f4_init()
[all …]
/linux/drivers/video/fbdev/nvidia/
H A Dnv_hw.c61 VGA_WR08(par->PCIO, 0x3D4, 0x1F); in NVLockUnlock()
62 VGA_WR08(par->PCIO, 0x3D5, Lock ? 0x99 : 0x57); in NVLockUnlock()
64 VGA_WR08(par->PCIO, 0x3D4, 0x11); in NVLockUnlock()
65 cr11 = VGA_RD08(par->PCIO, 0x3D5); in NVLockUnlock()
67 cr11 |= 0x80; in NVLockUnlock()
69 cr11 &= ~0x80; in NVLockUnlock()
70 VGA_WR08(par->PCIO, 0x3D5, cr11); in NVLockUnlock()
77 par->CurrentState->cursor1 = (par->CurrentState->cursor1 & 0xFE) | in NVShowHideCursor()
78 (ShowHide & 0x01); in NVShowHideCursor()
79 VGA_WR08(par->PCIO, 0x3D4, 0x31); in NVShowHideCursor()
[all …]
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_default.h26 #define mmSDMA0_DEC_START_DEFAULT 0x00000000
27 #define mmSDMA0_PG_CNTL_DEFAULT 0x00000000
28 #define mmSDMA0_PG_CTX_LO_DEFAULT 0x00000000
29 #define mmSDMA0_PG_CTX_HI_DEFAULT 0x00000000
30 #define mmSDMA0_PG_CTX_CNTL_DEFAULT 0x00000000
31 #define mmSDMA0_POWER_CNTL_DEFAULT 0x40000050
32 #define mmSDMA0_CLK_CTRL_DEFAULT 0x00000100
33 #define mmSDMA0_CNTL_DEFAULT 0x000000c2
34 #define mmSDMA0_CHICKEN_BITS_DEFAULT 0x01af0107
35 #define mmSDMA0_GB_ADDR_CONFIG_DEFAULT 0x00000044
[all …]